From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: Ingo Molnar <mingo@kernel.org>, Peter Anvin <hpa@zytor.com>,
Peter Zijlstra <peterz@infradead.org>,
Andy Lutomirski <luto@kernel.org>, Borislav Petkov <bp@alien8.de>,
Steven Rostedt <rostedt@goodmis.org>
Subject: [patch V3 34/44] x86/idt: Prepare for table based init
Date: Mon, 28 Aug 2017 08:47:49 +0200 [thread overview]
Message-ID: <20170828064958.849877032@linutronix.de> (raw)
In-Reply-To: 20170828064715.802987421@linutronix.de
[-- Attachment #1: x86-idt--Prepare-for-table-based-init.patch --]
[-- Type: text/plain, Size: 2518 bytes --]
The IDT setup code is handled in several places. All of them use variants
of set_intr_gate() inlines. This can be done with a table based
initialization, which allows to reduce the inline zoo and puts all IDT
related code and information into a single place.
Add the infrastructure.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
arch/x86/kernel/idt.c | 67 ++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 67 insertions(+)
--- a/arch/x86/kernel/idt.c
+++ b/arch/x86/kernel/idt.c
@@ -5,8 +5,49 @@
*/
#include <linux/interrupt.h>
+#include <asm/traps.h>
+#include <asm/proto.h>
#include <asm/desc.h>
+struct idt_data {
+ unsigned int vector;
+ unsigned int segment;
+ struct idt_bits bits;
+ const void *addr;
+};
+
+#define DPL0 0x0
+#define DPL3 0x3
+
+#define DEFAULT_STACK 0
+
+#define G(_vector, _addr, _ist, _type, _dpl, _segment) \
+ { \
+ .vector = _vector, \
+ .bits.ist = _ist, \
+ .bits.type = _type, \
+ .bits.dpl = _dpl, \
+ .bits.p = 1, \
+ .addr = _addr, \
+ .segment = _segment, \
+ }
+
+/* Interrupt gate */
+#define INTG(_vector, _addr) \
+ G(_vector, _addr, DEFAULT_STACK, GATE_INTERRUPT, DPL0, __KERNEL_CS)
+
+/* System interrupt gate */
+#define SYSG(_vector, _addr) \
+ G(_vector, _addr, DEFAULT_STACK, GATE_INTERRUPT, DPL3, __KERNEL_CS)
+
+/* Interrupt gate with interrupt stack */
+#define ISTG(_vector, _addr, _ist) \
+ G(_vector, _addr, _ist, GATE_INTERRUPT, DPL0, __KERNEL_CS)
+
+/* Task gate */
+#define TSKG(_vector, _gdt) \
+ G(_vector, NULL, DEFAULT_STACK, GATE_TASK, DPL0, _gdt << 3)
+
/* Must be page-aligned because the real IDT is used in a fixmap. */
gate_desc idt_table[IDT_ENTRIES] __page_aligned_bss;
@@ -25,6 +66,32 @@ const struct desc_ptr debug_idt_descr =
};
#endif
+static inline void idt_init_desc(gate_desc *gate, const struct idt_data *d)
+{
+ unsigned long addr = (unsigned long) d->addr;
+
+ gate->offset_low = (u16) addr;
+ gate->segment = (u16) d->segment;
+ gate->bits = d->bits;
+ gate->offset_middle = (u16) (addr >> 16);
+#ifdef CONFIG_X86_64
+ gate->offset_high = (u32) (addr >> 32);
+ gate->reserved = 0;
+#endif
+}
+
+static __init void
+idt_setup_from_table(gate_desc *idt, const struct idt_data *t, int size)
+{
+ gate_desc desc;
+
+ for (; size > 0; t++, size--) {
+ idt_init_desc(&desc, t);
+ set_bit(t->vector, used_vectors);
+ write_idt_entry(idt, t->vector, &desc);
+ }
+}
+
/**
* idt_setup_early_handler - Initializes the idt table with early handlers
*/
next prev parent reply other threads:[~2017-08-28 6:56 UTC|newest]
Thread overview: 95+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-28 6:47 [patch V3 00/44] x86: Cleanup IDT code Thomas Gleixner
2017-08-28 6:47 ` [patch V3 01/44] x86/irq: Remove vector_used_by_percpu_irq() Thomas Gleixner
2017-08-29 11:04 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 02/44] x86/irq: Unexport used_vectors Thomas Gleixner
2017-08-29 11:04 ` [tip:x86/apic] x86/irq: Unexport used_vectors[] tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 03/44] x86/irq: Get rid of the first_system_vector bogisity Thomas Gleixner
2017-08-29 11:04 ` [tip:x86/apic] x86/irq: Get rid of the 'first_system_vector' indirection bogosity tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 04/44] x86/irq: Remove duplicated used_vectors definition Thomas Gleixner
2017-08-29 11:05 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 05/44] x86/boot: Move EISA setup to a proper place Thomas Gleixner
2017-08-29 11:05 ` [tip:x86/apic] x86/boot: Move EISA setup to a separate file tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 06/44] x86/tracing: Introduce a static key for exception tracing Thomas Gleixner
2017-08-29 11:06 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 07/44] x86/traps: Simplify pagefault tracing logic Thomas Gleixner
2017-08-29 11:06 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 08/44] x86/apic: Remove the duplicated tracing version of local_timer_interrupt Thomas Gleixner
2017-08-29 11:07 ` [tip:x86/apic] x86/apic: Remove the duplicated tracing version of local_timer_interrupt() tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 09/44] x86/apic: Use this_cpu_ptr in local_timer_interrupt Thomas Gleixner
2017-08-29 11:07 ` [tip:x86/apic] x86/apic: Use this_cpu_ptr() in local_timer_interrupt() tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 10/44] x86/irq: Get rid of duplicated trace_x86_platform_ipi() code Thomas Gleixner
2017-08-29 11:07 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 11/44] x86/apic: Remove the duplicated tracing versions of interrupts Thomas Gleixner
2017-08-29 11:08 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 12/44] x86/irqwork: Get rid of duplicated tracing interrupt code Thomas Gleixner
2017-08-29 11:08 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 13/44] x86/mce: Remove " Thomas Gleixner
2017-08-29 11:08 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 14/44] x86/smp: Remove pointless duplicated " Thomas Gleixner
2017-08-29 11:09 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 15/44] x86/smp: Use static key for reschedule interrupt tracing Thomas Gleixner
2017-08-29 11:09 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 16/44] x86/idt: Remove tracing idt completely Thomas Gleixner
2017-08-29 11:10 ` [tip:x86/apic] x86/idt: Remove the tracing IDT completely tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 17/44] x86/idt: Cleanup the i386 low level entry macros Thomas Gleixner
2017-08-29 11:10 ` [tip:x86/apic] x86/idt: Clean up " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 18/44] x86/tracing: Disentangle pagefault and resched IPI tracing key Thomas Gleixner
2017-08-29 11:10 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 19/44] x86/ipi: Make platform IPI depend on APIC Thomas Gleixner
2017-08-29 11:11 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 20/44] x86/irq_work: Make it " Thomas Gleixner
2017-08-29 11:11 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 21/44] x86/tracing: Build tracepoints only when they are used Thomas Gleixner
2017-08-29 11:12 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 22/44] x86/idt: Unify gate_struct handling for 32/64bit Thomas Gleixner
2017-08-29 11:12 ` [tip:x86/apic] x86/idt: Unify gate_struct handling for 32/64-bit kernels tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 23/44] x86/percpu: Use static initializer for GDT entry Thomas Gleixner
2017-08-29 11:13 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 24/44] x86/fpu: Use bitfield accessors for desc_struct Thomas Gleixner
2017-08-29 11:13 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 25/44] x86: Replace access to desc_struct:a/b fields Thomas Gleixner
2017-08-29 11:13 ` [tip:x86/apic] x86/asm: " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 26/44] x86/gdt: Use bitfields for initialization Thomas Gleixner
2017-08-29 11:14 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 27/44] x86/ldttss: Cleanup 32bit descriptors Thomas Gleixner
2017-08-29 11:14 ` [tip:x86/apic] x86/ldttss: Clean up 32-bit descriptors tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 28/44] x86/idt: Create file for IDT related code Thomas Gleixner
2017-08-29 11:15 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 29/44] x86/idt: Move 32bit idt_descr to C code Thomas Gleixner
2017-08-29 11:15 ` [tip:x86/apic] x86/idt: Move 32-bit " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 30/44] x86/idt: Remove unused set_trap_gate() Thomas Gleixner
2017-08-29 11:16 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 31/44] x86/idt: Consolidate IDT invalidation Thomas Gleixner
2017-08-29 11:16 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 32/44] x86/idt: Move early IDT handler setup to IDT code Thomas Gleixner
2017-08-29 11:16 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 33/44] x86/idt: Move early IDT setup out of 32bit asm Thomas Gleixner
2017-08-29 11:17 ` [tip:x86/apic] x86/idt: Move early IDT setup out of 32-bit asm tip-bot for Thomas Gleixner
2017-08-28 6:47 ` Thomas Gleixner [this message]
2017-08-29 11:17 ` [tip:x86/apic] x86/idt: Prepare for table based init tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 35/44] x86/idt: Switch early trap init to IDT tables Thomas Gleixner
2017-08-29 11:18 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 36/44] x86/idt: Move debug stack init to table based Thomas Gleixner
2017-08-29 11:18 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 37/44] x86/idt: Move ist stack based traps to table init Thomas Gleixner
2017-08-29 11:18 ` [tip:x86/apic] x86/idt: Move IST " tip-bot for Thomas Gleixner
2017-09-01 6:28 ` Andrei Vagin
2017-09-01 8:26 ` [PATCH] x86/idt: Fix the X86_TRAP_BP gate Ingo Molnar
2017-09-01 8:59 ` Thomas Gleixner
2017-09-01 9:09 ` [tip:x86/apic] " tip-bot for Ingo Molnar
2017-09-01 14:39 ` [PATCH] " Andrei Vagin
2017-08-28 6:47 ` [patch V3 38/44] x86/idt: Move regular trap init to tables Thomas Gleixner
2017-08-29 11:19 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 39/44] x86/idt: Move APIC gate initialization " Thomas Gleixner
2017-08-29 11:19 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 40/44] x86/idt: Move interrupt gate initialization to IDT code Thomas Gleixner
2017-08-29 11:20 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 41/44] x86/idt: Remove unused functions/inlines Thomas Gleixner
2017-08-29 11:20 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 42/44] x86/idt: Deinline setup functions Thomas Gleixner
2017-08-29 11:20 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 43/44] x86/idt: Simplify alloc_intr_gate Thomas Gleixner
2017-08-28 14:35 ` KY Srinivasan
2017-08-29 11:21 ` [tip:x86/apic] x86/idt: Simplify alloc_intr_gate() tip-bot for Thomas Gleixner
2017-08-28 6:47 ` [patch V3 44/44] x86/idt: Hide set_intr_gate() Thomas Gleixner
2017-08-29 11:21 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20170828064958.849877032@linutronix.de \
--to=tglx@linutronix.de \
--cc=bp@alien8.de \
--cc=hpa@zytor.com \
--cc=linux-kernel@vger.kernel.org \
--cc=luto@kernel.org \
--cc=mingo@kernel.org \
--cc=peterz@infradead.org \
--cc=rostedt@goodmis.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).