From: Borislav Petkov <bp@suse.de>
To: Andy Lutomirski <luto@kernel.org>
Cc: X86 ML <x86@kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Linus Torvalds <torvalds@linux-foundation.org>
Subject: Re: [PATCH 1/2] x86/mm: Reinitialize TLB state on hotplug and resume
Date: Thu, 7 Sep 2017 11:54:37 +0200 [thread overview]
Message-ID: <20170907095437.fs53v7w4smhsbd6m@pd.tnic> (raw)
In-Reply-To: <f13c8e8c58ba3b535f1e4cb9e62b50ab37dd69bb.1504752689.git.luto@kernel.org>
Just nitpicks:
On Wed, Sep 06, 2017 at 07:54:53PM -0700, Andy Lutomirski wrote:
> When Linux brings a CPU down and back up, it switches to init_mm and then
> loads swapper_pg_dir into CR3. With PCID enabled, this has the side effect
> of masking off the ASID bits in CR3.
>
> This can result in some confusion in the TLB handling code. If we
> bring a CPU down and back up with any ASID other than 0, we end up
> with the wrong ASID active on the CPU after resume. This could
> cause our internal state to become corrupt, although major
> corruption is unlikely because init_mm doesn't have any user pages.
> More obviously, if CONFIG_DEBUG_VM=y, we'll trip over an assertion
> in the next context switch. The result of *that* is a failure to
> resume from suspend with probability 1 - 1/6^(cpus-1).
>
> Fix it by reinitializing cpu_tlbstate on resume and CPU bringup.
>
> Reported-by: Linus Torvalds <torvalds@linux-foundation.org>
> Reported-by: Jiri Kosina <jikos@kernel.org>
> Fixes: 10af6235e0d3 ("x86/mm: Implement PCID based optimization: try to preserve old TLB entries using PCID")
> Signed-off-by: Andy Lutomirski <luto@kernel.org>
> ---
> arch/x86/include/asm/tlbflush.h | 2 ++
> arch/x86/kernel/cpu/common.c | 2 ++
> arch/x86/mm/tlb.c | 44 +++++++++++++++++++++++++++++++++++++++++
> arch/x86/power/cpu.c | 1 +
> 4 files changed, 49 insertions(+)
>
> diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
> index d23e61dc0640..4893abf7f74f 100644
> --- a/arch/x86/include/asm/tlbflush.h
> +++ b/arch/x86/include/asm/tlbflush.h
> @@ -198,6 +198,8 @@ static inline void cr4_set_bits_and_update_boot(unsigned long mask)
> cr4_set_bits(mask);
> }
>
> +extern void initialize_tlbstate_and_flush(void);
Let's put that declaration at the end.
> static inline void __native_flush_tlb(void)
> {
> /*
> diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
> index efba8e3da3e2..40cb4d0a5982 100644
> --- a/arch/x86/kernel/cpu/common.c
> +++ b/arch/x86/kernel/cpu/common.c
> @@ -1583,6 +1583,7 @@ void cpu_init(void)
> mmgrab(&init_mm);
> me->active_mm = &init_mm;
> BUG_ON(me->mm);
> + initialize_tlbstate_and_flush();
> enter_lazy_tlb(&init_mm, me);
>
> load_sp0(t, ¤t->thread);
> @@ -1637,6 +1638,7 @@ void cpu_init(void)
> mmgrab(&init_mm);
> curr->active_mm = &init_mm;
> BUG_ON(curr->mm);
> + initialize_tlbstate_and_flush();
> enter_lazy_tlb(&init_mm, curr);
>
> load_sp0(t, thread);
> diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
> index ce104b962a17..dbbcfd59726a 100644
> --- a/arch/x86/mm/tlb.c
> +++ b/arch/x86/mm/tlb.c
> @@ -214,6 +214,50 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
> }
>
> /*
> + * Call this when reinitializing a CPU. It fixes the following potential
> + * problems:
> + *
> + * - The ASID changed from what cpu_tlbstate thinks it is (most likely
> + * because the CPU was taken down and came back up with CR3's PCID
> + * bits clear. CPU hotplug can do this.
> + *
> + * - The TLB contains junk in slots corresponding to inactive ASIDs.
> + *
> + * - The CPU went so far out to lunch that it may have missed a TLB
> + * flush.
> + */
> +void initialize_tlbstate_and_flush(void)
I think we should prefix all those visible, TLB-handling functions with
"tlb_". So you'd have tlb_init_state_and_flush().
--
Regards/Gruss,
Boris.
SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg)
--
next prev parent reply other threads:[~2017-09-07 9:54 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-07 2:54 [PATCH 0/2] Fix resume failure due to PCID Andy Lutomirski
2017-09-07 2:54 ` [PATCH 1/2] x86/mm: Reinitialize TLB state on hotplug and resume Andy Lutomirski
2017-09-07 7:01 ` [PATCH] mm/debug: Change BUG_ON() crashes to survivable WARN_ON() warnings Ingo Molnar
2017-09-07 20:50 ` Linus Torvalds
2017-09-07 7:31 ` [PATCH 1/2] x86/mm: Reinitialize TLB state on hotplug and resume Jiri Kosina
2017-09-07 7:48 ` Ingo Molnar
2017-09-07 19:55 ` Jiri Kosina
2017-09-08 1:23 ` Andy Lutomirski
2017-09-07 9:54 ` Borislav Petkov [this message]
2017-09-07 9:59 ` Ingo Molnar
2017-09-07 10:10 ` Borislav Petkov
2017-09-07 2:54 ` [PATCH 2/2] x86/mm: Document how CR4.PCIDE restore works Andy Lutomirski
2017-09-07 3:25 ` [PATCH 0/2] Fix resume failure due to PCID Linus Torvalds
2017-09-07 4:15 ` Andy Lutomirski
2017-09-15 6:59 ` x60: warnings on boot and resume, arch/x86/mm/tlb.c:257 initialize_ ... was " Pavel Machek
2017-09-15 8:39 ` Ingo Molnar
2017-09-15 9:16 ` Pavel Machek
2017-09-15 9:35 ` Ingo Molnar
2017-09-15 10:22 ` [4.14-rc0 regression] " Pavel Machek
2017-09-15 18:47 ` Linus Torvalds
2017-09-15 19:29 ` Andy Lutomirski
2017-09-15 21:06 ` Andy Lutomirski
2017-09-07 8:59 ` Borislav Petkov
2017-09-15 11:01 ` Pavel Machek
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