From: Jacob Pan <jacob.jun.pan@linux.intel.com>
To: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
Cc: "iommu@lists.linux-foundation.org"
<iommu@lists.linux-foundation.org>,
LKML <linux-kernel@vger.kernel.org>,
Joerg Roedel <joro@8bytes.org>,
David Woodhouse <dwmw2@infradead.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Rafael Wysocki <rafael.j.wysocki@intel.com>,
"Liu, Yi L" <yi.l.liu@intel.com>,
Lan Tianyu <tianyu.lan@intel.com>,
"Tian, Kevin" <kevin.tian@intel.com>,
Raj Ashok <ashok.raj@intel.com>,
Alex Williamson <alex.williamson@redhat.com>,
Yi L <yi.l.liu@linux.intel.com>,
jacob.jun.pan@linux.intel.com
Subject: Re: [PATCH v2 01/16] iommu: introduce bind_pasid_table API function
Date: Tue, 10 Oct 2017 14:42:18 -0700 [thread overview]
Message-ID: <20171010144218.735d1f58@jacob-builder> (raw)
In-Reply-To: <59945b24-ace9-f0c1-d68d-ccd929e1fe28@arm.com>
On Tue, 10 Oct 2017 17:45:53 +0100
Jean-Philippe Brucker <jean-philippe.brucker@arm.com> wrote:
> On 06/10/17 00:03, Jacob Pan wrote:
> > Virtual IOMMU was proposed to support Shared Virtual Memory (SVM)
> > use in the guest:
> > https://lists.gnu.org/archive/html/qemu-devel/2016-11/msg05311.html
> >
> > As part of the proposed architecture, when an SVM capable PCI
> > device is assigned to a guest, nested mode is turned on. Guest owns
> > the first level page tables (request with PASID) which performs
> > GVA->GPA translation. Second level page tables are owned by the
> > host for GPA->HPA translation for both request with and without
> > PASID.
> >
> > A new IOMMU driver interface is therefore needed to perform tasks as
> > follows:
> > * Enable nested translation and appropriate translation type
> > * Assign guest PASID table pointer (in GPA) and size to host IOMMU
> >
> > This patch introduces new API functions to perform bind/unbind
> > guest PASID tables. Based on common data, model specific IOMMU
> > drivers can be extended to perform the specific steps for binding
> > pasid table of assigned devices.
> >
> > Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
> > Signed-off-by: Liu, Yi L <yi.l.liu@linux.intel.com>
> > Signed-off-by: Ashok Raj <ashok.raj@intel.com>
> > ---
> > drivers/iommu/iommu.c | 19 ++++++++++++++++
> > include/linux/iommu.h | 25 +++++++++++++++++++++
> > include/uapi/linux/iommu.h | 55
> > ++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 99
> > insertions(+) create mode 100644 include/uapi/linux/iommu.h
> >
> > diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
> > index 3de5c0b..761cf50 100644
> > --- a/drivers/iommu/iommu.c
> > +++ b/drivers/iommu/iommu.c
> > @@ -1322,6 +1322,25 @@ int iommu_attach_device(struct iommu_domain
> > *domain, struct device *dev) }
> > EXPORT_SYMBOL_GPL(iommu_attach_device);
> >
> > +int iommu_bind_pasid_table(struct iommu_domain *domain, struct
> > device *dev,
> > + struct pasid_table_config *pasidt_binfo)
> > +{
> > + if (unlikely(!domain->ops->bind_pasid_table))
> > + return -ENODEV;
> > +
> > + return domain->ops->bind_pasid_table(domain, dev,
> > pasidt_binfo); +}
> > +EXPORT_SYMBOL_GPL(iommu_bind_pasid_table);
> > +
> > +int iommu_unbind_pasid_table(struct iommu_domain *domain, struct
> > device *dev) +{
> > + if (unlikely(!domain->ops->unbind_pasid_table))
> > + return -EINVAL;
> > +
> > + return domain->ops->unbind_pasid_table(domain, dev);
> > +}
> > +EXPORT_SYMBOL_GPL(iommu_unbind_pasid_table);
> > +
> > static void __iommu_detach_device(struct iommu_domain *domain,
> > struct device *dev)
> > {
> > diff --git a/include/linux/iommu.h b/include/linux/iommu.h
> > index 41b8c57..672cc06 100644
> > --- a/include/linux/iommu.h
> > +++ b/include/linux/iommu.h
> > @@ -25,6 +25,7 @@
> > #include <linux/errno.h>
> > #include <linux/err.h>
> > #include <linux/of.h>
> > +#include <uapi/linux/iommu.h>
> >
> > #define IOMMU_READ (1 << 0)
> > #define IOMMU_WRITE (1 << 1)
> > @@ -187,6 +188,8 @@ struct iommu_resv_region {
> > * @domain_get_windows: Return the number of windows for a domain
> > * @of_xlate: add OF master IDs to iommu grouping
> > * @pgsize_bitmap: bitmap of all possible supported page sizes
> > + * @bind_pasid_table: bind pasid table pointer for guest SVM
> > + * @unbind_pasid_table: unbind pasid table pointer and restore
> > defaults */
> > struct iommu_ops {
> > bool (*capable)(enum iommu_cap);
> > @@ -233,8 +236,14 @@ struct iommu_ops {
> > u32 (*domain_get_windows)(struct iommu_domain *domain);
> >
> > int (*of_xlate)(struct device *dev, struct of_phandle_args
> > *args);
> > +
>
> (whitespace change)
will fix, thanks
>
> > bool (*is_attach_deferred)(struct iommu_domain *domain,
> > struct device *dev);
> > + int (*bind_pasid_table)(struct iommu_domain *domain,
> > struct device *dev,
> > + struct pasid_table_config
> > *pasidt_binfo);
> > + int (*unbind_pasid_table)(struct iommu_domain *domain,
> > + struct device *dev);
> > +
> > unsigned long pgsize_bitmap;
> > };
> >
> > @@ -296,6 +305,10 @@ extern int iommu_attach_device(struct
> > iommu_domain *domain, struct device *dev);
> > extern void iommu_detach_device(struct iommu_domain *domain,
> > struct device *dev);
> > +extern int iommu_bind_pasid_table(struct iommu_domain *domain,
> > + struct device *dev, struct pasid_table_config
> > *pasidt_binfo); +extern int iommu_unbind_pasid_table(struct
> > iommu_domain *domain,
> > + struct device *dev);
> > extern struct iommu_domain *iommu_get_domain_for_dev(struct device
> > *dev); extern int iommu_map(struct iommu_domain *domain, unsigned
> > long iova, phys_addr_t paddr, size_t size, int prot);
> > @@ -696,6 +709,18 @@ const struct iommu_ops
> > *iommu_ops_from_fwnode(struct fwnode_handle *fwnode) return NULL;
> > }
> >
> > +static inline
> > +int iommu_bind_pasid_table(struct iommu_domain *domain, struct
> > device *dev,
> > + struct pasid_table_config *pasidt_binfo)
> > +{
> > + return -EINVAL;
> > +}
> > +static inline
> > +int iommu_unbind_pasid_table(struct iommu_domain *domain, struct
> > device *dev) +{
> > + return -EINVAL;
> > +}
> > +
> > #endif /* CONFIG_IOMMU_API */
> >
> > #endif /* __LINUX_IOMMU_H */
> > diff --git a/include/uapi/linux/iommu.h b/include/uapi/linux/iommu.h
> > new file mode 100644
> > index 0000000..aeeaf0e
> > --- /dev/null
> > +++ b/include/uapi/linux/iommu.h
> > @@ -0,0 +1,55 @@
> > +/*
> > + * IOMMU user API definitions
> > + *
> > + *
> > + * This program is free software; you can redistribute it and/or
> > modify
> > + * it under the terms of the GNU General Public License version 2
> > as
> > + * published by the Free Software Foundation.
> > + */
> > +
> > +#ifndef _UAPI_IOMMU_H
> > +#define _UAPI_IOMMU_H
> > +
> > +#include <linux/types.h>
> > +
> > +enum pasid_table_model {
> > + PASID_TABLE_FORMAT_HOST,
> > + PASID_TABLE_FORMAT_ARM_1LVL,
> > + PASID_TABLE_FORMAT_ARM_2LVL,
>
> Maybe remove the ARM values and struct for the moment, I'm still not
> sure how to implement it. I think this should be a single ARM_SMMUV3
> model (2LVL might correspond to two different formats in SMMUv3, and
> a future SMMU version could still have 1- or 2-level PASID table but
> incompatible format).
>
will do, remove the model info is fine for Intel, I guess AMD also?
> > + PASID_TABLE_FORMAT_AMD,
> > + PASID_TABLE_FORMAT_INTEL,
> > +};
> > +
> > +/**
> > + * PASID table data used to bind guest PASID table to the host
> > IOMMU. This will
> > + * enable guest managed first level page tables.
> > + * @version: for future extensions and identification of the data
> > format
> > + * @bytes: size of this structure
> > + * @base_ptr: PASID table pointer
> > + * @pasid_bits: number of bits supported in the guest PASID
> > table, must be less
> > + * or equal than the host table size.
>
> "host table size" is a bit confusing in this context, especially if
> using multi-level tables. Perhaps it's clear enough that @pasid_bits
> must be smaller or equal than the PASID size supported by the IOMMU,
> and we can remove that second part?
>
Not sure what is the second part?
> Thanks,
> Jean
>
> > + * @model: PASID table format for different IOMMU models
> > + */
> > +struct pasid_table_config {
> > + __u32 version;
> > + __u32 bytes;
> > + __u64 base_ptr;
> > + __u8 pasid_bits;
> > + enum pasid_table_model model;
> > + union {
> > + struct {
> > + /* Intel specific fields */
> > + } intel;
> > +
> > + struct {
> > + /* ARM specific fields */
> > + bool pasid0_dma_no_pasid;
> > + } arm;
> > +
> > + struct {
> > + /* AMD specific fields */
> > + } amd;
> > + };
> > +};
> > +
> > +#endif /* _UAPI_IOMMU_H */
> >
>
[Jacob Pan]
next prev parent reply other threads:[~2017-10-10 21:39 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-05 23:03 [PATCH v2 00/16] IOMMU driver support for SVM virtualization Jacob Pan
2017-10-05 23:03 ` [PATCH v2 01/16] iommu: introduce bind_pasid_table API function Jacob Pan
2017-10-10 13:14 ` Joerg Roedel
2017-10-10 21:32 ` Jacob Pan
2017-10-10 16:45 ` Jean-Philippe Brucker
2017-10-10 21:42 ` Jacob Pan [this message]
2017-10-11 9:17 ` Jean-Philippe Brucker
2017-10-05 23:03 ` [PATCH v2 02/16] iommu/vt-d: add bind_pasid_table function Jacob Pan
2017-10-10 13:21 ` Joerg Roedel
2017-10-12 11:12 ` Liu, Yi L
2017-10-12 17:38 ` Jacob Pan
2017-10-05 23:03 ` [PATCH v2 03/16] iommu: introduce iommu invalidate API function Jacob Pan
2017-10-10 13:35 ` Joerg Roedel
2017-10-10 22:09 ` Jacob Pan
2017-10-11 7:54 ` Liu, Yi L
2017-10-11 9:51 ` Joerg Roedel
2017-10-11 11:54 ` Liu, Yi L
2017-10-11 12:15 ` Joerg Roedel
2017-10-11 12:48 ` Jean-Philippe Brucker
2017-10-12 7:43 ` Joerg Roedel
2017-10-12 9:38 ` Bob Liu
2017-10-12 9:50 ` Liu, Yi L
2017-10-12 10:07 ` Bob Liu
2017-10-12 10:26 ` Jean-Philippe Brucker
2017-10-12 10:33 ` Liu, Yi L
2017-10-05 23:03 ` [PATCH v2 04/16] iommu/vt-d: support flushing more TLB types Jacob Pan
2017-10-26 13:02 ` [v2,04/16] " Lukoshkov, Maksim
2017-10-31 20:39 ` Jacob Pan
2017-10-05 23:03 ` [PATCH v2 05/16] iommu/vt-d: add iommu invalidate function Jacob Pan
2017-10-05 23:03 ` [PATCH v2 06/16] iommu/vt-d: move device_domain_info to header Jacob Pan
2017-10-05 23:03 ` [PATCH v2 07/16] iommu/vt-d: assign PFSID in device TLB invalidation Jacob Pan
2017-10-05 23:03 ` [PATCH v2 08/16] iommu: introduce device fault data Jacob Pan
2017-10-10 19:29 ` Jean-Philippe Brucker
2017-10-10 21:43 ` Jacob Pan
2017-10-20 10:07 ` Liu, Yi L
2017-11-06 19:01 ` Jean-Philippe Brucker
2017-11-07 8:40 ` Liu, Yi L
2017-11-07 11:38 ` Jean-Philippe Brucker
2017-11-09 19:36 ` Jacob Pan
2017-11-10 13:54 ` Jean-Philippe Brucker
2017-11-10 22:18 ` Jacob Pan
2017-11-13 13:06 ` Jean-Philippe Brucker
2017-11-13 16:57 ` Jacob Pan
2017-11-13 17:23 ` Jean-Philippe Brucker
2017-11-11 0:00 ` Jacob Pan
2017-11-13 13:19 ` Jean-Philippe Brucker
2017-11-13 16:12 ` Jacob Pan
2017-10-05 23:03 ` [PATCH v2 09/16] driver core: add iommu device fault reporting data Jacob Pan
2017-10-06 5:43 ` Greg Kroah-Hartman
2017-10-06 7:11 ` Christoph Hellwig
2017-10-06 8:26 ` Greg Kroah-Hartman
2017-10-06 8:39 ` Joerg Roedel
2017-10-06 16:22 ` Jacob Pan
2017-10-05 23:03 ` [PATCH v2 10/16] iommu: introduce device fault report API Jacob Pan
2017-10-06 9:36 ` Jean-Philippe Brucker
2017-10-09 18:50 ` Jacob Pan
2017-10-10 13:40 ` Joerg Roedel
2017-10-11 17:21 ` Jacob Pan
2017-10-05 23:03 ` [PATCH v2 11/16] iommu/vt-d: use threaded irq for dmar_fault Jacob Pan
2017-10-05 23:03 ` [PATCH v2 12/16] iommu/vt-d: report unrecoverable device faults Jacob Pan
2017-10-05 23:03 ` [PATCH v2 13/16] iommu/intel-svm: notify page request to guest Jacob Pan
2017-10-05 23:03 ` [PATCH v2 14/16] iommu/intel-svm: replace dev ops with fault report API Jacob Pan
2017-10-05 23:03 ` [PATCH v2 15/16] iommu: introduce page response function Jacob Pan
2017-10-05 23:03 ` [PATCH v2 16/16] iommu/vt-d: add intel iommu " Jacob Pan
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