From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752918AbdJTIxe (ORCPT ); Fri, 20 Oct 2017 04:53:34 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:9007 "EHLO szxga05-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752264AbdJTIxX (ORCPT ); Fri, 20 Oct 2017 04:53:23 -0400 From: Li Wei To: , , , , , , , , , , , , , , , , , , , , CC: , , , , Subject: [PATCH v5 3/5] arm64: dts: add ufs dts node Date: Fri, 20 Oct 2017 16:52:57 +0800 Message-ID: <20171020085259.8093-4-liwei213@huawei.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171020085259.8093-1-liwei213@huawei.com> References: <20171020085259.8093-1-liwei213@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [100.107.89.192] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020203.59E9B97A.00A3,ss=1,re=0.000,recu=0.000,reip=0.000,cl=1,cld=1,fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: d48a1609a52689ea997a3a2e901567ec Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org arm64: dts: add ufs node for Hisilicon. Signed-off-by: Li Wei --- arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 5 +++++ arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 19 +++++++++++++++++++ 2 files changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index fd4705c451e2..677d0e41667f 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -276,3 +276,8 @@ interrupts = <3 IRQ_TYPE_EDGE_RISING>; }; }; + +&ufs { + reset-gpios = <&gpio18 1 0>; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index b7a90d632959..a24ab8472347 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -978,5 +978,24 @@ clocks = <&crg_ctrl HI3660_OSC32K>; clock-names = "apb_pclk"; }; + + ufs: ufs@ff3b0000 { + compatible = "hisilicon,hi3660-ufs", "jedec,ufs-1.1"; + /* 0: HCI standard */ + /* 1: UFS SYS CTRL */ + reg = <0x0 0xff3b0000 0x0 0x1000>, + <0x0 0xff3b1000 0x0 0x1000>; + interrupt-parent = <&gic>; + interrupts = ; + clocks = <&crg_ctrl HI3660_CLK_GATE_UFSIO_REF>, + <&crg_ctrl HI3660_CLK_GATE_UFSPHY_CFG>; + clock-names = "clk_ref", "clk_phy"; + freq-table-hz = <0 0>, <0 0>; + /* offset: 0x84; bit: 12 */ + /* offset: 0x84; bit: 7 */ + resets = <&crg_rst 0x84 12>, + <&crg_rst 0x84 7>; + reset-names = "rst", "assert"; + }; }; }; -- 2.11.0