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From: Jernej Skrabec <jernej.skrabec@siol.net>
To: maxime.ripard@free-electrons.com
Cc: wens@csie.org, airlied@linux.ie, linux-kernel@vger.kernel.org,
	dri-devel@lists.freedesktop.org,
	linux-arm-kernel@lists.infradead.org, icenowy@aosc.io,
	linux-sunxi@googlegroups.com
Subject: [PATCH 11/17] drm/sun4i: Wire in DE2 scaler support
Date: Mon, 27 Nov 2017 21:57:44 +0100	[thread overview]
Message-ID: <20171127205750.19277-12-jernej.skrabec@siol.net> (raw)
In-Reply-To: <20171127205750.19277-1-jernej.skrabec@siol.net>

Calculate scaling parameters and call appropriate scaler set up
function.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
---
 drivers/gpu/drm/sun4i/sun8i_layer.c |  12 +++-
 drivers/gpu/drm/sun4i/sun8i_mixer.c | 115 +++++++++++++++++++++++++-----------
 drivers/gpu/drm/sun4i/sun8i_mixer.h |   4 --
 3 files changed, 90 insertions(+), 41 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun8i_layer.c b/drivers/gpu/drm/sun4i/sun8i_layer.c
index e1b6ad82145e..6860271e5415 100644
--- a/drivers/gpu/drm/sun4i/sun8i_layer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_layer.c
@@ -25,8 +25,11 @@
 static int sun8i_mixer_layer_atomic_check(struct drm_plane *plane,
 					  struct drm_plane_state *state)
 {
+	struct sun8i_layer *layer = plane_to_sun8i_layer(plane);
 	struct drm_crtc *crtc = state->crtc;
 	struct drm_crtc_state *crtc_state;
+	int min_scale, max_scale;
+	bool scaler_supported;
 	struct drm_rect clip;
 
 	if (!crtc)
@@ -41,9 +44,14 @@ static int sun8i_mixer_layer_atomic_check(struct drm_plane *plane,
 	clip.x2 = crtc_state->adjusted_mode.hdisplay;
 	clip.y2 = crtc_state->adjusted_mode.vdisplay;
 
+	scaler_supported = !!(layer->mixer->cfg->scaler_mask & BIT(layer->id));
+
+	min_scale = scaler_supported ? 1 : DRM_PLANE_HELPER_NO_SCALING;
+	max_scale = scaler_supported ? (1UL << 20) - 1 :
+				       DRM_PLANE_HELPER_NO_SCALING;
+
 	return drm_plane_helper_check_state(state, &clip,
-					    DRM_PLANE_HELPER_NO_SCALING,
-					    DRM_PLANE_HELPER_NO_SCALING,
+					    min_scale, max_scale,
 					    true, true);
 }
 
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c
index 291dd8806444..7c9c87a0535b 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
@@ -28,6 +28,7 @@
 #include "sun8i_mixer.h"
 #include "sun8i_layer.h"
 #include "sunxi_engine.h"
+#include "sun8i_scaler.h"
 
 struct de2_fmt_info {
 	u32 drm_fmt;
@@ -194,29 +195,34 @@ int sun8i_mixer_update_ui_layer_coord(struct sun8i_mixer *mixer,
 				      int layer, struct drm_plane *plane)
 {
 	struct drm_plane_state *state = plane->state;
-	u32 width, height, size;
+	u32 src_w, src_h, dst_w, dst_h;
+	u32 outsize, insize;
+	u32 hphase, vphase;
 
-	DRM_DEBUG_DRIVER("Updating layer %d\n", layer);
+	DRM_DEBUG_DRIVER("Updating UI layer %d\n", layer);
 
-	/*
-	 * Same source and destination width and height are guaranteed
-	 * by atomic check function.
-	 */
-	width = drm_rect_width(&state->dst);
-	height = drm_rect_height(&state->dst);
-	size = SUN8I_MIXER_SIZE(width, height);
+	src_w = drm_rect_width(&state->src) >> 16;
+	src_h = drm_rect_height(&state->src) >> 16;
+	dst_w = drm_rect_width(&state->dst);
+	dst_h = drm_rect_height(&state->dst);
+
+	hphase = state->src.x1 & 0xffff;
+	vphase = state->src.y1 & 0xffff;
+
+	insize = SUN8I_MIXER_SIZE(src_w, src_h);
+	outsize = SUN8I_MIXER_SIZE(dst_w, dst_h);
 
 	if (plane->type == DRM_PLANE_TYPE_PRIMARY) {
 		bool interlaced = false;
 		u32 val;
 
 		DRM_DEBUG_DRIVER("Primary layer, updating global size W: %u H: %u\n",
-				 width, height);
+				 dst_w, dst_h);
 		regmap_write(mixer->engine.regs,
 			     SUN8I_MIXER_GLOBAL_SIZE,
-			     size);
+			     outsize);
 		regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_OUTSIZE,
-			     size);
+			     outsize);
 
 		if (state->crtc)
 			interlaced = state->crtc->state->adjusted_mode.flags
@@ -237,23 +243,40 @@ int sun8i_mixer_update_ui_layer_coord(struct sun8i_mixer *mixer,
 	}
 
 	/* Set height and width */
-	DRM_DEBUG_DRIVER("Layer size W: %u H: %u\n", width, height);
+	DRM_DEBUG_DRIVER("Layer source offset X: %d Y: %d\n",
+			 state->src.x1 >> 16, state->src.y1 >> 16);
+	DRM_DEBUG_DRIVER("Layer source size W: %d H: %d\n", src_w, src_h);
 	regmap_write(mixer->engine.regs,
-		     SUN8I_MIXER_CHAN_UI_LAYER_SIZE(layer, 0),
-		     size);
+		     SUN8I_MIXER_CHAN_UI_LAYER_SIZE(layer, 0), insize);
 	regmap_write(mixer->engine.regs,
-		     SUN8I_MIXER_CHAN_UI_OVL_SIZE(layer),
-		     size);
+		     SUN8I_MIXER_CHAN_UI_OVL_SIZE(layer), insize);
+
+	if (insize != outsize || hphase || vphase) {
+		u32 hscale, vscale;
+
+		DRM_DEBUG_DRIVER("HW scaling is enabled\n");
+
+		hscale = state->src_w / state->crtc_w;
+		vscale = state->src_h / state->crtc_h;
+
+		sun8i_scaler_gsu_setup(mixer, layer, src_w, src_h, dst_w, dst_h,
+				       hscale, vscale, hphase, vphase);
+		sun8i_scaler_gsu_enable(mixer, layer, true);
+	} else {
+		DRM_DEBUG_DRIVER("HW scaling is not needed\n");
+		sun8i_scaler_gsu_enable(mixer, layer, false);
+	}
 
 	/* Set base coordinates */
-	DRM_DEBUG_DRIVER("Layer coordinates X: %d Y: %d\n",
+	DRM_DEBUG_DRIVER("Layer destination coordinates X: %d Y: %d\n",
 			 state->dst.x1, state->dst.y1);
+	DRM_DEBUG_DRIVER("Layer destination size W: %d H: %d\n", dst_w, dst_h);
 	regmap_write(mixer->engine.regs,
 		     SUN8I_MIXER_BLEND_ATTR_COORD(layer),
 		     SUN8I_MIXER_COORD(state->dst.x1, state->dst.y1));
 	regmap_write(mixer->engine.regs,
 		     SUN8I_MIXER_BLEND_ATTR_INSIZE(layer),
-		     size);
+		     outsize);
 
 	return 0;
 }
@@ -262,36 +285,58 @@ int sun8i_mixer_update_vi_layer_coord(struct sun8i_mixer *mixer,
 				      int layer, struct drm_plane *plane)
 {
 	struct drm_plane_state *state = plane->state;
-	u32 width, height, size;
+	u32 src_w, src_h, dst_w, dst_h;
+	u32 outsize, insize;
+	u32 hphase, vphase;
 
-	DRM_DEBUG_DRIVER("Updating layer %d\n", layer);
+	DRM_DEBUG_DRIVER("Updating VI layer %d\n", layer);
 
-	/*
-	 * Same source and destination width and height are guaranteed
-	 * by atomic check function.
-	 */
-	width = drm_rect_width(&state->dst);
-	height = drm_rect_height(&state->dst);
-	size = SUN8I_MIXER_SIZE(width, height);
+	src_w = drm_rect_width(&state->src) >> 16;
+	src_h = drm_rect_height(&state->src) >> 16;
+	dst_w = drm_rect_width(&state->dst);
+	dst_h = drm_rect_height(&state->dst);
+
+	hphase = state->src.x1 & 0xffff;
+	vphase = state->src.y1 & 0xffff;
+
+	insize = SUN8I_MIXER_SIZE(src_w, src_h);
+	outsize = SUN8I_MIXER_SIZE(dst_w, dst_h);
 
 	/* Set height and width */
-	DRM_DEBUG_DRIVER("Layer size W: %u H: %u\n", width, height);
+	DRM_DEBUG_DRIVER("Layer source offset X: %d Y: %d\n",
+			 state->src.x1 >> 16, state->src.y1 >> 16);
+	DRM_DEBUG_DRIVER("Layer source size W: %d H: %d\n", src_w, src_h);
 	regmap_write(mixer->engine.regs,
-		     SUN8I_MIXER_CHAN_VI_LAYER_SIZE(layer, 0),
-		     size);
+		     SUN8I_MIXER_CHAN_VI_LAYER_SIZE(layer, 0), insize);
 	regmap_write(mixer->engine.regs,
-		     SUN8I_MIXER_CHAN_VI_OVL_SIZE(layer),
-		     size);
+		     SUN8I_MIXER_CHAN_VI_OVL_SIZE(layer), insize);
+
+	if (insize != outsize || hphase || vphase) {
+		u32 hscale, vscale;
+
+		DRM_DEBUG_DRIVER("HW scaling is enabled\n");
+
+		hscale = state->src_w / state->crtc_w;
+		vscale = state->src_h / state->crtc_h;
+
+		sun8i_scaler_vsu_setup(mixer, layer, src_w, src_h, dst_w, dst_h,
+				       hscale, vscale, hphase, vphase);
+		sun8i_scaler_vsu_enable(mixer, layer, true);
+	} else {
+		DRM_DEBUG_DRIVER("HW scaling is not needed\n");
+		sun8i_scaler_vsu_enable(mixer, layer, false);
+	}
 
 	/* Set base coordinates */
-	DRM_DEBUG_DRIVER("Layer coordinates X: %d Y: %d\n",
+	DRM_DEBUG_DRIVER("Layer destination coordinates X: %d Y: %d\n",
 			 state->dst.x1, state->dst.y1);
+	DRM_DEBUG_DRIVER("Layer destination size W: %d H: %d\n", dst_w, dst_h);
 	regmap_write(mixer->engine.regs,
 		     SUN8I_MIXER_BLEND_ATTR_COORD(layer),
 		     SUN8I_MIXER_COORD(state->dst.x1, state->dst.y1));
 	regmap_write(mixer->engine.regs,
 		     SUN8I_MIXER_BLEND_ATTR_INSIZE(layer),
-		     size);
+		     outsize);
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h
index ad5aef5846ae..355a45e6cfb4 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.h
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h
@@ -124,10 +124,6 @@
  * These sub-engines are still unknown now, the EN registers are here only to
  * be used to disable these sub-engines.
  */
-#define SUN8I_MIXER_VSU_EN			0x20000
-#define SUN8I_MIXER_GSU1_EN			0x30000
-#define SUN8I_MIXER_GSU2_EN			0x40000
-#define SUN8I_MIXER_GSU3_EN			0x50000
 #define SUN8I_MIXER_FCE_EN			0xa0000
 #define SUN8I_MIXER_BWS_EN			0xa2000
 #define SUN8I_MIXER_LTI_EN			0xa4000
-- 
2.15.0

  parent reply	other threads:[~2017-11-27 20:58 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-11-27 20:57 [PATCH 00/17] Improve DE2 support Jernej Skrabec
2017-11-27 20:57 ` [PATCH 01/17] drm/sun4i: Refactor DE2 code Jernej Skrabec
2017-11-28 15:54   ` Maxime Ripard
2017-11-28 18:49     ` Jernej Škrabec
2017-11-27 20:57 ` [PATCH 02/17] drm/sun4i: Start using layer id in DE2 driver Jernej Skrabec
2017-11-28 20:21   ` Maxime Ripard
2017-11-27 20:57 ` [PATCH 03/17] drm/sun4i: Add constraints checking to " Jernej Skrabec
2017-11-27 20:57 ` [PATCH 04/17] drm/sun4i: Use values calculated by atomic check Jernej Skrabec
2017-11-27 20:57 ` [PATCH 05/17] drm/sun4i: Reorder some code in DE2 Jernej Skrabec
2017-11-28 20:26   ` Maxime Ripard
2017-11-27 20:57 ` [PATCH 06/17] drm/sun4i: Add multi plane support to DE2 driver Jernej Skrabec
2017-11-27 20:57 ` [PATCH 07/17] drm/sun4i: Add support for all HW supported DE2 RGB formats Jernej Skrabec
2017-11-27 20:57 ` [PATCH 08/17] drm/sun4i: Add support for DE2 VI planes Jernej Skrabec
2017-11-28 21:00   ` Maxime Ripard
2017-11-28 21:28     ` Jernej Škrabec
2017-11-29 22:01     ` Jernej Škrabec
2017-11-27 20:57 ` [PATCH 09/17] drm/sun4i: Add scaler library for DE2 Jernej Skrabec
2017-11-28 20:40   ` Maxime Ripard
2017-11-27 20:57 ` [PATCH 10/17] drm/sun4i: Add scaler configuration to DE2 mixers Jernej Skrabec
2017-11-28 20:31   ` Maxime Ripard
2017-11-27 20:57 ` Jernej Skrabec [this message]
2017-11-28 20:42   ` [PATCH 11/17] drm/sun4i: Wire in DE2 scaler support Maxime Ripard
2017-11-29 21:48   ` [linux-sunxi] " Julian Calaby
2017-11-29 21:59     ` Jernej Škrabec
2017-11-27 20:57 ` [PATCH 12/17] drm/sun4i: Add CCSC property to DE2 configuration Jernej Skrabec
2017-11-28 12:02   ` Icenowy Zheng
2017-11-28 20:43     ` Maxime Ripard
2017-11-28 20:44   ` Maxime Ripard
2017-11-27 20:57 ` [PATCH 13/17] drm/sun4i: Add DE2 CSC library Jernej Skrabec
2017-11-28 20:55   ` Maxime Ripard
2017-11-28 21:43     ` Jernej Škrabec
2017-11-29  3:20       ` Chen-Yu Tsai
2017-11-29 15:27       ` Maxime Ripard
2017-11-27 20:57 ` [PATCH 14/17] drm/sun4i: Add DE2 definitions for YUV formats Jernej Skrabec
2017-11-27 20:57 ` [PATCH 15/17] drm/sun4i: Expand DE2 scaler lib with YUV support Jernej Skrabec
2017-11-27 20:57 ` [PATCH 16/17] drm/sun4i: Wire in DE2 " Jernej Skrabec
2017-11-27 20:57 ` [PATCH 17/17] [DO NOT MERGE]drm/sun4i: Change zpos of bottom VI plane Jernej Skrabec

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