From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753727AbdK1Pbk (ORCPT ); Tue, 28 Nov 2017 10:31:40 -0500 Received: from mail.free-electrons.com ([62.4.15.54]:36933 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753330AbdK1P1v (ORCPT ); Tue, 28 Nov 2017 10:27:51 -0500 From: Alexandre Belloni To: Ralf Baechle Cc: linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, Alexandre Belloni , Rob Herring , devicetree@vger.kernel.org, linux-gpio@vger.kernel.org Subject: [PATCH 04/13] dt-bindings: pinctrl: Add bindings for Microsemi Ocelot Date: Tue, 28 Nov 2017 16:26:34 +0100 Message-Id: <20171128152643.20463-5-alexandre.belloni@free-electrons.com> X-Mailer: git-send-email 2.15.0 In-Reply-To: <20171128152643.20463-1-alexandre.belloni@free-electrons.com> References: <20171128152643.20463-1-alexandre.belloni@free-electrons.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the documentation for the Microsemi Ocelot pinmuxing and gpio controller. Signed-off-by: Alexandre Belloni --- Cc: Rob Herring Cc: devicetree@vger.kernel.org To: Linus Walleij Cc: linux-gpio@vger.kernel.org .../bindings/pinctrl/mscc,ocelot-pinctrl.txt | 39 ++++++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt diff --git a/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt new file mode 100644 index 000000000000..24a210e0c59a --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt @@ -0,0 +1,39 @@ +Microsemi Ocelot pin controller Device Tree Bindings +---------------------------------------------------- + +Required properties: + - compatible : Should be "mscc,ocelot-pinctrl" + - reg : Address and length of the register set for the device + - gpio-controller : Indicates this device is a GPIO controller + - #gpio-cells : Must be 2. + The first cell is the pin number and the + second cell specifies GPIO flags, as defined in + . + - gpio-ranges : Range of pins managed by the GPIO controller. + + +The ocelot-pinctrl driver uses the generic pin multiplexing and generic pin +configuration documented in pinctrl-bindings.txt. + +The following generic properties are supported: + - function + - pins + +Example: + gpio: pinctrl@71070034 { + compatible = "mscc,ocelot-pinctrl"; + reg = <0x71070034 0x28>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&gpio 0 0 22>; + + uart_pins: uart-pins { + pins = "GPIO_6", "GPIO_7"; + function = "uart"; + }; + + uart2_pins: uart2-pins { + pins = "GPIO_12", "GPIO_13"; + function = "uart2"; + }; + }; -- 2.15.0