[PATCH v2 00/18] drm/sun4i: Add A83t LVDS support

[PATCH v2 00/18] drm/sun4i: Add A83t LVDS support

[Maxime Ripard]

Hi,

Here is an attempt at supporting the LVDS output in our DRM driver. This
has been tested on the A83T (with DE2), but since everything is basically
in the TCON, it should also be usable on the older SoCs with minor
modifications.

This was the occasion to refactor a bunch of things. The most notable ones
would be the documentation, and split of the UI layers in the mixer code,
and the switch to kfifo for our endpoint parsing code in the driver that
fixes an issue introduced by the switch to BFS.

Let me know what you think,
Maxime

Changes from v1:
  - Added a fix for the error path handling in the TCON
  - Enable the TCON by default
  - Removed the patch that changes the channels offset but kept most of the
    modifications as a cleanup
  - Deal with the LVDS clock being able to have another PLL parent on some
    SoCs
  - Renamed the TCON compatible to TCON-TV, following the convention used
    on newer SoCs
  - Removed the hardcoded timings
  - Moved LVDS enable quirks to a separate function
  - Used clock indices define in the DT
  - Removed the hardcoded clock rate in the DT and moved it to the driver
  - Changed sun8i_mixer_planes to sun8i_mixer_ui_planes to be consistent
  - Added the various tags collected
  - Rebased on top of 4.15

Maxime Ripard (18):
  dt-bindings: panel: lvds: Document power-supply property
  drm/panel: lvds: Add support for the power-supply property
  dt-bindings: display: sun4i-drm: Add LVDS properties
  drm/sun4i: Fix error path handling
  drm/sun4i: Force the mixer rate at 150MHz
  drm/sun4i: Rename layers to UI planes
  drm/sun4i: sun8i: Rework the UI channels code
  drm/sun4i: Reorder and document DE2 mixer registers
  drm/sun4i: Create minimal multipliers and dividers
  drm/sun4i: Add LVDS support
  drm/sun4i: Add A83T support
  drm/sun4i: Add A83T support
  ARM: dts: sun8i: a83t: Add display pipeline
  ARM: dts: sun8i: a83t: Enable the PWM
  ARM: dts: sun8i: a83t: Add LVDS pins group
  ARM: dts: sun8i: a83t: Add the PWM pin group
  ARM: dts: sun8i: a711: Reinstate the PMIC compatible
  ARM: dts: sun8i: a711: Enable the LCD

 Documentation/devicetree/bindings/display/panel/panel-common.txt |   6 ++-
 Documentation/devicetree/bindings/display/panel/panel-lvds.txt   |   1 +-
 Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt    |  11 +++-
 arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts                        |  62 ++++++++++++++++++-
 arch/arm/boot/dts/sun8i-a83t.dtsi                                |  99 +++++++++++++++++++++++++++++-
 drivers/gpu/drm/panel/panel-lvds.c                               |  23 +++++++-
 drivers/gpu/drm/sun4i/Makefile                                   |   3 +-
 drivers/gpu/drm/sun4i/sun4i_dotclock.c                           |  10 ++-
 drivers/gpu/drm/sun4i/sun4i_drv.c                                |   2 +-
 drivers/gpu/drm/sun4i/sun4i_lvds.c                               | 183 +++++++++++++++++++++++++++++++++++++++++++++++++++++-
 drivers/gpu/drm/sun4i/sun4i_lvds.h                               |  18 +++++-
 drivers/gpu/drm/sun4i/sun4i_tcon.c                               | 247 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
 drivers/gpu/drm/sun4i/sun4i_tcon.h                               |  31 +++++++++-
 drivers/gpu/drm/sun4i/sun8i_layer.c                              | 134 +---------------------------------------
 drivers/gpu/drm/sun4i/sun8i_layer.h                              |  36 +----------
 drivers/gpu/drm/sun4i/sun8i_mixer.c                              |  86 ++++++++++++++-----------
 drivers/gpu/drm/sun4i/sun8i_mixer.h                              | 101 ++++++++++++++++-------------
 drivers/gpu/drm/sun4i/sun8i_ui.c                                 | 136 ++++++++++++++++++++++++++++++++++++++++-
 drivers/gpu/drm/sun4i/sun8i_ui.h                                 |  37 +++++++++++-
 19 files changed, 968 insertions(+), 258 deletions(-)
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_lvds.c
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_lvds.h
 delete mode 100644 drivers/gpu/drm/sun4i/sun8i_layer.c
 delete mode 100644 drivers/gpu/drm/sun4i/sun8i_layer.h
 create mode 100644 drivers/gpu/drm/sun4i/sun8i_ui.c
 create mode 100644 drivers/gpu/drm/sun4i/sun8i_ui.h

base-commit: 4fbd8d194f06c8a3fd2af1ce560ddb31f7ec8323
-- 
git-series 0.9.1

[PATCH v2 01/18] dt-bindings: panel: lvds: Document power-supply property

[Maxime Ripard]

The power-supply property is used by a vast majority of panels, including
panel-simple. Let's document it as a common property

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 Documentation/devicetree/bindings/display/panel/panel-common.txt | 6 ++++++
 Documentation/devicetree/bindings/display/panel/panel-lvds.txt   | 1 +
 2 files changed, 7 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/panel/panel-common.txt b/Documentation/devicetree/bindings/display/panel/panel-common.txt
index ec52c472c845..125ea68052af 100644
--- a/Documentation/devicetree/bindings/display/panel/panel-common.txt
+++ b/Documentation/devicetree/bindings/display/panel/panel-common.txt
@@ -78,6 +78,12 @@ used for panels that implement compatible control signals.
   while active. Active high reset signals can be supported by inverting the
   GPIO specifier polarity flag.
 
+Power
+-----
+
+- power-supply: many display panels need an additional power supply in
+  order to be fully powered-up. For such panels, power-supply contains
+  a phandle to the regulator powering the panel.
 
 Backlight
 ---------
diff --git a/Documentation/devicetree/bindings/display/panel/panel-lvds.txt b/Documentation/devicetree/bindings/display/panel/panel-lvds.txt
index b938269f841e..250850a2150b 100644
--- a/Documentation/devicetree/bindings/display/panel/panel-lvds.txt
+++ b/Documentation/devicetree/bindings/display/panel/panel-lvds.txt
@@ -32,6 +32,7 @@ Optional properties:
 - label: See panel-common.txt.
 - gpios: See panel-common.txt.
 - backlight: See panel-common.txt.
+- power-supply: See panel-common.txt.
 - data-mirror: If set, reverse the bit order described in the data mappings
   below on all data lanes, transmitting bits for slots 6 to 0 instead of
   0 to 6.
-- 
git-series 0.9.1

[PATCH v2 02/18] drm/panel: lvds: Add support for the power-supply property

[Maxime Ripard]

A significant number of panels need to power up a regulator in order to
operate properly. Add support for the power-supply property to enable and
disable such a regulator whenever needed.

Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 drivers/gpu/drm/panel/panel-lvds.c | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-lvds.c b/drivers/gpu/drm/panel/panel-lvds.c
index e2d57c01200b..57e38a9e7ab4 100644
--- a/drivers/gpu/drm/panel/panel-lvds.c
+++ b/drivers/gpu/drm/panel/panel-lvds.c
@@ -17,6 +17,7 @@
 #include <linux/module.h>
 #include <linux/of_platform.h>
 #include <linux/platform_device.h>
+#include <linux/regulator/consumer.h>
 #include <linux/slab.h>
 
 #include <drm/drmP.h>
@@ -39,6 +40,7 @@ struct panel_lvds {
 	bool data_mirror;
 
 	struct backlight_device *backlight;
+	struct regulator *supply;
 
 	struct gpio_desc *enable_gpio;
 	struct gpio_desc *reset_gpio;
@@ -69,6 +71,9 @@ static int panel_lvds_unprepare(struct drm_panel *panel)
 	if (lvds->enable_gpio)
 		gpiod_set_value_cansleep(lvds->enable_gpio, 0);
 
+	if (lvds->supply)
+		regulator_disable(lvds->supply);
+
 	return 0;
 }
 
@@ -76,6 +81,17 @@ static int panel_lvds_prepare(struct drm_panel *panel)
 {
 	struct panel_lvds *lvds = to_panel_lvds(panel);
 
+	if (lvds->supply) {
+		int err;
+
+		err = regulator_enable(lvds->supply);
+		if (err < 0) {
+			dev_err(lvds->dev, "failed to enable supply: %d\n",
+				err);
+			return err;
+		}
+	}
+
 	if (lvds->enable_gpio)
 		gpiod_set_value_cansleep(lvds->enable_gpio, 1);
 
@@ -196,6 +212,13 @@ static int panel_lvds_probe(struct platform_device *pdev)
 	if (ret < 0)
 		return ret;
 
+	lvds->supply = devm_regulator_get_optional(lvds->dev, "power");
+	if (IS_ERR(lvds->supply)) {
+		ret = PTR_ERR(lvds->supply);
+		dev_err(lvds->dev, "failed to request regulator: %d\n", ret);
+		return ret;
+	}
+
 	/* Get GPIOs and backlight controller. */
 	lvds->enable_gpio = devm_gpiod_get_optional(lvds->dev, "enable",
 						     GPIOD_OUT_LOW);
-- 
git-series 0.9.1

[PATCH v2 03/18] dt-bindings: display: sun4i-drm: Add LVDS properties

[Maxime Ripard]

Some clocks and resets supposed to drive the LVDS logic in the display
engine have been overlooked when the driver was first introduced.

Add those additional resources to the binding, and we'll deal with the ABI
stability in the code.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 8 +++++++-
 1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index 50cc72ee1168..d4259a4f5171 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -121,6 +121,14 @@ Required properties:
 On SoCs other than the A33 and V3s, there is one more clock required:
    - 'tcon-ch1': The clock driving the TCON channel 1
 
+On SoCs that support LVDS (all SoCs but the A13, H3, H5 and V3s), you
+need one more reset line:
+   - 'lvds': The reset line driving the LVDS logic
+
+And on the SoCs newer than the A31 (sun6i and sun8i families), you
+need one more clock line:
+   - 'lvds-pll': The PLL that can be used to drive the LVDS clock
+
 DRC
 ---
 
-- 
git-series 0.9.1

[PATCH v2 04/18] drm/sun4i: Fix error path handling

[Maxime Ripard]

The commit 4c7f16d14a33 ("drm/sun4i: Fix TCON clock and regmap
initialization sequence") moved a bunch of logic around, but forgot to
update the gotos after the introduction of the err_free_dotclock label.

It means that if we fail later that the one introduced in that commit,
we'll just to the old label which isn't free the clock we created. This
will result in a breakage as soon as someone tries to do something with
that clock, since its resources will have been long reclaimed.

Cc: <stable@vger.kernel.org>
Fixes: 4c7f16d14a33 ("drm/sun4i: Fix TCON clock and regmap initialization sequence")
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 drivers/gpu/drm/sun4i/sun4i_tcon.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index e122f5b2a395..f4284b51bdca 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -724,12 +724,12 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master,
 	if (IS_ERR(tcon->crtc)) {
 		dev_err(dev, "Couldn't create our CRTC\n");
 		ret = PTR_ERR(tcon->crtc);
-		goto err_free_clocks;
+		goto err_free_dotclock;
 	}
 
 	ret = sun4i_rgb_init(drm, tcon);
 	if (ret < 0)
-		goto err_free_clocks;
+		goto err_free_dotclock;
 
 	if (tcon->quirks->needs_de_be_mux) {
 		/*
-- 
git-series 0.9.1

[PATCH v2 05/18] drm/sun4i: Force the mixer rate at 150MHz

[Maxime Ripard]

It seems like the mixer can only run properly when clocked at 150MHz. In
order to have something more robust than simply a fire-and-forget
assigned-clocks-rate, let's put that in the code.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 drivers/gpu/drm/sun4i/sun8i_mixer.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c
index cb193c5f1686..c0cdccf772a2 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
@@ -315,6 +315,13 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master,
 	}
 	clk_prepare_enable(mixer->mod_clk);
 
+	/*
+	 * It seems that we need to enforce that rate for whatever
+	 * reason for the mixer to be functional. Make sure it's the
+	 * case.
+	 */
+	clk_set_rate(mixer->mod_clk, 150000000);
+
 	list_add_tail(&mixer->engine.list, &drv->engine_list);
 
 	/* Reset the registers */
-- 
git-series 0.9.1

[PATCH v2 06/18] drm/sun4i: Rename layers to UI planes

[Maxime Ripard]

The currently supported planes for DE2 are actually only UI planes, and the
VI planes will differ both in terms of code and features.

It will make sense to support them in a separate file, so let's make sure
we don't create a confusing file name.

Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 drivers/gpu/drm/sun4i/Makefile      |   2 +-
 drivers/gpu/drm/sun4i/sun8i_layer.c | 134 +-----------------------------
 drivers/gpu/drm/sun4i/sun8i_layer.h |  36 +--------
 drivers/gpu/drm/sun4i/sun8i_mixer.c |   4 +-
 drivers/gpu/drm/sun4i/sun8i_ui.c    | 134 +++++++++++++++++++++++++++++-
 drivers/gpu/drm/sun4i/sun8i_ui.h    |  36 ++++++++-
 6 files changed, 173 insertions(+), 173 deletions(-)
 delete mode 100644 drivers/gpu/drm/sun4i/sun8i_layer.c
 delete mode 100644 drivers/gpu/drm/sun4i/sun8i_layer.h
 create mode 100644 drivers/gpu/drm/sun4i/sun8i_ui.c
 create mode 100644 drivers/gpu/drm/sun4i/sun8i_ui.h

diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile
index 0c2f8c7facae..241cce172728 100644
--- a/drivers/gpu/drm/sun4i/Makefile
+++ b/drivers/gpu/drm/sun4i/Makefile
@@ -9,7 +9,7 @@ sun4i-drm-hdmi-y		+= sun4i_hdmi_enc.o
 sun4i-drm-hdmi-y		+= sun4i_hdmi_i2c.o
 sun4i-drm-hdmi-y		+= sun4i_hdmi_tmds_clk.o
 
-sun8i-mixer-y			+= sun8i_mixer.o sun8i_layer.o
+sun8i-mixer-y			+= sun8i_mixer.o sun8i_ui.o
 
 sun4i-tcon-y			+= sun4i_crtc.o
 sun4i-tcon-y			+= sun4i_dotclock.o
diff --git a/drivers/gpu/drm/sun4i/sun8i_layer.c b/drivers/gpu/drm/sun4i/sun8i_layer.c
deleted file mode 100644
index 23810ff72684..000000000000
--- a/drivers/gpu/drm/sun4i/sun8i_layer.c
+++ /dev/null
@@ -1,134 +0,0 @@
-/*
- * Copyright (C) Icenowy Zheng <icenowy@aosc.io>
- *
- * Based on sun4i_layer.h, which is:
- *   Copyright (C) 2015 Free Electrons
- *   Copyright (C) 2015 NextThing Co
- *
- *   Maxime Ripard <maxime.ripard@free-electrons.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- */
-
-#include <drm/drm_atomic_helper.h>
-#include <drm/drm_plane_helper.h>
-#include <drm/drmP.h>
-
-#include "sun8i_layer.h"
-#include "sun8i_mixer.h"
-
-struct sun8i_plane_desc {
-	       enum drm_plane_type     type;
-	       const uint32_t          *formats;
-	       uint32_t                nformats;
-};
-
-static void sun8i_mixer_layer_atomic_disable(struct drm_plane *plane,
-					       struct drm_plane_state *old_state)
-{
-	struct sun8i_layer *layer = plane_to_sun8i_layer(plane);
-	struct sun8i_mixer *mixer = layer->mixer;
-
-	sun8i_mixer_layer_enable(mixer, layer->id, false);
-}
-
-static void sun8i_mixer_layer_atomic_update(struct drm_plane *plane,
-					      struct drm_plane_state *old_state)
-{
-	struct sun8i_layer *layer = plane_to_sun8i_layer(plane);
-	struct sun8i_mixer *mixer = layer->mixer;
-
-	sun8i_mixer_update_layer_coord(mixer, layer->id, plane);
-	sun8i_mixer_update_layer_formats(mixer, layer->id, plane);
-	sun8i_mixer_update_layer_buffer(mixer, layer->id, plane);
-	sun8i_mixer_layer_enable(mixer, layer->id, true);
-}
-
-static struct drm_plane_helper_funcs sun8i_mixer_layer_helper_funcs = {
-	.atomic_disable	= sun8i_mixer_layer_atomic_disable,
-	.atomic_update	= sun8i_mixer_layer_atomic_update,
-};
-
-static const struct drm_plane_funcs sun8i_mixer_layer_funcs = {
-	.atomic_destroy_state	= drm_atomic_helper_plane_destroy_state,
-	.atomic_duplicate_state	= drm_atomic_helper_plane_duplicate_state,
-	.destroy		= drm_plane_cleanup,
-	.disable_plane		= drm_atomic_helper_disable_plane,
-	.reset			= drm_atomic_helper_plane_reset,
-	.update_plane		= drm_atomic_helper_update_plane,
-};
-
-static const uint32_t sun8i_mixer_layer_formats[] = {
-	DRM_FORMAT_RGB888,
-	DRM_FORMAT_ARGB8888,
-	DRM_FORMAT_XRGB8888,
-};
-
-static const struct sun8i_plane_desc sun8i_mixer_planes[] = {
-	{
-		.type = DRM_PLANE_TYPE_PRIMARY,
-		.formats = sun8i_mixer_layer_formats,
-		.nformats = ARRAY_SIZE(sun8i_mixer_layer_formats),
-	},
-};
-
-static struct sun8i_layer *sun8i_layer_init_one(struct drm_device *drm,
-						struct sun8i_mixer *mixer,
-						const struct sun8i_plane_desc *plane)
-{
-	struct sun8i_layer *layer;
-	int ret;
-
-	layer = devm_kzalloc(drm->dev, sizeof(*layer), GFP_KERNEL);
-	if (!layer)
-		return ERR_PTR(-ENOMEM);
-
-	/* possible crtcs are set later */
-	ret = drm_universal_plane_init(drm, &layer->plane, 0,
-				       &sun8i_mixer_layer_funcs,
-				       plane->formats, plane->nformats,
-				       NULL, plane->type, NULL);
-	if (ret) {
-		dev_err(drm->dev, "Couldn't initialize layer\n");
-		return ERR_PTR(ret);
-	}
-
-	drm_plane_helper_add(&layer->plane,
-			     &sun8i_mixer_layer_helper_funcs);
-	layer->mixer = mixer;
-
-	return layer;
-}
-
-struct drm_plane **sun8i_layers_init(struct drm_device *drm,
-				     struct sunxi_engine *engine)
-{
-	struct drm_plane **planes;
-	struct sun8i_mixer *mixer = engine_to_sun8i_mixer(engine);
-	int i;
-
-	planes = devm_kcalloc(drm->dev, ARRAY_SIZE(sun8i_mixer_planes) + 1,
-			      sizeof(*planes), GFP_KERNEL);
-	if (!planes)
-		return ERR_PTR(-ENOMEM);
-
-	for (i = 0; i < ARRAY_SIZE(sun8i_mixer_planes); i++) {
-		const struct sun8i_plane_desc *plane = &sun8i_mixer_planes[i];
-		struct sun8i_layer *layer;
-
-		layer = sun8i_layer_init_one(drm, mixer, plane);
-		if (IS_ERR(layer)) {
-			dev_err(drm->dev, "Couldn't initialize %s plane\n",
-				i ? "overlay" : "primary");
-			return ERR_CAST(layer);
-		};
-
-		layer->id = i;
-		planes[i] = &layer->plane;
-	};
-
-	return planes;
-}
diff --git a/drivers/gpu/drm/sun4i/sun8i_layer.h b/drivers/gpu/drm/sun4i/sun8i_layer.h
deleted file mode 100644
index e5eccd27cff0..000000000000
--- a/drivers/gpu/drm/sun4i/sun8i_layer.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * Copyright (C) Icenowy Zheng <icenowy@aosc.io>
- *
- * Based on sun4i_layer.h, which is:
- *   Copyright (C) 2015 Free Electrons
- *   Copyright (C) 2015 NextThing Co
- *
- *   Maxime Ripard <maxime.ripard@free-electrons.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- */
-
-#ifndef _SUN8I_LAYER_H_
-#define _SUN8I_LAYER_H_
-
-struct sunxi_engine;
-
-struct sun8i_layer {
-	struct drm_plane	plane;
-	struct sun4i_drv	*drv;
-	struct sun8i_mixer	*mixer;
-	int			id;
-};
-
-static inline struct sun8i_layer *
-plane_to_sun8i_layer(struct drm_plane *plane)
-{
-	return container_of(plane, struct sun8i_layer, plane);
-}
-
-struct drm_plane **sun8i_layers_init(struct drm_device *drm,
-				     struct sunxi_engine *engine);
-#endif /* _SUN8I_LAYER_H_ */
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c
index c0cdccf772a2..f503bd000893 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
@@ -26,7 +26,7 @@
 
 #include "sun4i_drv.h"
 #include "sun8i_mixer.h"
-#include "sun8i_layer.h"
+#include "sun8i_ui.h"
 #include "sunxi_engine.h"
 
 static void sun8i_mixer_commit(struct sunxi_engine *engine)
@@ -228,7 +228,7 @@ int sun8i_mixer_update_layer_buffer(struct sun8i_mixer *mixer,
 
 static const struct sunxi_engine_ops sun8i_engine_ops = {
 	.commit		= sun8i_mixer_commit,
-	.layers_init	= sun8i_layers_init,
+	.layers_init	= sun8i_ui_init,
 };
 
 static struct regmap_config sun8i_mixer_regmap_config = {
diff --git a/drivers/gpu/drm/sun4i/sun8i_ui.c b/drivers/gpu/drm/sun4i/sun8i_ui.c
new file mode 100644
index 000000000000..3986cb08509c
--- /dev/null
+++ b/drivers/gpu/drm/sun4i/sun8i_ui.c
@@ -0,0 +1,134 @@
+/*
+ * Copyright (C) Icenowy Zheng <icenowy@aosc.io>
+ *
+ * Based on sun4i_layer.h, which is:
+ *   Copyright (C) 2015 Free Electrons
+ *   Copyright (C) 2015 NextThing Co
+ *
+ *   Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include <drm/drm_atomic_helper.h>
+#include <drm/drm_plane_helper.h>
+#include <drm/drmP.h>
+
+#include "sun8i_ui.h"
+#include "sun8i_mixer.h"
+
+struct sun8i_plane_desc {
+	       enum drm_plane_type     type;
+	       const uint32_t          *formats;
+	       uint32_t                nformats;
+};
+
+static void sun8i_mixer_ui_atomic_disable(struct drm_plane *plane,
+					  struct drm_plane_state *old_state)
+{
+	struct sun8i_ui *ui = plane_to_sun8i_ui(plane);
+	struct sun8i_mixer *mixer = ui->mixer;
+
+	sun8i_mixer_layer_enable(mixer, ui->id, false);
+}
+
+static void sun8i_mixer_ui_atomic_update(struct drm_plane *plane,
+					 struct drm_plane_state *old_state)
+{
+	struct sun8i_ui *ui = plane_to_sun8i_ui(plane);
+	struct sun8i_mixer *mixer = ui->mixer;
+
+	sun8i_mixer_update_layer_coord(mixer, ui->id, plane);
+	sun8i_mixer_update_layer_formats(mixer, ui->id, plane);
+	sun8i_mixer_update_layer_buffer(mixer, ui->id, plane);
+	sun8i_mixer_layer_enable(mixer, ui->id, true);
+}
+
+static struct drm_plane_helper_funcs sun8i_mixer_ui_helper_funcs = {
+	.atomic_disable	= sun8i_mixer_ui_atomic_disable,
+	.atomic_update	= sun8i_mixer_ui_atomic_update,
+};
+
+static const struct drm_plane_funcs sun8i_mixer_ui_funcs = {
+	.atomic_destroy_state	= drm_atomic_helper_plane_destroy_state,
+	.atomic_duplicate_state	= drm_atomic_helper_plane_duplicate_state,
+	.destroy		= drm_plane_cleanup,
+	.disable_plane		= drm_atomic_helper_disable_plane,
+	.reset			= drm_atomic_helper_plane_reset,
+	.update_plane		= drm_atomic_helper_update_plane,
+};
+
+static const uint32_t sun8i_mixer_ui_formats[] = {
+	DRM_FORMAT_RGB888,
+	DRM_FORMAT_ARGB8888,
+	DRM_FORMAT_XRGB8888,
+};
+
+static const struct sun8i_plane_desc sun8i_mixer_ui_planes[] = {
+	{
+		.type = DRM_PLANE_TYPE_PRIMARY,
+		.formats = sun8i_mixer_ui_formats,
+		.nformats = ARRAY_SIZE(sun8i_mixer_ui_formats),
+	},
+};
+
+static struct sun8i_ui *sun8i_ui_init_one(struct drm_device *drm,
+					  struct sun8i_mixer *mixer,
+					  const struct sun8i_plane_desc *plane)
+{
+	struct sun8i_ui *ui;
+	int ret;
+
+	ui = devm_kzalloc(drm->dev, sizeof(*ui), GFP_KERNEL);
+	if (!ui)
+		return ERR_PTR(-ENOMEM);
+
+	/* possible crtcs are set later */
+	ret = drm_universal_plane_init(drm, &ui->plane, 0,
+				       &sun8i_mixer_ui_funcs,
+				       plane->formats, plane->nformats,
+				       NULL, plane->type, NULL);
+	if (ret) {
+		dev_err(drm->dev, "Couldn't initialize ui\n");
+		return ERR_PTR(ret);
+	}
+
+	drm_plane_helper_add(&ui->plane,
+			     &sun8i_mixer_ui_helper_funcs);
+	ui->mixer = mixer;
+
+	return ui;
+}
+
+struct drm_plane **sun8i_ui_init(struct drm_device *drm,
+				 struct sunxi_engine *engine)
+{
+	struct drm_plane **planes;
+	struct sun8i_mixer *mixer = engine_to_sun8i_mixer(engine);
+	int i;
+
+	planes = devm_kcalloc(drm->dev, ARRAY_SIZE(sun8i_mixer_ui_planes) + 1,
+			      sizeof(*planes), GFP_KERNEL);
+	if (!planes)
+		return ERR_PTR(-ENOMEM);
+
+	for (i = 0; i < ARRAY_SIZE(sun8i_mixer_ui_planes); i++) {
+		const struct sun8i_plane_desc *plane = &sun8i_mixer_ui_planes[i];
+		struct sun8i_ui *ui;
+
+		ui = sun8i_ui_init_one(drm, mixer, plane);
+		if (IS_ERR(ui)) {
+			dev_err(drm->dev, "Couldn't initialize %s plane\n",
+				i ? "overlay" : "primary");
+			return ERR_CAST(ui);
+		};
+
+		ui->id = i;
+		planes[i] = &ui->plane;
+	};
+
+	return planes;
+}
diff --git a/drivers/gpu/drm/sun4i/sun8i_ui.h b/drivers/gpu/drm/sun4i/sun8i_ui.h
new file mode 100644
index 000000000000..17dfc92ccc9f
--- /dev/null
+++ b/drivers/gpu/drm/sun4i/sun8i_ui.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (C) Icenowy Zheng <icenowy@aosc.io>
+ *
+ * Based on sun4i_layer.h, which is:
+ *   Copyright (C) 2015 Free Electrons
+ *   Copyright (C) 2015 NextThing Co
+ *
+ *   Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#ifndef _SUN8I_UI_H_
+#define _SUN8I_UI_H_
+
+struct sunxi_engine;
+
+struct sun8i_ui {
+	struct drm_plane	plane;
+	struct sun4i_drv	*drv;
+	struct sun8i_mixer	*mixer;
+	int			id;
+};
+
+static inline struct sun8i_ui *
+plane_to_sun8i_ui(struct drm_plane *plane)
+{
+	return container_of(plane, struct sun8i_ui, plane);
+}
+
+struct drm_plane **sun8i_ui_init(struct drm_device *drm,
+				 struct sunxi_engine *engine);
+#endif /* _SUN8I_UI_H_ */
-- 
git-series 0.9.1

[PATCH v2 07/18] drm/sun4i: sun8i: Rework the UI channels code

[Maxime Ripard]

The current code makes the assumption that the only channel we want to use
for the first (and only) UI channel is the number of VI channels (so last
VI + 1), which is accurate.

However, it does so in pretty much every plane-related function using a
local variable that makes it quite difficult to rework when we'll have to
deal with multiple UI channels.

Refactor the current code a bit to associate the ID of the channel to the
sun8i_ui structure directly, and have all our callbacks use that instead.

As the current code registers only one UI channel, we'll fill that field
with the same value that was there before (ie number of VI channels), but
this time we'll only have to change it where the planes are instatiated,
and not in the whole code.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 drivers/gpu/drm/sun4i/sun8i_mixer.c | 43 +++++++++++++-----------------
 drivers/gpu/drm/sun4i/sun8i_mixer.h | 12 ++++----
 drivers/gpu/drm/sun4i/sun8i_ui.c    | 12 ++++----
 drivers/gpu/drm/sun4i/sun8i_ui.h    |  1 +-
 4 files changed, 34 insertions(+), 34 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c
index f503bd000893..648a6ad3104a 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
@@ -37,14 +37,12 @@ static void sun8i_mixer_commit(struct sunxi_engine *engine)
 		     SUN8I_MIXER_GLOBAL_DBUFF_ENABLE);
 }
 
-void sun8i_mixer_layer_enable(struct sun8i_mixer *mixer,
-				int layer, bool enable)
+void sun8i_mixer_layer_enable(struct sun8i_mixer *mixer, struct sun8i_ui *ui,
+			      bool enable)
 {
 	u32 val;
-	/* Currently the first UI channel is used */
-	int chan = mixer->cfg->vi_num;
 
-	DRM_DEBUG_DRIVER("Enabling layer %d in channel %d\n", layer, chan);
+	DRM_DEBUG_DRIVER("Enabling layer %d in channel %d\n", ui->id, ui->chan);
 
 	if (enable)
 		val = SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN;
@@ -52,16 +50,16 @@ void sun8i_mixer_layer_enable(struct sun8i_mixer *mixer,
 		val = 0;
 
 	regmap_update_bits(mixer->engine.regs,
-			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR(chan, layer),
+			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ui->chan, ui->id),
 			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN, val);
 
 	/* Set the alpha configuration */
 	regmap_update_bits(mixer->engine.regs,
-			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR(chan, layer),
+			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ui->chan, ui->id),
 			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MODE_MASK,
 			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MODE_DEF);
 	regmap_update_bits(mixer->engine.regs,
-			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR(chan, layer),
+			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ui->chan, ui->id),
 			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MASK,
 			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_DEF);
 }
@@ -90,14 +88,13 @@ static int sun8i_mixer_drm_format_to_layer(struct drm_plane *plane,
 }
 
 int sun8i_mixer_update_layer_coord(struct sun8i_mixer *mixer,
-				     int layer, struct drm_plane *plane)
+				   struct sun8i_ui *ui)
 {
+	struct drm_plane *plane = &ui->plane;
 	struct drm_plane_state *state = plane->state;
 	struct drm_framebuffer *fb = state->fb;
-	/* Currently the first UI channel is used */
-	int chan = mixer->cfg->vi_num;
 
-	DRM_DEBUG_DRIVER("Updating layer %d\n", layer);
+	DRM_DEBUG_DRIVER("Updating layer %d\n", ui->id);
 
 	if (plane->type == DRM_PLANE_TYPE_PRIMARY) {
 		DRM_DEBUG_DRIVER("Primary layer, updating global size W: %u H: %u\n",
@@ -115,7 +112,7 @@ int sun8i_mixer_update_layer_coord(struct sun8i_mixer *mixer,
 					      state->crtc_h));
 		DRM_DEBUG_DRIVER("Updating channel size\n");
 		regmap_write(mixer->engine.regs,
-			     SUN8I_MIXER_CHAN_UI_OVL_SIZE(chan),
+			     SUN8I_MIXER_CHAN_UI_OVL_SIZE(ui->chan),
 			     SUN8I_MIXER_SIZE(state->crtc_w,
 					      state->crtc_h));
 	}
@@ -123,35 +120,34 @@ int sun8i_mixer_update_layer_coord(struct sun8i_mixer *mixer,
 	/* Set the line width */
 	DRM_DEBUG_DRIVER("Layer line width: %d bytes\n", fb->pitches[0]);
 	regmap_write(mixer->engine.regs,
-		     SUN8I_MIXER_CHAN_UI_LAYER_PITCH(chan, layer),
+		     SUN8I_MIXER_CHAN_UI_LAYER_PITCH(ui->chan, ui->id),
 		     fb->pitches[0]);
 
 	/* Set height and width */
 	DRM_DEBUG_DRIVER("Layer size W: %u H: %u\n",
 			 state->crtc_w, state->crtc_h);
 	regmap_write(mixer->engine.regs,
-		     SUN8I_MIXER_CHAN_UI_LAYER_SIZE(chan, layer),
+		     SUN8I_MIXER_CHAN_UI_LAYER_SIZE(ui->chan, ui->id),
 		     SUN8I_MIXER_SIZE(state->crtc_w, state->crtc_h));
 
 	/* Set base coordinates */
 	DRM_DEBUG_DRIVER("Layer coordinates X: %d Y: %d\n",
 			 state->crtc_x, state->crtc_y);
 	regmap_write(mixer->engine.regs,
-		     SUN8I_MIXER_CHAN_UI_LAYER_COORD(chan, layer),
+		     SUN8I_MIXER_CHAN_UI_LAYER_COORD(ui->chan, ui->id),
 		     SUN8I_MIXER_COORD(state->crtc_x, state->crtc_y));
 
 	return 0;
 }
 
 int sun8i_mixer_update_layer_formats(struct sun8i_mixer *mixer,
-				       int layer, struct drm_plane *plane)
+				     struct sun8i_ui *ui)
 {
+	struct drm_plane *plane = &ui->plane;
 	struct drm_plane_state *state = plane->state;
 	struct drm_framebuffer *fb = state->fb;
 	bool interlaced = false;
 	u32 val;
-	/* Currently the first UI channel is used */
-	int chan = mixer->cfg->vi_num;
 	int ret;
 
 	if (plane->state->crtc)
@@ -174,21 +170,20 @@ int sun8i_mixer_update_layer_formats(struct sun8i_mixer *mixer,
 	}
 
 	regmap_update_bits(mixer->engine.regs,
-			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR(chan, layer),
+			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ui->chan, ui->id),
 			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_MASK, val);
 
 	return 0;
 }
 
 int sun8i_mixer_update_layer_buffer(struct sun8i_mixer *mixer,
-				      int layer, struct drm_plane *plane)
+				    struct sun8i_ui *ui)
 {
+	struct drm_plane *plane = &ui->plane;
 	struct drm_plane_state *state = plane->state;
 	struct drm_framebuffer *fb = state->fb;
 	struct drm_gem_cma_object *gem;
 	dma_addr_t paddr;
-	/* Currently the first UI channel is used */
-	int chan = mixer->cfg->vi_num;
 	int bpp;
 
 	/* Get the physical address of the buffer in memory */
@@ -220,7 +215,7 @@ int sun8i_mixer_update_layer_buffer(struct sun8i_mixer *mixer,
 	DRM_DEBUG_DRIVER("Setting buffer address to %pad\n", &paddr);
 
 	regmap_write(mixer->engine.regs,
-		     SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(chan, layer),
+		     SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(ui->chan, ui->id),
 		     lower_32_bits(paddr));
 
 	return 0;
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h
index 4785ac090b8c..ce984c436246 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.h
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h
@@ -104,6 +104,8 @@
 #define SUN8I_MIXER_FCC_EN			0xaa000
 #define SUN8I_MIXER_DCSC_EN			0xb0000
 
+struct sun8i_ui;
+
 struct sun8i_mixer_cfg {
 	int		vi_num;
 	int		ui_num;
@@ -126,12 +128,12 @@ engine_to_sun8i_mixer(struct sunxi_engine *engine)
 	return container_of(engine, struct sun8i_mixer, engine);
 }
 
-void sun8i_mixer_layer_enable(struct sun8i_mixer *mixer,
-				int layer, bool enable);
+void sun8i_mixer_layer_enable(struct sun8i_mixer *mixer, struct sun8i_ui *ui,
+			      bool enable);
 int sun8i_mixer_update_layer_coord(struct sun8i_mixer *mixer,
-				     int layer, struct drm_plane *plane);
+				   struct sun8i_ui *ui);
 int sun8i_mixer_update_layer_formats(struct sun8i_mixer *mixer,
-				       int layer, struct drm_plane *plane);
+				     struct sun8i_ui *ui);
 int sun8i_mixer_update_layer_buffer(struct sun8i_mixer *mixer,
-				      int layer, struct drm_plane *plane);
+				    struct sun8i_ui *ui);
 #endif /* _SUN8I_MIXER_H_ */
diff --git a/drivers/gpu/drm/sun4i/sun8i_ui.c b/drivers/gpu/drm/sun4i/sun8i_ui.c
index 3986cb08509c..edc65d9df598 100644
--- a/drivers/gpu/drm/sun4i/sun8i_ui.c
+++ b/drivers/gpu/drm/sun4i/sun8i_ui.c
@@ -32,7 +32,7 @@ static void sun8i_mixer_ui_atomic_disable(struct drm_plane *plane,
 	struct sun8i_ui *ui = plane_to_sun8i_ui(plane);
 	struct sun8i_mixer *mixer = ui->mixer;
 
-	sun8i_mixer_layer_enable(mixer, ui->id, false);
+	sun8i_mixer_layer_enable(mixer, ui, false);
 }
 
 static void sun8i_mixer_ui_atomic_update(struct drm_plane *plane,
@@ -41,10 +41,10 @@ static void sun8i_mixer_ui_atomic_update(struct drm_plane *plane,
 	struct sun8i_ui *ui = plane_to_sun8i_ui(plane);
 	struct sun8i_mixer *mixer = ui->mixer;
 
-	sun8i_mixer_update_layer_coord(mixer, ui->id, plane);
-	sun8i_mixer_update_layer_formats(mixer, ui->id, plane);
-	sun8i_mixer_update_layer_buffer(mixer, ui->id, plane);
-	sun8i_mixer_layer_enable(mixer, ui->id, true);
+	sun8i_mixer_update_layer_coord(mixer, ui);
+	sun8i_mixer_update_layer_formats(mixer, ui);
+	sun8i_mixer_update_layer_buffer(mixer, ui);
+	sun8i_mixer_layer_enable(mixer, ui, true);
 }
 
 static struct drm_plane_helper_funcs sun8i_mixer_ui_helper_funcs = {
@@ -126,6 +126,8 @@ struct drm_plane **sun8i_ui_init(struct drm_device *drm,
 			return ERR_CAST(ui);
 		};
 
+		/* TODO: Support several UI channels */
+		ui->chan = mixer->cfg->vi_num;
 		ui->id = i;
 		planes[i] = &ui->plane;
 	};
diff --git a/drivers/gpu/drm/sun4i/sun8i_ui.h b/drivers/gpu/drm/sun4i/sun8i_ui.h
index 17dfc92ccc9f..3c3185878ad1 100644
--- a/drivers/gpu/drm/sun4i/sun8i_ui.h
+++ b/drivers/gpu/drm/sun4i/sun8i_ui.h
@@ -22,6 +22,7 @@ struct sun8i_ui {
 	struct drm_plane	plane;
 	struct sun4i_drv	*drv;
 	struct sun8i_mixer	*mixer;
+	u8			chan;
 	int			id;
 };
 
-- 
git-series 0.9.1

[PATCH v2 08/18] drm/sun4i: Reorder and document DE2 mixer registers

[Maxime Ripard]

Some registers values have been hardcoded so far, or were not as
descriptive as supposed to, because of missing information. The various
BSP that poped up since have given us more details, some hopefully we can
be more explicit about things.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 drivers/gpu/drm/sun4i/sun8i_mixer.c | 25 ++++----
 drivers/gpu/drm/sun4i/sun8i_mixer.h | 89 ++++++++++++++++--------------
 2 files changed, 63 insertions(+), 51 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c
index 648a6ad3104a..44d5e639ebb2 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
@@ -61,7 +61,7 @@ void sun8i_mixer_layer_enable(struct sun8i_mixer *mixer, struct sun8i_ui *ui,
 	regmap_update_bits(mixer->engine.regs,
 			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ui->chan, ui->id),
 			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MASK,
-			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_DEF);
+			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA(255));
 }
 
 static int sun8i_mixer_drm_format_to_layer(struct drm_plane *plane,
@@ -329,19 +329,20 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master,
 
 	/* Initialize blender */
 	regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_FCOLOR_CTL,
-		     SUN8I_MIXER_BLEND_FCOLOR_CTL_DEF);
-	regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_PREMULTIPLY,
-		     SUN8I_MIXER_BLEND_PREMULTIPLY_DEF);
+		     SUN8I_MIXER_BLEND_FCOLOR_CTL_FCOLOR_EN(0) |
+		     SUN8I_MIXER_BLEND_FCOLOR_CTL_EN(0));
+	regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_PREMULTIPLY, 0);
 	regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_BKCOLOR,
-		     SUN8I_MIXER_BLEND_BKCOLOR_DEF);
+		     SUN8I_MIXER_BLEND_BKCOLOR_ALPHA(255));
 	regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_MODE(0),
-		     SUN8I_MIXER_BLEND_MODE_DEF);
-	regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_CK_CTL,
-		     SUN8I_MIXER_BLEND_CK_CTL_DEF);
-
-	regmap_write(mixer->engine.regs,
-		     SUN8I_MIXER_BLEND_ATTR_FCOLOR(0),
-		     SUN8I_MIXER_BLEND_ATTR_FCOLOR_DEF);
+		     SUN8I_MIXER_BLEND_MODE_PIXEL_FS(1) |
+		     SUN8I_MIXER_BLEND_MODE_PIXEL_FD(3) |
+		     SUN8I_MIXER_BLEND_MODE_ALPHA_FS(1) |
+		     SUN8I_MIXER_BLEND_MODE_ALPHA_FD(3));
+	regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_CK_CTL, 0);
+
+	regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_ATTR_FCOLOR(0),
+		     SUN8I_MIXER_BLEND_ATTR_FCOLOR_ALPHA(255));
 
 	/* Select the first UI channel */
 	DRM_DEBUG_DRIVER("Selecting channel %d (first UI channel)\n",
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h
index ce984c436246..b6512198af55 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.h
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h
@@ -22,71 +22,82 @@
 #define SUN8I_MIXER_COORD(x, y)			((y) << 16 | (x))
 
 #define SUN8I_MIXER_GLOBAL_CTL			0x0
+#define SUN8I_MIXER_GLOBAL_CTL_RT_EN			BIT(0)
+
 #define SUN8I_MIXER_GLOBAL_STATUS		0x4
 #define SUN8I_MIXER_GLOBAL_DBUFF		0x8
-#define SUN8I_MIXER_GLOBAL_SIZE			0xc
-
-#define SUN8I_MIXER_GLOBAL_CTL_RT_EN		0x1
+#define SUN8I_MIXER_GLOBAL_DBUFF_ENABLE			BIT(0)
 
-#define SUN8I_MIXER_GLOBAL_DBUFF_ENABLE		0x1
+#define SUN8I_MIXER_GLOBAL_SIZE			0xc
 
 #define SUN8I_MIXER_BLEND_FCOLOR_CTL		0x1000
+#define SUN8I_MIXER_BLEND_FCOLOR_CTL_EN(x)		BIT(8 + (x))
+#define SUN8I_MIXER_BLEND_FCOLOR_CTL_FCOLOR_EN(x)	BIT(x)
+
 #define SUN8I_MIXER_BLEND_ATTR_FCOLOR(x)	(0x1004 + 0x10 * (x) + 0x0)
+#define SUN8I_MIXER_BLEND_ATTR_FCOLOR_ALPHA(x)		(((x) & 0xff) << 24)
+
 #define SUN8I_MIXER_BLEND_ATTR_INSIZE(x)	(0x1004 + 0x10 * (x) + 0x4)
+
 #define SUN8I_MIXER_BLEND_ATTR_OFFSET(x)	(0x1004 + 0x10 * (x) + 0x8)
 #define SUN8I_MIXER_BLEND_ROUTE			0x1080
 #define SUN8I_MIXER_BLEND_PREMULTIPLY		0x1084
+
 #define SUN8I_MIXER_BLEND_BKCOLOR		0x1088
+#define SUN8I_MIXER_BLEND_BKCOLOR_ALPHA(x)		(((x) & 0xff) << 24)
+
 #define SUN8I_MIXER_BLEND_OUTSIZE		0x108c
+
 #define SUN8I_MIXER_BLEND_MODE(x)		(0x1090 + 0x04 * (x))
+#define SUN8I_MIXER_BLEND_MODE_ALPHA_FD(x)		(((x) & 0xf) << 24)
+#define SUN8I_MIXER_BLEND_MODE_ALPHA_FS(x)		(((x) & 0xf) << 16)
+#define SUN8I_MIXER_BLEND_MODE_PIXEL_FD(x)		(((x) & 0xf) << 8)
+#define SUN8I_MIXER_BLEND_MODE_PIXEL_FS(x)		((x) & 0xf)
+
 #define SUN8I_MIXER_BLEND_CK_CTL		0x10b0
 #define SUN8I_MIXER_BLEND_CK_CFG		0x10b4
 #define SUN8I_MIXER_BLEND_CK_MAX(x)		(0x10c0 + 0x04 * (x))
 #define SUN8I_MIXER_BLEND_CK_MIN(x)		(0x10e0 + 0x04 * (x))
-#define SUN8I_MIXER_BLEND_OUTCTL		0x10fc
-
-/* The following numbers are some still unknown magic numbers */
-#define SUN8I_MIXER_BLEND_ATTR_FCOLOR_DEF	0xff000000
-#define SUN8I_MIXER_BLEND_FCOLOR_CTL_DEF	0x00000101
-#define SUN8I_MIXER_BLEND_PREMULTIPLY_DEF	0x0
-#define SUN8I_MIXER_BLEND_BKCOLOR_DEF		0xff000000
-#define SUN8I_MIXER_BLEND_MODE_DEF		0x03010301
-#define SUN8I_MIXER_BLEND_CK_CTL_DEF		0x0
 
-#define SUN8I_MIXER_BLEND_OUTCTL_INTERLACED	BIT(1)
+#define SUN8I_MIXER_BLEND_OUTCTL		0x10fc
+#define SUN8I_MIXER_BLEND_OUTCTL_INTERLACED		BIT(1)
 
 /*
  * VI channels are not used now, but the support of them may be introduced in
  * the future.
  */
 
-#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch, layer) \
-			(0x2000 + 0x1000 * (ch) + 0x20 * (layer) + 0x0)
-#define SUN8I_MIXER_CHAN_UI_LAYER_SIZE(ch, layer) \
-			(0x2000 + 0x1000 * (ch) + 0x20 * (layer) + 0x4)
-#define SUN8I_MIXER_CHAN_UI_LAYER_COORD(ch, layer) \
-			(0x2000 + 0x1000 * (ch) + 0x20 * (layer) + 0x8)
-#define SUN8I_MIXER_CHAN_UI_LAYER_PITCH(ch, layer) \
-			(0x2000 + 0x1000 * (ch) + 0x20 * (layer) + 0xc)
-#define SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(ch, layer) \
-			(0x2000 + 0x1000 * (ch) + 0x20 * (layer) + 0x10)
-#define SUN8I_MIXER_CHAN_UI_LAYER_BOT_LADDR(ch, layer) \
-			(0x2000 + 0x1000 * (ch) + 0x20 * (layer) + 0x14)
-#define SUN8I_MIXER_CHAN_UI_LAYER_FCOLOR(ch, layer) \
-			(0x2000 + 0x1000 * (ch) + 0x20 * (layer) + 0x18)
-#define SUN8I_MIXER_CHAN_UI_TOP_HADDR(ch)	(0x2000 + 0x1000 * (ch) + 0x80)
-#define SUN8I_MIXER_CHAN_UI_BOT_HADDR(ch)	(0x2000 + 0x1000 * (ch) + 0x84)
-#define SUN8I_MIXER_CHAN_UI_OVL_SIZE(ch)	(0x2000 + 0x1000 * (ch) + 0x88)
+#define SUN8I_MIXER_CHAN(ch)		(0x2000 + 0x1000 * (ch))
+#define SUN8I_MIXER_UI_LAYER(ch, layer)	(SUN8I_MIXER_CHAN(ch) + 0x20 * (layer))
 
-#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN		BIT(0)
-#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MODE_MASK	GENMASK(2, 1)
-#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_MASK	GENMASK(11, 8)
+#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch, layer)	\
+	(SUN8I_MIXER_UI_LAYER(ch, layer) + 0x00)
 #define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MASK	GENMASK(31, 24)
-#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MODE_DEF	(1 << 1)
-#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_ARGB8888	(0 << 8)
-#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_XRGB8888	(4 << 8)
-#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_RGB888	(8 << 8)
-#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_DEF	(0xff << 24)
+#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA(x)			(0xff << 24)
+#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_MASK	GENMASK(11, 8)
+#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_RGB888		(8 << 8)
+#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_XRGB8888		(4 << 8)
+#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_ARGB8888		(0 << 8)
+#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MODE_MASK	GENMASK(2, 1)
+#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MODE_DEF		(1 << 1)
+#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN		BIT(0)
+
+#define SUN8I_MIXER_CHAN_UI_LAYER_SIZE(ch, layer)	\
+	(SUN8I_MIXER_UI_LAYER(ch, layer) + 0x04)
+#define SUN8I_MIXER_CHAN_UI_LAYER_COORD(ch, layer)	\
+	(SUN8I_MIXER_UI_LAYER(ch, layer) + 0x08)
+#define SUN8I_MIXER_CHAN_UI_LAYER_PITCH(ch, layer)	\
+	(SUN8I_MIXER_UI_LAYER(ch, layer) + 0x0c)
+#define SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(ch, layer)	\
+	(SUN8I_MIXER_UI_LAYER(ch, layer) + 0x10)
+#define SUN8I_MIXER_CHAN_UI_LAYER_BOT_LADDR(ch, layer)	\
+	(SUN8I_MIXER_UI_LAYER(ch, layer) + 0x14)
+#define SUN8I_MIXER_CHAN_UI_LAYER_FCOLOR(ch, layer)	\
+	(SUN8I_MIXER_UI_LAYER(ch, layer) + 0x18)
+
+#define SUN8I_MIXER_CHAN_UI_TOP_HADDR(ch)	(SUN8I_MIXER_CHAN(ch) + 0x80)
+#define SUN8I_MIXER_CHAN_UI_BOT_HADDR(ch)	(SUN8I_MIXER_CHAN(ch) + 0x84)
+#define SUN8I_MIXER_CHAN_UI_OVL_SIZE(ch)	(SUN8I_MIXER_CHAN(ch) + 0x88)
 
 /*
  * These sub-engines are still unknown now, the EN registers are here only to
-- 
git-series 0.9.1

[PATCH v2 09/18] drm/sun4i: Create minimal multipliers and dividers

[Maxime Ripard]

The various outputs the TCON can provide have different constraints on the
dotclock divider. Let's make them configurable by the various mode_set
functions.

Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 drivers/gpu/drm/sun4i/sun4i_dotclock.c | 10 +++++++---
 drivers/gpu/drm/sun4i/sun4i_tcon.c     |  2 ++
 drivers/gpu/drm/sun4i/sun4i_tcon.h     |  2 ++
 3 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun4i_dotclock.c b/drivers/gpu/drm/sun4i/sun4i_dotclock.c
index d401156490f3..023f39bda633 100644
--- a/drivers/gpu/drm/sun4i/sun4i_dotclock.c
+++ b/drivers/gpu/drm/sun4i/sun4i_dotclock.c
@@ -17,8 +17,9 @@
 #include "sun4i_dotclock.h"
 
 struct sun4i_dclk {
-	struct clk_hw	hw;
-	struct regmap	*regmap;
+	struct clk_hw		hw;
+	struct regmap		*regmap;
+	struct sun4i_tcon	*tcon;
 };
 
 static inline struct sun4i_dclk *hw_to_dclk(struct clk_hw *hw)
@@ -73,11 +74,13 @@ static unsigned long sun4i_dclk_recalc_rate(struct clk_hw *hw,
 static long sun4i_dclk_round_rate(struct clk_hw *hw, unsigned long rate,
 				  unsigned long *parent_rate)
 {
+	struct sun4i_dclk *dclk = hw_to_dclk(hw);
+	struct sun4i_tcon *tcon = dclk->tcon;
 	unsigned long best_parent = 0;
 	u8 best_div = 1;
 	int i;
 
-	for (i = 6; i <= 127; i++) {
+	for (i = tcon->dclk_min_div; i <= tcon->dclk_max_div; i++) {
 		unsigned long ideal = rate * i;
 		unsigned long rounded;
 
@@ -167,6 +170,7 @@ int sun4i_dclk_create(struct device *dev, struct sun4i_tcon *tcon)
 	dclk = devm_kzalloc(dev, sizeof(*dclk), GFP_KERNEL);
 	if (!dclk)
 		return -ENOMEM;
+	dclk->tcon = tcon;
 
 	init.name = clk_name;
 	init.ops = &sun4i_dclk_ops;
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index f4284b51bdca..5b6cd7c43e4b 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -177,6 +177,8 @@ static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon,
 	u8 clk_delay;
 	u32 val = 0;
 
+	tcon->dclk_min_div = 6;
+	tcon->dclk_max_div = 127;
 	sun4i_tcon0_mode_set_common(tcon, mode);
 
 	/* Adjust clock delay */
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h
index f61bf6d83b4a..4141fbd97ddf 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.h
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h
@@ -169,6 +169,8 @@ struct sun4i_tcon {
 
 	/* Pixel clock */
 	struct clk			*dclk;
+	u8				dclk_max_div;
+	u8				dclk_min_div;
 
 	/* Reset control */
 	struct reset_control		*lcd_rst;
-- 
git-series 0.9.1

[PATCH v2 10/18] drm/sun4i: Add LVDS support

[Maxime Ripard]

The TCON supports the LVDS interface to output to a panel or a bridge.
Let's add support for it.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 drivers/gpu/drm/sun4i/Makefile     |   1 +-
 drivers/gpu/drm/sun4i/sun4i_lvds.c | 183 +++++++++++++++++++++++-
 drivers/gpu/drm/sun4i/sun4i_lvds.h |  18 ++-
 drivers/gpu/drm/sun4i/sun4i_tcon.c | 238 +++++++++++++++++++++++++++++-
 drivers/gpu/drm/sun4i/sun4i_tcon.h |  29 ++++-
 5 files changed, 467 insertions(+), 2 deletions(-)
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_lvds.c
 create mode 100644 drivers/gpu/drm/sun4i/sun4i_lvds.h

diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile
index 241cce172728..cd7e0016aaa8 100644
--- a/drivers/gpu/drm/sun4i/Makefile
+++ b/drivers/gpu/drm/sun4i/Makefile
@@ -13,6 +13,7 @@ sun8i-mixer-y			+= sun8i_mixer.o sun8i_ui.o
 
 sun4i-tcon-y			+= sun4i_crtc.o
 sun4i-tcon-y			+= sun4i_dotclock.o
+sun4i-tcon-y			+= sun4i_lvds.o
 sun4i-tcon-y			+= sun4i_tcon.o
 sun4i-tcon-y			+= sun4i_rgb.o
 
diff --git a/drivers/gpu/drm/sun4i/sun4i_lvds.c b/drivers/gpu/drm/sun4i/sun4i_lvds.c
new file mode 100644
index 000000000000..635a3f505ecb
--- /dev/null
+++ b/drivers/gpu/drm/sun4i/sun4i_lvds.c
@@ -0,0 +1,183 @@
+/*
+ * Copyright (C) 2015 NextThing Co
+ * Copyright (C) 2015-2017 Free Electrons
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include <linux/clk.h>
+
+#include <drm/drmP.h>
+#include <drm/drm_atomic_helper.h>
+#include <drm/drm_crtc_helper.h>
+#include <drm/drm_of.h>
+#include <drm/drm_panel.h>
+
+#include "sun4i_crtc.h"
+#include "sun4i_tcon.h"
+#include "sun4i_lvds.h"
+
+struct sun4i_lvds {
+	struct drm_connector	connector;
+	struct drm_encoder	encoder;
+
+	struct sun4i_tcon	*tcon;
+};
+
+static inline struct sun4i_lvds *
+drm_connector_to_sun4i_lvds(struct drm_connector *connector)
+{
+	return container_of(connector, struct sun4i_lvds,
+			    connector);
+}
+
+static inline struct sun4i_lvds *
+drm_encoder_to_sun4i_lvds(struct drm_encoder *encoder)
+{
+	return container_of(encoder, struct sun4i_lvds,
+			    encoder);
+}
+
+static int sun4i_lvds_get_modes(struct drm_connector *connector)
+{
+	struct sun4i_lvds *lvds =
+		drm_connector_to_sun4i_lvds(connector);
+	struct sun4i_tcon *tcon = lvds->tcon;
+
+	return drm_panel_get_modes(tcon->panel);
+}
+
+static struct drm_connector_helper_funcs sun4i_lvds_con_helper_funcs = {
+	.get_modes	= sun4i_lvds_get_modes,
+};
+
+static void
+sun4i_lvds_connector_destroy(struct drm_connector *connector)
+{
+	struct sun4i_lvds *lvds = drm_connector_to_sun4i_lvds(connector);
+	struct sun4i_tcon *tcon = lvds->tcon;
+
+	drm_panel_detach(tcon->panel);
+	drm_connector_cleanup(connector);
+}
+
+static const struct drm_connector_funcs sun4i_lvds_con_funcs = {
+	.fill_modes		= drm_helper_probe_single_connector_modes,
+	.destroy		= sun4i_lvds_connector_destroy,
+	.reset			= drm_atomic_helper_connector_reset,
+	.atomic_duplicate_state	= drm_atomic_helper_connector_duplicate_state,
+	.atomic_destroy_state	= drm_atomic_helper_connector_destroy_state,
+};
+
+static void sun4i_lvds_encoder_enable(struct drm_encoder *encoder)
+{
+	struct sun4i_lvds *lvds = drm_encoder_to_sun4i_lvds(encoder);
+	struct sun4i_tcon *tcon = lvds->tcon;
+
+	DRM_DEBUG_DRIVER("Enabling LVDS output\n");
+
+	if (!IS_ERR(tcon->panel)) {
+		drm_panel_prepare(tcon->panel);
+		drm_panel_enable(tcon->panel);
+	}
+}
+
+static void sun4i_lvds_encoder_disable(struct drm_encoder *encoder)
+{
+	struct sun4i_lvds *lvds = drm_encoder_to_sun4i_lvds(encoder);
+	struct sun4i_tcon *tcon = lvds->tcon;
+
+	DRM_DEBUG_DRIVER("Disabling LVDS output\n");
+
+	if (!IS_ERR(tcon->panel)) {
+		drm_panel_disable(tcon->panel);
+		drm_panel_unprepare(tcon->panel);
+	}
+}
+
+static const struct drm_encoder_helper_funcs sun4i_lvds_enc_helper_funcs = {
+	.disable	= sun4i_lvds_encoder_disable,
+	.enable		= sun4i_lvds_encoder_enable,
+};
+
+static const struct drm_encoder_funcs sun4i_lvds_enc_funcs = {
+	.destroy	= drm_encoder_cleanup,
+};
+
+int sun4i_lvds_init(struct drm_device *drm, struct sun4i_tcon *tcon)
+{
+	struct drm_encoder *encoder;
+	struct drm_bridge *bridge;
+	struct sun4i_lvds *lvds;
+	int ret;
+
+	lvds = devm_kzalloc(drm->dev, sizeof(*lvds), GFP_KERNEL);
+	if (!lvds)
+		return -ENOMEM;
+	lvds->tcon = tcon;
+	encoder = &lvds->encoder;
+
+	ret = drm_of_find_panel_or_bridge(tcon->dev->of_node, 1, 0,
+					  &tcon->panel, &bridge);
+	if (ret) {
+		dev_info(drm->dev, "No panel or bridge found... LVDS output disabled\n");
+		return 0;
+	}
+
+	drm_encoder_helper_add(&lvds->encoder,
+			       &sun4i_lvds_enc_helper_funcs);
+	ret = drm_encoder_init(drm,
+			       &lvds->encoder,
+			       &sun4i_lvds_enc_funcs,
+			       DRM_MODE_ENCODER_LVDS,
+			       NULL);
+	if (ret) {
+		dev_err(drm->dev, "Couldn't initialise the lvds encoder\n");
+		goto err_out;
+	}
+
+	/* The LVDS encoder can only work with the TCON channel 0 */
+	lvds->encoder.possible_crtcs = BIT(drm_crtc_index(&tcon->crtc->crtc));
+
+	if (tcon->panel) {
+		drm_connector_helper_add(&lvds->connector,
+					 &sun4i_lvds_con_helper_funcs);
+		ret = drm_connector_init(drm, &lvds->connector,
+					 &sun4i_lvds_con_funcs,
+					 DRM_MODE_CONNECTOR_LVDS);
+		if (ret) {
+			dev_err(drm->dev, "Couldn't initialise the lvds connector\n");
+			goto err_cleanup_connector;
+		}
+
+		drm_mode_connector_attach_encoder(&lvds->connector,
+						  &lvds->encoder);
+
+		ret = drm_panel_attach(tcon->panel, &lvds->connector);
+		if (ret) {
+			dev_err(drm->dev, "Couldn't attach our panel\n");
+			goto err_cleanup_connector;
+		}
+	}
+
+	if (bridge) {
+		ret = drm_bridge_attach(encoder, bridge, NULL);
+		if (ret) {
+			dev_err(drm->dev, "Couldn't attach our bridge\n");
+			goto err_cleanup_connector;
+		}
+	}
+
+	return 0;
+
+err_cleanup_connector:
+	drm_encoder_cleanup(&lvds->encoder);
+err_out:
+	return ret;
+}
+EXPORT_SYMBOL(sun4i_lvds_init);
diff --git a/drivers/gpu/drm/sun4i/sun4i_lvds.h b/drivers/gpu/drm/sun4i/sun4i_lvds.h
new file mode 100644
index 000000000000..1b8fad4b82c3
--- /dev/null
+++ b/drivers/gpu/drm/sun4i/sun4i_lvds.h
@@ -0,0 +1,18 @@
+/*
+ * Copyright (C) 2015 NextThing Co
+ * Copyright (C) 2015-2017 Free Electrons
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#ifndef _SUN4I_LVDS_H_
+#define _SUN4I_LVDS_H_
+
+int sun4i_lvds_init(struct drm_device *drm, struct sun4i_tcon *tcon);
+
+#endif /* _SUN4I_LVDS_H_ */
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index 5b6cd7c43e4b..46ce6daa0b1a 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -31,10 +31,52 @@
 #include "sun4i_crtc.h"
 #include "sun4i_dotclock.h"
 #include "sun4i_drv.h"
+#include "sun4i_lvds.h"
 #include "sun4i_rgb.h"
 #include "sun4i_tcon.h"
 #include "sunxi_engine.h"
 
+static struct drm_connector *sun4i_tcon_get_connector(const struct drm_encoder *encoder)
+{
+	struct drm_connector *connector;
+	struct drm_connector_list_iter iter;
+
+	drm_connector_list_iter_begin(encoder->dev, &iter);
+	drm_for_each_connector_iter(connector, &iter)
+		if (connector->encoder == encoder) {
+			drm_connector_list_iter_end(&iter);
+			return connector;
+		}
+	drm_connector_list_iter_end(&iter);
+
+	return NULL;
+}
+
+static int sun4i_tcon_get_pixel_depth(const struct drm_encoder *encoder)
+{
+	struct drm_connector *connector;
+	struct drm_display_info *info;
+
+	connector = sun4i_tcon_get_connector(encoder);
+	if (!connector)
+		return -EINVAL;
+
+	info = &connector->display_info;
+	if (info->num_bus_formats != 1)
+		return -EINVAL;
+
+	switch (info->bus_formats[0]) {
+	case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
+		return 18;
+
+	case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
+	case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
+		return 24;
+	}
+
+	return -EINVAL;
+}
+
 static void sun4i_tcon_channel_set_status(struct sun4i_tcon *tcon, int channel,
 					  bool enabled)
 {
@@ -65,13 +107,58 @@ static void sun4i_tcon_channel_set_status(struct sun4i_tcon *tcon, int channel,
 		clk_disable_unprepare(clk);
 }
 
+static void sun4i_tcon_lvds_set_status(struct sun4i_tcon *tcon,
+				       const struct drm_encoder *encoder,
+				       bool enabled)
+{
+	if (enabled) {
+		u8 val;
+
+		regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_IF_REG,
+				   SUN4I_TCON0_LVDS_IF_EN,
+				   SUN4I_TCON0_LVDS_IF_EN);
+
+		regmap_write(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG,
+			     SUN4I_TCON0_LVDS_ANA0_C(2) |
+			     SUN4I_TCON0_LVDS_ANA0_V(3) |
+			     SUN4I_TCON0_LVDS_ANA0_PD(2) |
+			     SUN4I_TCON0_LVDS_ANA0_EN_LDO);
+		udelay(2);
+
+		regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG,
+				   SUN4I_TCON0_LVDS_ANA0_EN_MB,
+				   SUN4I_TCON0_LVDS_ANA0_EN_MB);
+		udelay(2);
+
+		regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG,
+				   SUN4I_TCON0_LVDS_ANA0_EN_DRVC,
+				   SUN4I_TCON0_LVDS_ANA0_EN_DRVC);
+
+		if (sun4i_tcon_get_pixel_depth(encoder) == 18)
+			val = 7;
+		else
+			val = 0xf;
+
+		regmap_write_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG,
+				  SUN4I_TCON0_LVDS_ANA0_EN_DRVD(0xf),
+				  SUN4I_TCON0_LVDS_ANA0_EN_DRVD(val));
+	} else {
+		regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_IF_REG,
+				   SUN4I_TCON0_LVDS_IF_EN, 0);
+	}
+}
+
 void sun4i_tcon_set_status(struct sun4i_tcon *tcon,
 			   const struct drm_encoder *encoder,
 			   bool enabled)
 {
+	bool is_lvds = false;
 	int channel;
 
 	switch (encoder->encoder_type) {
+	case DRM_MODE_ENCODER_LVDS:
+		is_lvds = true;
+		/* Fallthrough */
 	case DRM_MODE_ENCODER_NONE:
 		channel = 0;
 		break;
@@ -84,10 +171,16 @@ void sun4i_tcon_set_status(struct sun4i_tcon *tcon,
 		return;
 	}
 
+	if (is_lvds && !enabled)
+		sun4i_tcon_lvds_set_status(tcon, encoder, false);
+
 	regmap_update_bits(tcon->regs, SUN4I_TCON_GCTL_REG,
 			   SUN4I_TCON_GCTL_TCON_ENABLE,
 			   enabled ? SUN4I_TCON_GCTL_TCON_ENABLE : 0);
 
+	if (is_lvds && enabled)
+		sun4i_tcon_lvds_set_status(tcon, encoder, true);
+
 	sun4i_tcon_channel_set_status(tcon, channel, enabled);
 }
 
@@ -170,6 +263,78 @@ static void sun4i_tcon0_mode_set_common(struct sun4i_tcon *tcon,
 		     SUN4I_TCON0_BASIC0_Y(mode->crtc_vdisplay));
 }
 
+static void sun4i_tcon0_mode_set_lvds(struct sun4i_tcon *tcon,
+				      const struct drm_encoder *encoder,
+				      const struct drm_display_mode *mode)
+{
+	unsigned int bp;
+	u8 clk_delay;
+	u32 reg, val = 0;
+
+	tcon->dclk_min_div = 7;
+	tcon->dclk_max_div = 7;
+	sun4i_tcon0_mode_set_common(tcon, mode);
+
+	/* Adjust clock delay */
+	clk_delay = sun4i_tcon_get_clk_delay(mode, 0);
+	regmap_update_bits(tcon->regs, SUN4I_TCON0_CTL_REG,
+			   SUN4I_TCON0_CTL_CLK_DELAY_MASK,
+			   SUN4I_TCON0_CTL_CLK_DELAY(clk_delay));
+
+	/*
+	 * This is called a backporch in the register documentation,
+	 * but it really is the back porch + hsync
+	 */
+	bp = mode->crtc_htotal - mode->crtc_hsync_start;
+	DRM_DEBUG_DRIVER("Setting horizontal total %d, backporch %d\n",
+			 mode->crtc_htotal, bp);
+
+	/* Set horizontal display timings */
+	regmap_write(tcon->regs, SUN4I_TCON0_BASIC1_REG,
+		     SUN4I_TCON0_BASIC1_H_TOTAL(mode->htotal) |
+		     SUN4I_TCON0_BASIC1_H_BACKPORCH(bp));
+
+	/*
+	 * This is called a backporch in the register documentation,
+	 * but it really is the back porch + hsync
+	 */
+	bp = mode->crtc_vtotal - mode->crtc_vsync_start;
+	DRM_DEBUG_DRIVER("Setting vertical total %d, backporch %d\n",
+			 mode->crtc_vtotal, bp);
+
+	/* Set vertical display timings */
+	regmap_write(tcon->regs, SUN4I_TCON0_BASIC2_REG,
+		     SUN4I_TCON0_BASIC2_V_TOTAL(mode->crtc_vtotal * 2) |
+		     SUN4I_TCON0_BASIC2_V_BACKPORCH(bp));
+
+	reg = SUN4I_TCON0_LVDS_IF_CLK_SEL_TCON0 |
+		SUN4I_TCON0_LVDS_IF_DATA_POL_NORMAL |
+		SUN4I_TCON0_LVDS_IF_CLK_POL_NORMAL;
+	if (sun4i_tcon_get_pixel_depth(encoder) == 24)
+		reg |= SUN4I_TCON0_LVDS_IF_BITWIDTH_24BITS;
+	else
+		reg |= SUN4I_TCON0_LVDS_IF_BITWIDTH_18BITS;
+
+	regmap_write(tcon->regs, SUN4I_TCON0_LVDS_IF_REG, reg);
+
+	/* Setup the polarity of the various signals */
+	if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
+		val |= SUN4I_TCON0_IO_POL_HSYNC_POSITIVE;
+
+	if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
+		val |= SUN4I_TCON0_IO_POL_VSYNC_POSITIVE;
+
+	regmap_write(tcon->regs, SUN4I_TCON0_IO_POL_REG, val);
+
+	/* Map output pins to channel 0 */
+	regmap_update_bits(tcon->regs, SUN4I_TCON_GCTL_REG,
+			   SUN4I_TCON_GCTL_IOMAP_MASK,
+			   SUN4I_TCON_GCTL_IOMAP_TCON0);
+
+	/* Enable the output on the pins */
+	regmap_write(tcon->regs, SUN4I_TCON0_IO_TRI_REG, 0xe0000000);
+}
+
 static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon,
 				     const struct drm_display_mode *mode)
 {
@@ -336,6 +501,9 @@ void sun4i_tcon_mode_set(struct sun4i_tcon *tcon,
 			 const struct drm_display_mode *mode)
 {
 	switch (encoder->encoder_type) {
+	case DRM_MODE_ENCODER_LVDS:
+		sun4i_tcon0_mode_set_lvds(tcon, encoder, mode);
+		break;
 	case DRM_MODE_ENCODER_NONE:
 		sun4i_tcon0_mode_set_rgb(tcon, mode);
 		sun4i_tcon_set_mux(tcon, 0, encoder);
@@ -667,7 +835,9 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master,
 	struct drm_device *drm = data;
 	struct sun4i_drv *drv = drm->dev_private;
 	struct sunxi_engine *engine;
+	struct device_node *remote;
 	struct sun4i_tcon *tcon;
+	bool has_lvds_rst, has_lvds_pll, can_lvds;
 	int ret;
 
 	engine = sun4i_tcon_find_engine(drv, dev->of_node);
@@ -698,6 +868,54 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master,
 		return ret;
 	}
 
+	/*
+	 * This can only be made optional since we've had DT nodes
+	 * without the LVDS reset properties.
+	 *
+	 * If the property is missing, just disable LVDS, and print a
+	 * warning.
+	 */
+	tcon->lvds_rst = devm_reset_control_get_optional(dev, "lvds");
+	if (IS_ERR(tcon->lvds_rst)) {
+		dev_err(dev, "Couldn't get our reset line\n");
+		return PTR_ERR(tcon->lvds_rst);
+	} else if (tcon->lvds_rst) {
+		has_lvds_rst = true;
+		reset_control_reset(tcon->lvds_rst);
+	} else {
+		has_lvds_rst = false;
+	}
+
+	/*
+	 * This can only be made optional since we've had DT nodes
+	 * without the LVDS reset properties.
+	 *
+	 * If the property is missing, just disable LVDS, and print a
+	 * warning.
+	 */
+	if (tcon->quirks->has_lvds_pll) {
+		tcon->lvds_pll = devm_clk_get(dev, "pll-lvds");
+		if (IS_ERR(tcon->lvds_pll)) {
+			if (PTR_ERR(tcon->lvds_pll) == -ENOENT) {
+				has_lvds_pll = false;
+			} else {
+				dev_err(dev, "Couldn't get the LVDS PLL\n");
+				return PTR_ERR(tcon->lvds_rst);
+			}
+		} else {
+			has_lvds_pll = true;
+		}
+	}
+
+	if (!has_lvds_rst || (tcon->quirks->has_lvds_pll && !has_lvds_pll)) {
+		dev_warn(dev,
+			 "Missing LVDS properties, Please upgrade your DT\n");
+		dev_warn(dev, "LVDS output disabled\n");
+		can_lvds = false;
+	} else {
+		can_lvds = true;
+	}
+
 	ret = sun4i_tcon_init_clocks(dev, tcon);
 	if (ret) {
 		dev_err(dev, "Couldn't init our TCON clocks\n");
@@ -729,7 +947,21 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master,
 		goto err_free_dotclock;
 	}
 
-	ret = sun4i_rgb_init(drm, tcon);
+	/*
+	 * If we have an LVDS panel connected to the TCON, we should
+	 * just probe the LVDS connector. Otherwise, just probe RGB as
+	 * we used to.
+	 */
+	remote = of_graph_get_remote_node(dev->of_node, 1, 0);
+	if (of_device_is_compatible(remote, "panel-lvds"))
+		if (can_lvds)
+			ret = sun4i_lvds_init(drm, tcon);
+		else
+			ret = -EINVAL;
+	else
+		ret = sun4i_rgb_init(drm, tcon);
+	of_node_put(remote);
+
 	if (ret < 0)
 		goto err_free_dotclock;
 
@@ -879,12 +1111,14 @@ static const struct sun4i_tcon_quirks sun5i_a13_quirks = {
 
 static const struct sun4i_tcon_quirks sun6i_a31_quirks = {
 	.has_channel_1		= true,
+	.has_lvds_pll		= true,
 	.needs_de_be_mux	= true,
 	.set_mux		= sun6i_tcon_set_mux,
 };
 
 static const struct sun4i_tcon_quirks sun6i_a31s_quirks = {
 	.has_channel_1		= true,
+	.has_lvds_pll		= true,
 	.needs_de_be_mux	= true,
 };
 
@@ -895,7 +1129,7 @@ static const struct sun4i_tcon_quirks sun7i_a20_quirks = {
 };
 
 static const struct sun4i_tcon_quirks sun8i_a33_quirks = {
-	/* nothing is supported */
+	.has_lvds_pll		= true,
 };
 
 static const struct sun4i_tcon_quirks sun8i_v3s_quirks = {
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h
index 4141fbd97ddf..0b4dc771167c 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.h
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h
@@ -70,7 +70,21 @@
 #define SUN4I_TCON0_TTL2_REG			0x78
 #define SUN4I_TCON0_TTL3_REG			0x7c
 #define SUN4I_TCON0_TTL4_REG			0x80
+
 #define SUN4I_TCON0_LVDS_IF_REG			0x84
+#define SUN4I_TCON0_LVDS_IF_EN				BIT(31)
+#define SUN4I_TCON0_LVDS_IF_BITWIDTH_MASK		BIT(26)
+#define SUN4I_TCON0_LVDS_IF_BITWIDTH_18BITS		(1 << 26)
+#define SUN4I_TCON0_LVDS_IF_BITWIDTH_24BITS		(0 << 26)
+#define SUN4I_TCON0_LVDS_IF_CLK_SEL_MASK		BIT(20)
+#define SUN4I_TCON0_LVDS_IF_CLK_SEL_TCON0		(1 << 20)
+#define SUN4I_TCON0_LVDS_IF_CLK_POL_MASK		BIT(4)
+#define SUN4I_TCON0_LVDS_IF_CLK_POL_NORMAL		(1 << 4)
+#define SUN4I_TCON0_LVDS_IF_CLK_POL_INV			(0 << 4)
+#define SUN4I_TCON0_LVDS_IF_DATA_POL_MASK		GENMASK(3, 0)
+#define SUN4I_TCON0_LVDS_IF_DATA_POL_NORMAL		(0xf)
+#define SUN4I_TCON0_LVDS_IF_DATA_POL_INV		(0)
+
 #define SUN4I_TCON0_IO_POL_REG			0x88
 #define SUN4I_TCON0_IO_POL_DCLK_PHASE(phase)		((phase & 3) << 28)
 #define SUN4I_TCON0_IO_POL_HSYNC_POSITIVE		BIT(25)
@@ -131,6 +145,16 @@
 #define SUN4I_TCON_CEU_RANGE_G_REG		0x144
 #define SUN4I_TCON_CEU_RANGE_B_REG		0x148
 #define SUN4I_TCON_MUX_CTRL_REG			0x200
+
+#define SUN4I_TCON0_LVDS_ANA0_REG		0x220
+#define SUN4I_TCON0_LVDS_ANA0_EN_MB			BIT(31)
+#define SUN4I_TCON0_LVDS_ANA0_EN_LDO			BIT(30)
+#define SUN4I_TCON0_LVDS_ANA0_EN_DRVC			BIT(24)
+#define SUN4I_TCON0_LVDS_ANA0_EN_DRVD(x)		(((x) & 0xf) << 20)
+#define SUN4I_TCON0_LVDS_ANA0_C(x)			(((x) & 3) << 17)
+#define SUN4I_TCON0_LVDS_ANA0_V(x)			(((x) & 3) << 8)
+#define SUN4I_TCON0_LVDS_ANA0_PD(x)			(((x) & 3) << 4)
+
 #define SUN4I_TCON1_FILL_CTL_REG		0x300
 #define SUN4I_TCON1_FILL_BEG0_REG		0x304
 #define SUN4I_TCON1_FILL_END0_REG		0x308
@@ -149,6 +173,7 @@ struct sun4i_tcon;
 
 struct sun4i_tcon_quirks {
 	bool	has_channel_1;	/* a33 does not have channel 1 */
+	bool	has_lvds_pll;	/* Can we mux the LVDS clock to a PLL? */
 	bool	needs_de_be_mux; /* sun6i needs mux to select backend */
 
 	/* callback to handle tcon muxing options */
@@ -167,6 +192,9 @@ struct sun4i_tcon {
 	struct clk			*sclk0;
 	struct clk			*sclk1;
 
+	/* Possible mux for the LVDS clock */
+	struct clk			*lvds_pll;
+
 	/* Pixel clock */
 	struct clk			*dclk;
 	u8				dclk_max_div;
@@ -174,6 +202,7 @@ struct sun4i_tcon {
 
 	/* Reset control */
 	struct reset_control		*lcd_rst;
+	struct reset_control		*lvds_rst;
 
 	struct drm_panel		*panel;
 
-- 
git-series 0.9.1

[PATCH v2 11/18] drm/sun4i: Add A83T support

[Maxime Ripard]

Add support for the A83T display pipeline.

Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 3 +++
 drivers/gpu/drm/sun4i/sun4i_drv.c                             | 2 ++
 drivers/gpu/drm/sun4i/sun4i_tcon.c                            | 5 +++++
 drivers/gpu/drm/sun4i/sun8i_mixer.c                           | 4 ++++
 4 files changed, 14 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index d4259a4f5171..d6b52e5c48c0 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -93,6 +93,7 @@ Required properties:
    * allwinner,sun6i-a31s-tcon
    * allwinner,sun7i-a20-tcon
    * allwinner,sun8i-a33-tcon
+   * allwinner,sun8i-a83t-tcon-lcd
    * allwinner,sun8i-v3s-tcon
  - reg: base address and size of memory-mapped region
  - interrupts: interrupt associated to this IP
@@ -224,6 +225,7 @@ supported.
 
 Required properties:
   - compatible: value must be one of:
+    * allwinner,sun8i-a83t-de2-mixer
     * allwinner,sun8i-v3s-de2-mixer
   - reg: base address and size of the memory-mapped region.
   - clocks: phandles to the clocks feeding the mixer
@@ -253,6 +255,7 @@ Required properties:
     * allwinner,sun6i-a31s-display-engine
     * allwinner,sun7i-a20-display-engine
     * allwinner,sun8i-a33-display-engine
+    * allwinner,sun8i-a83t-display-engine
     * allwinner,sun8i-v3s-display-engine
 
   - allwinner,pipelines: list of phandle to the display engine
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c
index 75c76cdd82bc..c418be2f22be 100644
--- a/drivers/gpu/drm/sun4i/sun4i_drv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
@@ -193,6 +193,7 @@ static bool sun4i_drv_node_is_tcon(struct device_node *node)
 		of_device_is_compatible(node, "allwinner,sun6i-a31s-tcon") ||
 		of_device_is_compatible(node, "allwinner,sun7i-a20-tcon") ||
 		of_device_is_compatible(node, "allwinner,sun8i-a33-tcon") ||
+		of_device_is_compatible(node, "allwinner,sun8i-a83t-tcon-lcd") ||
 		of_device_is_compatible(node, "allwinner,sun8i-v3s-tcon");
 }
 
@@ -353,6 +354,7 @@ static const struct of_device_id sun4i_drv_of_table[] = {
 	{ .compatible = "allwinner,sun6i-a31s-display-engine" },
 	{ .compatible = "allwinner,sun7i-a20-display-engine" },
 	{ .compatible = "allwinner,sun8i-a33-display-engine" },
+	{ .compatible = "allwinner,sun8i-a83t-display-engine" },
 	{ .compatible = "allwinner,sun8i-v3s-display-engine" },
 	{ }
 };
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index 46ce6daa0b1a..871df75793a9 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -1132,6 +1132,10 @@ static const struct sun4i_tcon_quirks sun8i_a33_quirks = {
 	.has_lvds_pll		= true,
 };
 
+static const struct sun4i_tcon_quirks sun8i_a83t_quirks = {
+	/* nothing is supported */
+};
+
 static const struct sun4i_tcon_quirks sun8i_v3s_quirks = {
 	/* nothing is supported */
 };
@@ -1143,6 +1147,7 @@ static const struct of_device_id sun4i_tcon_of_table[] = {
 	{ .compatible = "allwinner,sun6i-a31s-tcon", .data = &sun6i_a31s_quirks },
 	{ .compatible = "allwinner,sun7i-a20-tcon", .data = &sun7i_a20_quirks },
 	{ .compatible = "allwinner,sun8i-a33-tcon", .data = &sun8i_a33_quirks },
+	{ .compatible = "allwinner,sun8i-a83t-tcon-lcd", .data = &sun8i_a83t_quirks },
 	{ .compatible = "allwinner,sun8i-v3s-tcon", .data = &sun8i_v3s_quirks },
 	{ }
 };
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c
index 44d5e639ebb2..5a1376965270 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
@@ -395,6 +395,10 @@ static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = {
 
 static const struct of_device_id sun8i_mixer_of_table[] = {
 	{
+		.compatible = "allwinner,sun8i-a83t-de2-mixer",
+		.data = &sun8i_v3s_mixer_cfg,
+	},
+	{
 		.compatible = "allwinner,sun8i-v3s-de2-mixer",
 		.data = &sun8i_v3s_mixer_cfg,
 	},
-- 
git-series 0.9.1

[PATCH v2 12/18] drm/sun4i: Add A83T support

[Maxime Ripard]

Add support for the A83T display pipeline.

Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 drivers/gpu/drm/sun4i/sun8i_mixer.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c
index 5a1376965270..83b83e070fd5 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
@@ -388,6 +388,11 @@ static int sun8i_mixer_remove(struct platform_device *pdev)
 	return 0;
 }
 
+static const struct sun8i_mixer_cfg sun8i_a83t_mixer_cfg = {
+	.vi_num = 1,
+	.ui_num = 3,
+};
+
 static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = {
 	.vi_num = 2,
 	.ui_num = 1,
@@ -396,7 +401,7 @@ static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = {
 static const struct of_device_id sun8i_mixer_of_table[] = {
 	{
 		.compatible = "allwinner,sun8i-a83t-de2-mixer",
-		.data = &sun8i_v3s_mixer_cfg,
+		.data = &sun8i_a83t_mixer_cfg,
 	},
 	{
 		.compatible = "allwinner,sun8i-v3s-de2-mixer",
-- 
git-series 0.9.1

[PATCH v2 13/18] ARM: dts: sun8i: a83t: Add display pipeline

[Maxime Ripard]

The display pipeline on the A83T is mainly composed of the mixers and
TCONs, plus various encoders.

Let's add the first mixer and TCON to the DTSI since the only board I have
can use only the LVDS output on the first TCON. The other parts will be
added eventually.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 arch/arm/boot/dts/sun8i-a83t.dtsi | 79 ++++++++++++++++++++++++++++++++-
 1 file changed, 79 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 19acae1b4089..0a91f5c17f51 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -45,8 +45,10 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
 #include <dt-bindings/clock/sun8i-a83t-ccu.h>
+#include <dt-bindings/clock/sun8i-de2.h>
 #include <dt-bindings/clock/sun8i-r-ccu.h>
 #include <dt-bindings/reset/sun8i-a83t-ccu.h>
+#include <dt-bindings/reset/sun8i-de2.h>
 #include <dt-bindings/reset/sun8i-r-ccu.h>
 
 / {
@@ -151,6 +153,12 @@
 		};
 	};
 
+	de: display-engine {
+		compatible = "allwinner,sun8i-a83t-display-engine";
+		allwinner,pipelines = <&mixer0>;
+		status = "disabled";
+	};
+
 	memory {
 		reg = <0x40000000 0x80000000>;
 		device_type = "memory";
@@ -162,6 +170,44 @@
 		#size-cells = <1>;
 		ranges;
 
+		display_clocks: clock@1000000 {
+			compatible = "allwinner,sun8i-a83t-de2-clk";
+			reg = <0x01000000 0x100000>;
+			clocks = <&ccu CLK_PLL_DE>,
+				 <&ccu CLK_BUS_DE>;
+			clock-names = "mod",
+				      "bus";
+			resets = <&ccu RST_BUS_DE>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+		};
+
+		mixer0: mixer@1100000 {
+			compatible = "allwinner,sun8i-a83t-de2-mixer";
+			reg = <0x01100000 0x100000>;
+			clocks = <&display_clocks CLK_BUS_MIXER0>,
+				 <&display_clocks CLK_MIXER0>;
+			clock-names = "bus",
+				      "mod";
+			resets = <&display_clocks RST_MIXER0>;
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				mixer0_out: port@1 {
+					#address-cells = <1>;
+					#size-cells = <0>;
+					reg = <1>;
+
+					mixer0_out_tcon0: endpoint@0 {
+						reg = <0>;
+						remote-endpoint = <&tcon0_in_mixer0>;
+					};
+				};
+			};
+		};
+
 		syscon: syscon@1c00000 {
 			compatible = "allwinner,sun8i-a83t-system-controller",
 				"syscon";
@@ -177,6 +223,39 @@
 			#dma-cells = <1>;
 		};
 
+		tcon0: lcd-controller@1c0c000 {
+			compatible = "allwinner,sun8i-a83t-tcon-lcd";
+			reg = <0x01c0c000 0x1000>;
+			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>;
+			clock-names = "ahb", "tcon-ch0";
+			clock-output-names = "tcon-pixel-clock";
+			resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>;
+			reset-names = "lcd", "lvds";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				tcon0_in: port@0 {
+					#address-cells = <1>;
+					#size-cells = <0>;
+					reg = <0>;
+
+					tcon0_in_mixer0: endpoint@0 {
+						reg = <0>;
+						remote-endpoint = <&mixer0_out_tcon0>;
+					};
+				};
+
+				tcon0_out: port@1 {
+					#address-cells = <1>;
+					#size-cells = <0>;
+					reg = <1>;
+				};
+			};
+		};
+
 		mmc0: mmc@1c0f000 {
 			compatible = "allwinner,sun8i-a83t-mmc",
 				     "allwinner,sun7i-a20-mmc";
-- 
git-series 0.9.1

[PATCH v2 14/18] ARM: dts: sun8i: a83t: Enable the PWM

[Maxime Ripard]

The A83T has the same PWM block than the H3. Add it to our DT.

Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 arch/arm/boot/dts/sun8i-a83t.dtsi |  9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 0a91f5c17f51..2cb71e460ea2 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -497,6 +497,15 @@
 			status = "disabled";
 		};
 
+		pwm: pwm@1c21400 {
+			compatible = "allwinner,sun8i-a83t-pwm",
+				     "allwinner,sun8i-h3-pwm";
+			reg = <0x01c21400 0x400>;
+			clocks = <&osc24M>;
+			#pwm-cells = <3>;
+			status = "disabled";
+		};
+
 		uart0: serial@1c28000 {
 			compatible = "snps,dw-apb-uart";
 			reg = <0x01c28000 0x400>;
-- 
git-series 0.9.1

[PATCH v2 15/18] ARM: dts: sun8i: a83t: Add LVDS pins group

[Maxime Ripard]

The A83T has an LVDS bus that can be connected to a panel or a bridge. Add
the pinctrl group for it.

Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 arch/arm/boot/dts/sun8i-a83t.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 2cb71e460ea2..b4615f150dbf 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -415,6 +415,12 @@
 			#interrupt-cells = <3>;
 			#gpio-cells = <3>;
 
+			lcd_lvds_pins: lcd-lvds-pins {
+				pins = "PD18", "PD19", "PD20", "PD21", "PD22",
+				       "PD23", "PD24", "PD25", "PD26", "PD27";
+				function = "lvds0";
+			};
+
 			mmc0_pins: mmc0-pins {
 				pins = "PF0", "PF1", "PF2",
 				       "PF3", "PF4", "PF5";
-- 
git-series 0.9.1

[PATCH v2 16/18] ARM: dts: sun8i: a83t: Add the PWM pin group

[Maxime Ripard]

The A83T has a PWM that can be output from the SoC. Let's add a pinctrl
group for it.

Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 arch/arm/boot/dts/sun8i-a83t.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index b4615f150dbf..4bc8f1246513 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -446,6 +446,11 @@
 				bias-pull-up;
 			};
 
+			pwm_pin: pwm-pin {
+				pins = "PD28";
+				function = "pwm";
+			};
+
 			spdif_tx_pin: spdif-tx-pin {
 				pins = "PE18";
 				function = "spdif";
-- 
git-series 0.9.1

[PATCH v2 17/18] ARM: dts: sun8i: a711: Reinstate the PMIC compatible

[Maxime Ripard]

When we added the regulator support in commit 90c5d7cdae64 ("ARM: dts:
sun8i: a711: Add regulator support"), we also dropped the PMIC's
compatible. Since it's not in the PMIC DTSI, unlike most other PMIC
DTSI, it obviously wasn't probing anymore.

Re-add it so that everything works again.

Fixes: 90c5d7cdae64 ("ARM: dts: sun8i: a711: Add regulator support")
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
index 98715538932f..a021ee6da396 100644
--- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
@@ -146,6 +146,7 @@
 	status = "okay";
 
 	axp81x: pmic@3a3 {
+		compatible = "x-powers,axp813";
 		reg = <0x3a3>;
 		interrupt-parent = <&r_intc>;
 		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
-- 
git-series 0.9.1

[PATCH v2 18/18] ARM: dts: sun8i: a711: Enable the LCD

[Maxime Ripard]

The A711 has 1024x600 LVDS panel, with a PWM-based backlight. Add it to our
DT.

Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 61 ++++++++++++++++++++++++-
 1 file changed, 61 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
index a021ee6da396..511fca491fe8 100644
--- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
@@ -45,6 +45,7 @@
 #include "sun8i-a83t.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pwm/pwm.h>
 
 / {
 	model = "TBS A711 Tablet";
@@ -59,6 +60,44 @@
 		stdout-path = "serial0:115200n8";
 	};
 
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
+		enable-gpios = <&pio 3 29 GPIO_ACTIVE_HIGH>;
+
+		brightness-levels = <0 1 2 4 8 16 32 64 128 255>;
+		default-brightness-level = <9>;
+	};
+
+	panel {
+		compatible = "tbs,a711-panel", "panel-lvds";
+		backlight = <&backlight>;
+		power-supply = <&reg_sw>;
+
+		width-mm = <153>;
+		height-mm = <90>;
+		data-mapping = "vesa-24";
+
+		panel-timing {
+			/* 1024x600 @60Hz */
+			clock-frequency = <52000000>;
+			hactive = <1024>;
+			vactive = <600>;
+			hsync-len = <20>;
+			hfront-porch = <180>;
+			hback-porch = <160>;
+			vfront-porch = <12>;
+			vback-porch = <23>;
+			vsync-len = <5>;
+		};
+
+		port {
+			panel_input: endpoint {
+				remote-endpoint = <&tcon0_out_lcd>;
+			};
+		};
+	};
+
 	reg_vbat: reg-vbat {
 		compatible = "regulator-fixed";
 		regulator-name = "vbat";
@@ -89,6 +128,10 @@
 	};
 };
 
+&de {
+	status = "okay";
+};
+
 /*
  * An USB-2 hub is connected here, which also means we don't need to
  * enable the OHCI controller.
@@ -142,6 +185,12 @@
 	status = "okay";
 };
 
+&pwm {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pwm_pin>;
+	status = "okay";
+};
+
 &r_rsb {
 	status = "okay";
 
@@ -323,6 +372,18 @@
 	regulator-name = "vcc-lcd";
 };
 
+&tcon0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&lcd_lvds_pins>;
+};
+
+&tcon0_out {
+	tcon0_out_lcd: endpoint@0 {
+		reg = <0>;
+		remote-endpoint = <&panel_input>;
+	};
+};
+
 &uart0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart0_pb_pins>;
-- 
git-series 0.9.1

Re: [PATCH v2 11/18] drm/sun4i: Add A83T support

[Jernej Škrabec]

Hi Maxime,

Dne ponedeljek, 27. november 2017 ob 16:41:35 CET je Maxime Ripard napisal(a):
> Add support for the A83T display pipeline.
> 
> Reviewed-by: Chen-Yu Tsai <wens@csie.org>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> ---
>  Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 3 +++
>  drivers/gpu/drm/sun4i/sun4i_drv.c                             | 2 ++
>  drivers/gpu/drm/sun4i/sun4i_tcon.c                            | 5 +++++
>  drivers/gpu/drm/sun4i/sun8i_mixer.c                           | 4 ++++
>  4 files changed, 14 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt index
> d4259a4f5171..d6b52e5c48c0 100644
> --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> @@ -93,6 +93,7 @@ Required properties:
>     * allwinner,sun6i-a31s-tcon
>     * allwinner,sun7i-a20-tcon
>     * allwinner,sun8i-a33-tcon
> +   * allwinner,sun8i-a83t-tcon-lcd
>     * allwinner,sun8i-v3s-tcon
>   - reg: base address and size of memory-mapped region
>   - interrupts: interrupt associated to this IP
> @@ -224,6 +225,7 @@ supported.
> 
>  Required properties:
>    - compatible: value must be one of:
> +    * allwinner,sun8i-a83t-de2-mixer

What will be the name of the second mixer, once support for HDMI is added? 
Should we start directly with 0 and 1 postfix ?

>      * allwinner,sun8i-v3s-de2-mixer
>    - reg: base address and size of the memory-mapped region.
>    - clocks: phandles to the clocks feeding the mixer
> @@ -253,6 +255,7 @@ Required properties:
>      * allwinner,sun6i-a31s-display-engine
>      * allwinner,sun7i-a20-display-engine
>      * allwinner,sun8i-a33-display-engine
> +    * allwinner,sun8i-a83t-display-engine
>      * allwinner,sun8i-v3s-display-engine
> 
>    - allwinner,pipelines: list of phandle to the display engine
> diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c
> b/drivers/gpu/drm/sun4i/sun4i_drv.c index 75c76cdd82bc..c418be2f22be 100644
> --- a/drivers/gpu/drm/sun4i/sun4i_drv.c
> +++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
> @@ -193,6 +193,7 @@ static bool sun4i_drv_node_is_tcon(struct device_node
> *node) of_device_is_compatible(node, "allwinner,sun6i-a31s-tcon") ||
>  		of_device_is_compatible(node, "allwinner,sun7i-a20-tcon") ||
>  		of_device_is_compatible(node, "allwinner,sun8i-a33-tcon") ||
> +		of_device_is_compatible(node, "allwinner,sun8i-a83t-tcon-lcd") ||
>  		of_device_is_compatible(node, "allwinner,sun8i-v3s-tcon");
>  }
> 
> @@ -353,6 +354,7 @@ static const struct of_device_id sun4i_drv_of_table[] =
> { { .compatible = "allwinner,sun6i-a31s-display-engine" },
>  	{ .compatible = "allwinner,sun7i-a20-display-engine" },
>  	{ .compatible = "allwinner,sun8i-a33-display-engine" },
> +	{ .compatible = "allwinner,sun8i-a83t-display-engine" },
>  	{ .compatible = "allwinner,sun8i-v3s-display-engine" },
>  	{ }
>  };
> diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c
> b/drivers/gpu/drm/sun4i/sun4i_tcon.c index 46ce6daa0b1a..871df75793a9
> 100644
> --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
> +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
> @@ -1132,6 +1132,10 @@ static const struct sun4i_tcon_quirks
> sun8i_a33_quirks = { .has_lvds_pll		= true,
>  };
> 
> +static const struct sun4i_tcon_quirks sun8i_a83t_quirks = {
> +	/* nothing is supported */
> +};
> +
>  static const struct sun4i_tcon_quirks sun8i_v3s_quirks = {
>  	/* nothing is supported */
>  };
> @@ -1143,6 +1147,7 @@ static const struct of_device_id sun4i_tcon_of_table[]
> = { { .compatible = "allwinner,sun6i-a31s-tcon", .data = &sun6i_a31s_quirks
> }, { .compatible = "allwinner,sun7i-a20-tcon", .data = &sun7i_a20_quirks },
> { .compatible = "allwinner,sun8i-a33-tcon", .data = &sun8i_a33_quirks },
> +	{ .compatible = "allwinner,sun8i-a83t-tcon-lcd", .data =
> &sun8i_a83t_quirks }, { .compatible = "allwinner,sun8i-v3s-tcon", .data =
> &sun8i_v3s_quirks }, { }
>  };
> diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c
> b/drivers/gpu/drm/sun4i/sun8i_mixer.c index 44d5e639ebb2..5a1376965270
> 100644
> --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
> +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
> @@ -395,6 +395,10 @@ static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg
> = {
> 
>  static const struct of_device_id sun8i_mixer_of_table[] = {
>  	{
> +		.compatible = "allwinner,sun8i-a83t-de2-mixer",
> +		.data = &sun8i_v3s_mixer_cfg,
> +	},
> +	{

Maybe you want to squash 12 patch since this works only by luck.

Best regards,
Jernej

>  		.compatible = "allwinner,sun8i-v3s-de2-mixer",
>  		.data = &sun8i_v3s_mixer_cfg,
>  	},
> --
> git-series 0.9.1

Re: [PATCH v2 05/18] drm/sun4i: Force the mixer rate at 150MHz

[Jernej Škrabec]

Hi Maxime,

Dne ponedeljek, 27. november 2017 ob 16:41:29 CET je Maxime Ripard napisal(a):
> It seems like the mixer can only run properly when clocked at 150MHz. In
> order to have something more robust than simply a fire-and-forget
> assigned-clocks-rate, let's put that in the code.
> 
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> ---
>  drivers/gpu/drm/sun4i/sun8i_mixer.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c
> b/drivers/gpu/drm/sun4i/sun8i_mixer.c index cb193c5f1686..c0cdccf772a2
> 100644
> --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
> +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
> @@ -315,6 +315,13 @@ static int sun8i_mixer_bind(struct device *dev, struct
> device *master, }
>  	clk_prepare_enable(mixer->mod_clk);
> 
> +	/*
> +	 * It seems that we need to enforce that rate for whatever
> +	 * reason for the mixer to be functional. Make sure it's the
> +	 * case.
> +	 */
> +	clk_set_rate(mixer->mod_clk, 150000000);
> +

H3 mixer works at much higher rate and if we want to support tv out, it must 
be dividable by 432 MHz, so either 432 MHz or maybe even 864 MHz.

We talked about that few months ago.

I guess this should be read from mixer configuration structure.

Best regards,
Jernej

>  	list_add_tail(&mixer->engine.list, &drv->engine_list);
> 
>  	/* Reset the registers */
> --
> git-series 0.9.1

Re: [PATCH v2 11/18] drm/sun4i: Add A83T support

[Chen-Yu Tsai]

On Mon, Nov 27, 2017 at 11:41 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> Add support for the A83T display pipeline.
>
> Reviewed-by: Chen-Yu Tsai <wens@csie.org>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> ---
>  Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 3 +++

Rob mentioned that he'd like to see these multiple one-liners be
in a separate patch.

>  drivers/gpu/drm/sun4i/sun4i_drv.c                             | 2 ++
>  drivers/gpu/drm/sun4i/sun4i_tcon.c                            | 5 +++++
>  drivers/gpu/drm/sun4i/sun8i_mixer.c                           | 4 ++++
>  4 files changed, 14 insertions(+)

Also not sure why you have two patches with the same subject.

ChenYu

Re: [PATCH v2 00/18] drm/sun4i: Add A83t LVDS support

[Jernej Škrabec]

Hi,

Dne ponedeljek, 27. november 2017 ob 16:41:24 CET je Maxime Ripard napisal(a):
> Hi,
> 
> Here is an attempt at supporting the LVDS output in our DRM driver. This
> has been tested on the A83T (with DE2), but since everything is basically
> in the TCON, it should also be usable on the older SoCs with minor
> modifications.
> 
> This was the occasion to refactor a bunch of things. The most notable ones
> would be the documentation, and split of the UI layers in the mixer code,

I'm just about to send my series of patches which would add full support for 
UI and VI planes (multi planes, HW scaling, all color formats). It would clash 
with your patches 6, 7 and 8.

Preview of my work as a single patch can be seen here:
https://github.com/jernejsk/linux-1/commit/
8fdef3b510b567bfe81c87b0c3e73ddcf4f5b711

How would you like to handle that? Some changes are similar, but I don't see a 
point rebasing my patches atop of yours.

Since I'm almost done, I will just send them and we can discuss them then.

Best regards,
Jernej

> and the switch to kfifo for our endpoint parsing code in the driver that
> fixes an issue introduced by the switch to BFS.
> 
> Let me know what you think,
> Maxime

Re: [PATCH v2 05/18] drm/sun4i: Force the mixer rate at 150MHz

[Maxime Ripard]

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On Mon, Nov 27, 2017 at 05:07:04PM +0100, Jernej Škrabec wrote:
> Hi Maxime,
> 
> Dne ponedeljek, 27. november 2017 ob 16:41:29 CET je Maxime Ripard napisal(a):
> > It seems like the mixer can only run properly when clocked at 150MHz. In
> > order to have something more robust than simply a fire-and-forget
> > assigned-clocks-rate, let's put that in the code.
> > 
> > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> > ---
> >  drivers/gpu/drm/sun4i/sun8i_mixer.c | 7 +++++++
> >  1 file changed, 7 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c
> > b/drivers/gpu/drm/sun4i/sun8i_mixer.c index cb193c5f1686..c0cdccf772a2
> > 100644
> > --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
> > +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
> > @@ -315,6 +315,13 @@ static int sun8i_mixer_bind(struct device *dev, struct
> > device *master, }
> >  	clk_prepare_enable(mixer->mod_clk);
> > 
> > +	/*
> > +	 * It seems that we need to enforce that rate for whatever
> > +	 * reason for the mixer to be functional. Make sure it's the
> > +	 * case.
> > +	 */
> > +	clk_set_rate(mixer->mod_clk, 150000000);
> > +
> 
> H3 mixer works at much higher rate and if we want to support tv out, it must 
> be dividable by 432 MHz, so either 432 MHz or maybe even 864 MHz.
> 
> We talked about that few months ago.
> 
> I guess this should be read from mixer configuration structure.

That works for me. Actually, I didn't need it at all for the LVDS
output on the A83t, the default seems to work just fine. Do you know
what it's related to? Maybe we can make that a bit more dynamic?

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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Re: [PATCH v2 11/18] drm/sun4i: Add A83T support

[Maxime Ripard]

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Hi,

On Tue, Nov 28, 2017 at 12:19:44AM +0800, Chen-Yu Tsai wrote:
> On Mon, Nov 27, 2017 at 11:41 PM, Maxime Ripard
> <maxime.ripard@free-electrons.com> wrote:
> > Add support for the A83T display pipeline.
> >
> > Reviewed-by: Chen-Yu Tsai <wens@csie.org>
> > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> > ---
> >  Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 3 +++
> 
> Rob mentioned that he'd like to see these multiple one-liners be
> in a separate patch.

I'll change that.

> 
> >  drivers/gpu/drm/sun4i/sun4i_drv.c                             | 2 ++
> >  drivers/gpu/drm/sun4i/sun4i_tcon.c                            | 5 +++++
> >  drivers/gpu/drm/sun4i/sun8i_mixer.c                           | 4 ++++
> >  4 files changed, 14 insertions(+)
> 
> Also not sure why you have two patches with the same subject.

Yeah, it's a rebase gone wrong... The second one was meant to be
folded into this one.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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Re: [PATCH v2 11/18] drm/sun4i: Add A83T support

[Maxime Ripard]

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Hi,

On Mon, Nov 27, 2017 at 05:01:49PM +0100, Jernej Škrabec wrote:
> Dne ponedeljek, 27. november 2017 ob 16:41:35 CET je Maxime Ripard napisal(a):
> > Add support for the A83T display pipeline.
> > 
> > Reviewed-by: Chen-Yu Tsai <wens@csie.org>
> > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> > ---
> >  Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 3 +++
> >  drivers/gpu/drm/sun4i/sun4i_drv.c                             | 2 ++
> >  drivers/gpu/drm/sun4i/sun4i_tcon.c                            | 5 +++++
> >  drivers/gpu/drm/sun4i/sun8i_mixer.c                           | 4 ++++
> >  4 files changed, 14 insertions(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> > b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt index
> > d4259a4f5171..d6b52e5c48c0 100644
> > --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> > +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> > @@ -93,6 +93,7 @@ Required properties:
> >     * allwinner,sun6i-a31s-tcon
> >     * allwinner,sun7i-a20-tcon
> >     * allwinner,sun8i-a33-tcon
> > +   * allwinner,sun8i-a83t-tcon-lcd
> >     * allwinner,sun8i-v3s-tcon
> >   - reg: base address and size of memory-mapped region
> >   - interrupts: interrupt associated to this IP
> > @@ -224,6 +225,7 @@ supported.
> > 
> >  Required properties:
> >    - compatible: value must be one of:
> > +    * allwinner,sun8i-a83t-de2-mixer
> 
> What will be the name of the second mixer, once support for HDMI is added? 
> Should we start directly with 0 and 1 postfix ?

What are the differences exactly without the two mixers?

I was hoping to be able to cover them all using properties, indices
are usually pretty badly received in compatibles.

> >  static const struct of_device_id sun8i_mixer_of_table[] = {
> >  	{
> > +		.compatible = "allwinner,sun8i-a83t-de2-mixer",
> > +		.data = &sun8i_v3s_mixer_cfg,
> > +	},
> > +	{
> 
> Maybe you want to squash 12 patch since this works only by luck.

Yeah, I totally meant to do that :)

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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Re: [PATCH v2 11/18] drm/sun4i: Add A83T support

[Icenowy Zheng]

在 2017-11-28 17:02，Maxime Ripard 写道：
> Hi,
> 
> On Mon, Nov 27, 2017 at 05:01:49PM +0100, Jernej Škrabec wrote:
>> Dne ponedeljek, 27. november 2017 ob 16:41:35 CET je Maxime Ripard 
>> napisal(a):
>> > Add support for the A83T display pipeline.
>> >
>> > Reviewed-by: Chen-Yu Tsai <wens@csie.org>
>> > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
>> > ---
>> >  Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 3 +++
>> >  drivers/gpu/drm/sun4i/sun4i_drv.c                             | 2 ++
>> >  drivers/gpu/drm/sun4i/sun4i_tcon.c                            | 5 +++++
>> >  drivers/gpu/drm/sun4i/sun8i_mixer.c                           | 4 ++++
>> >  4 files changed, 14 insertions(+)
>> >
>> > diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
>> > b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt index
>> > d4259a4f5171..d6b52e5c48c0 100644
>> > --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
>> > +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
>> > @@ -93,6 +93,7 @@ Required properties:
>> >     * allwinner,sun6i-a31s-tcon
>> >     * allwinner,sun7i-a20-tcon
>> >     * allwinner,sun8i-a33-tcon
>> > +   * allwinner,sun8i-a83t-tcon-lcd
>> >     * allwinner,sun8i-v3s-tcon
>> >   - reg: base address and size of memory-mapped region
>> >   - interrupts: interrupt associated to this IP
>> > @@ -224,6 +225,7 @@ supported.
>> >
>> >  Required properties:
>> >    - compatible: value must be one of:
>> > +    * allwinner,sun8i-a83t-de2-mixer
>> 
>> What will be the name of the second mixer, once support for HDMI is 
>> added?
>> Should we start directly with 0 and 1 postfix ?
> 
> What are the differences exactly without the two mixers?
> 
> I was hoping to be able to cover them all using properties, indices
> are usually pretty badly received in compatibles.

1. VEP is only available on the VI channel in mixer0. (VEP may mean
Video Enhance Processor)
2. Smart Backlight is only available in mixer0's on SoCs with LCD.
3. Writeback function is only available in mixer0.

> 
>> >  static const struct of_device_id sun8i_mixer_of_table[] = {
>> >  	{
>> > +		.compatible = "allwinner,sun8i-a83t-de2-mixer",
>> > +		.data = &sun8i_v3s_mixer_cfg,
>> > +	},
>> > +	{
>> 
>> Maybe you want to squash 12 patch since this works only by luck.
> 
> Yeah, I totally meant to do that :)
> 
> Thanks!
> Maxime

Re: [PATCH v2 00/18] drm/sun4i: Add A83t LVDS support

[Maxime Ripard]

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Hi Jernej,

On Mon, Nov 27, 2017 at 05:20:52PM +0100, Jernej Škrabec wrote:
> Hi,
> 
> Dne ponedeljek, 27. november 2017 ob 16:41:24 CET je Maxime Ripard napisal(a):
> > Hi,
> > 
> > Here is an attempt at supporting the LVDS output in our DRM driver. This
> > has been tested on the A83T (with DE2), but since everything is basically
> > in the TCON, it should also be usable on the older SoCs with minor
> > modifications.
> > 
> > This was the occasion to refactor a bunch of things. The most notable ones
> > would be the documentation, and split of the UI layers in the mixer code,
> 
> I'm just about to send my series of patches which would add full support for 
> UI and VI planes (multi planes, HW scaling, all color formats). It would clash 
> with your patches 6, 7 and 8.
> 
> Preview of my work as a single patch can be seen here:
> https://github.com/jernejsk/linux-1/commit/
> 8fdef3b510b567bfe81c87b0c3e73ddcf4f5b711
> 
> How would you like to handle that? Some changes are similar, but I don't see a 
> point rebasing my patches atop of yours.
> 
> Since I'm almost done, I will just send them and we can discuss them then.

Yeah, I had a quick look at it and it doesn't look like it conflicts
too much. I'll have a closer look as soon as I can, but I guess we can
just go in parallel and whoever hits first wins.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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Re: [PATCH v2 11/18] drm/sun4i: Add A83T support

[Maxime Ripard]

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On Tue, Nov 28, 2017 at 07:50:19PM +0800, Icenowy Zheng wrote:
> 在 2017-11-28 17:02，Maxime Ripard 写道：
> > Hi,
> > 
> > On Mon, Nov 27, 2017 at 05:01:49PM +0100, Jernej Škrabec wrote:
> > > Dne ponedeljek, 27. november 2017 ob 16:41:35 CET je Maxime Ripard
> > > napisal(a):
> > > > Add support for the A83T display pipeline.
> > > >
> > > > Reviewed-by: Chen-Yu Tsai <wens@csie.org>
> > > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> > > > ---
> > > >  Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 3 +++
> > > >  drivers/gpu/drm/sun4i/sun4i_drv.c                             | 2 ++
> > > >  drivers/gpu/drm/sun4i/sun4i_tcon.c                            | 5 +++++
> > > >  drivers/gpu/drm/sun4i/sun8i_mixer.c                           | 4 ++++
> > > >  4 files changed, 14 insertions(+)
> > > >
> > > > diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> > > > b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt index
> > > > d4259a4f5171..d6b52e5c48c0 100644
> > > > --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> > > > +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> > > > @@ -93,6 +93,7 @@ Required properties:
> > > >     * allwinner,sun6i-a31s-tcon
> > > >     * allwinner,sun7i-a20-tcon
> > > >     * allwinner,sun8i-a33-tcon
> > > > +   * allwinner,sun8i-a83t-tcon-lcd
> > > >     * allwinner,sun8i-v3s-tcon
> > > >   - reg: base address and size of memory-mapped region
> > > >   - interrupts: interrupt associated to this IP
> > > > @@ -224,6 +225,7 @@ supported.
> > > >
> > > >  Required properties:
> > > >    - compatible: value must be one of:
> > > > +    * allwinner,sun8i-a83t-de2-mixer
> > > 
> > > What will be the name of the second mixer, once support for HDMI is
> > > added?
> > > Should we start directly with 0 and 1 postfix ?
> > 
> > What are the differences exactly without the two mixers?
> > 
> > I was hoping to be able to cover them all using properties, indices
> > are usually pretty badly received in compatibles.
> 
> 1. VEP is only available on the VI channel in mixer0. (VEP may mean
> Video Enhance Processor)
> 2. Smart Backlight is only available in mixer0's on SoCs with LCD.
> 3. Writeback function is only available in mixer0.

Then yeah, we can totally support that using properties.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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Re: [PATCH v2 11/18] drm/sun4i: Add A83T support

[Jernej Škrabec]

Hi,

Dne torek, 28. november 2017 ob 10:02:23 CET je Maxime Ripard napisal(a):
> Hi,
> 
> On Mon, Nov 27, 2017 at 05:01:49PM +0100, Jernej Škrabec wrote:
> > Dne ponedeljek, 27. november 2017 ob 16:41:35 CET je Maxime Ripard 
napisal(a):
> > > Add support for the A83T display pipeline.
> > > 
> > > Reviewed-by: Chen-Yu Tsai <wens@csie.org>
> > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> > > ---
> > > 
> > >  Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 3 +++
> > >  drivers/gpu/drm/sun4i/sun4i_drv.c                             | 2 ++
> > >  drivers/gpu/drm/sun4i/sun4i_tcon.c                            | 5 +++++
> > >  drivers/gpu/drm/sun4i/sun8i_mixer.c                           | 4 ++++
> > >  4 files changed, 14 insertions(+)
> > > 
> > > diff --git
> > > a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> > > b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt index
> > > d4259a4f5171..d6b52e5c48c0 100644
> > > --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> > > +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> > > 
> > > @@ -93,6 +93,7 @@ Required properties:
> > >     * allwinner,sun6i-a31s-tcon
> > >     * allwinner,sun7i-a20-tcon
> > >     * allwinner,sun8i-a33-tcon
> > > 
> > > +   * allwinner,sun8i-a83t-tcon-lcd
> > > 
> > >     * allwinner,sun8i-v3s-tcon
> > >   
> > >   - reg: base address and size of memory-mapped region
> > >   - interrupts: interrupt associated to this IP
> > > 
> > > @@ -224,6 +225,7 @@ supported.
> > > 
> > >  Required properties:
> > >    - compatible: value must be one of:
> > > +    * allwinner,sun8i-a83t-de2-mixer
> > 
> > What will be the name of the second mixer, once support for HDMI is added?
> > Should we start directly with 0 and 1 postfix ?
> 
> What are the differences exactly without the two mixers?

Mixer properties:
- mixer index (0 or 1), important for determining CCSC base (see my patches)
- number of VI planes (usually 1)
- number of UI planes (usually 1 or 3)
- writeback support (yes/no)
- scale line buffer length (2048 or 4096)
- smart backligth support (yes/no)

channel properties (for both, VI and UI):
- scaler support (yes/no, usually yes)
- overlay count (seems to be always 4)
- VEP support (yes/no)

Those are properties found in BSP de_feat.c, so I guess that's enough to make 
any kind of decision in the code.

Usually, but we can't count on that, first mixer has 1 VI and 3 UI planes and 
second mixer has 1 VI and 1 UI plane.

Best regards,
Jernej

> 
> I was hoping to be able to cover them all using properties, indices
> are usually pretty badly received in compatibles.
> 
> > >  static const struct of_device_id sun8i_mixer_of_table[] = {
> > >  
> > >  	{
> > > 
> > > +		.compatible = "allwinner,sun8i-a83t-de2-mixer",
> > > +		.data = &sun8i_v3s_mixer_cfg,
> > > +	},
> > > +	{
> > 
> > Maybe you want to squash 12 patch since this works only by luck.
> 
> Yeah, I totally meant to do that :)
> 
> Thanks!
> Maxime
> 
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com

Re: [PATCH v2 01/18] dt-bindings: panel: lvds: Document power-supply property

[Rob Herring]

Please CC DT list.

On Mon, Nov 27, 2017 at 9:41 AM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> The power-supply property is used by a vast majority of panels, including
> panel-simple. Let's document it as a common property
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> ---
>  Documentation/devicetree/bindings/display/panel/panel-common.txt | 6 ++++++
>  Documentation/devicetree/bindings/display/panel/panel-lvds.txt   | 1 +
>  2 files changed, 7 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/display/panel/panel-common.txt b/Documentation/devicetree/bindings/display/panel/panel-common.txt
> index ec52c472c845..125ea68052af 100644
> --- a/Documentation/devicetree/bindings/display/panel/panel-common.txt
> +++ b/Documentation/devicetree/bindings/display/panel/panel-common.txt
> @@ -78,6 +78,12 @@ used for panels that implement compatible control signals.
>    while active. Active high reset signals can be supported by inverting the
>    GPIO specifier polarity flag.
>
> +Power
> +-----
> +
> +- power-supply: many display panels need an additional power supply in
> +  order to be fully powered-up. For such panels, power-supply contains
> +  a phandle to the regulator powering the panel.
>
>  Backlight
>  ---------
> diff --git a/Documentation/devicetree/bindings/display/panel/panel-lvds.txt b/Documentation/devicetree/bindings/display/panel/panel-lvds.txt
> index b938269f841e..250850a2150b 100644
> --- a/Documentation/devicetree/bindings/display/panel/panel-lvds.txt
> +++ b/Documentation/devicetree/bindings/display/panel/panel-lvds.txt
> @@ -32,6 +32,7 @@ Optional properties:
>  - label: See panel-common.txt.
>  - gpios: See panel-common.txt.
>  - backlight: See panel-common.txt.
> +- power-supply: See panel-common.txt.

simple-panel.txt should do the same.

Really, I'd like to see panel-common.txt and simple-panel.txt merged
and simple-panel.txt removed altogether. But there are a lot of
references back to simple-panel.txt. A given panel still needs to say
what common properties it uses or doesn't use. Omitting a property
like power-supply is ambiguous and can either mean "I only have 1
supply" or "I haven't thought about supplies yet there are more than
1".

Rob

Re: [PATCH v2 05/18] drm/sun4i: Force the mixer rate at 150MHz

[Jernej Škrabec]

Hi!

Dne torek, 28. november 2017 ob 09:58:26 CET je Maxime Ripard napisal(a):
> On Mon, Nov 27, 2017 at 05:07:04PM +0100, Jernej Škrabec wrote:
> > Hi Maxime,
> > 
> > Dne ponedeljek, 27. november 2017 ob 16:41:29 CET je Maxime Ripard 
napisal(a):
> > > It seems like the mixer can only run properly when clocked at 150MHz. In
> > > order to have something more robust than simply a fire-and-forget
> > > assigned-clocks-rate, let's put that in the code.
> > > 
> > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> > > ---
> > > 
> > >  drivers/gpu/drm/sun4i/sun8i_mixer.c | 7 +++++++
> > >  1 file changed, 7 insertions(+)
> > > 
> > > diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c
> > > b/drivers/gpu/drm/sun4i/sun8i_mixer.c index cb193c5f1686..c0cdccf772a2
> > > 100644
> > > --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
> > > +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
> > > @@ -315,6 +315,13 @@ static int sun8i_mixer_bind(struct device *dev,
> > > struct
> > > device *master, }
> > > 
> > >  	clk_prepare_enable(mixer->mod_clk);
> > > 
> > > +	/*
> > > +	 * It seems that we need to enforce that rate for whatever
> > > +	 * reason for the mixer to be functional. Make sure it's the
> > > +	 * case.
> > > +	 */
> > > +	clk_set_rate(mixer->mod_clk, 150000000);
> > > +
> > 
> > H3 mixer works at much higher rate and if we want to support tv out, it
> > must be dividable by 432 MHz, so either 432 MHz or maybe even 864 MHz.
> > 
> > We talked about that few months ago.
> > 
> > I guess this should be read from mixer configuration structure.
> 
> That works for me. Actually, I didn't need it at all for the LVDS
> output on the A83t, the default seems to work just fine. Do you know
> what it's related to? Maybe we can make that a bit more dynamic?

There doesn't seem to be any rule to determine which frequency is best, except 
on H3. Obviously, it must be high enough to process data for current 
resolution, which means 150 MHz should be just enough for 1920x1080@60Hz. I 
guess we should just check BSP configuration and use same rate since AW 
engineers may know something we don't.

Best regards,
Jernej

> 
> Maxime
> 
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com

Re: [PATCH v2 11/18] drm/sun4i: Add A83T support

[Maxime Ripard]

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On Tue, Nov 28, 2017 at 04:48:55PM +0100, Jernej Škrabec wrote:
> > On Mon, Nov 27, 2017 at 05:01:49PM +0100, Jernej Škrabec wrote:
> > > Dne ponedeljek, 27. november 2017 ob 16:41:35 CET je Maxime Ripard 
> napisal(a):
> > > > Add support for the A83T display pipeline.
> > > > 
> > > > Reviewed-by: Chen-Yu Tsai <wens@csie.org>
> > > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> > > > ---
> > > > 
> > > >  Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 3 +++
> > > >  drivers/gpu/drm/sun4i/sun4i_drv.c                             | 2 ++
> > > >  drivers/gpu/drm/sun4i/sun4i_tcon.c                            | 5 +++++
> > > >  drivers/gpu/drm/sun4i/sun8i_mixer.c                           | 4 ++++
> > > >  4 files changed, 14 insertions(+)
> > > > 
> > > > diff --git
> > > > a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> > > > b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt index
> > > > d4259a4f5171..d6b52e5c48c0 100644
> > > > --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> > > > +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> > > > 
> > > > @@ -93,6 +93,7 @@ Required properties:
> > > >     * allwinner,sun6i-a31s-tcon
> > > >     * allwinner,sun7i-a20-tcon
> > > >     * allwinner,sun8i-a33-tcon
> > > > 
> > > > +   * allwinner,sun8i-a83t-tcon-lcd
> > > > 
> > > >     * allwinner,sun8i-v3s-tcon
> > > >   
> > > >   - reg: base address and size of memory-mapped region
> > > >   - interrupts: interrupt associated to this IP
> > > > 
> > > > @@ -224,6 +225,7 @@ supported.
> > > > 
> > > >  Required properties:
> > > >    - compatible: value must be one of:
> > > > +    * allwinner,sun8i-a83t-de2-mixer
> > > 
> > > What will be the name of the second mixer, once support for HDMI is added?
> > > Should we start directly with 0 and 1 postfix ?
> > 
> > What are the differences exactly without the two mixers?
> 
> Mixer properties:
> - mixer index (0 or 1), important for determining CCSC base (see my patches)

Is that the only thing we need to determine?

> - number of VI planes (usually 1)

Usually or always?

> - number of UI planes (usually 1 or 3)

Same question.

> - writeback support (yes/no)
> - scale line buffer length (2048 or 4096)
> - smart backligth support (yes/no)
> 
> channel properties (for both, VI and UI):
> - scaler support (yes/no, usually yes)
> - overlay count (seems to be always 4)
> - VEP support (yes/no)
> 
> Those are properties found in BSP de_feat.c, so I guess that's enough to make 
> any kind of decision in the code.
> 
> Usually, but we can't count on that, first mixer has 1 VI and 3 UI planes and 
> second mixer has 1 VI and 1 UI plane.

Right. So that would be easy to support using a property as well. The
only difference would be the CSC base.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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Re: [PATCH v2 11/18] drm/sun4i: Add A83T support

[Jernej Škrabec]

Hi!

Dne torek, 28. november 2017 ob 23:00:14 CET je Maxime Ripard napisal(a):
> On Tue, Nov 28, 2017 at 04:48:55PM +0100, Jernej Škrabec wrote:
> > > On Mon, Nov 27, 2017 at 05:01:49PM +0100, Jernej Škrabec wrote:
> > > > Dne ponedeljek, 27. november 2017 ob 16:41:35 CET je Maxime Ripard
> > 
> > napisal(a):
> > > > > Add support for the A83T display pipeline.
> > > > > 
> > > > > Reviewed-by: Chen-Yu Tsai <wens@csie.org>
> > > > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> > > > > ---
> > > > > 
> > > > >  Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 3
> > > > >  +++
> > > > >  drivers/gpu/drm/sun4i/sun4i_drv.c                             | 2
> > > > >  ++
> > > > >  drivers/gpu/drm/sun4i/sun4i_tcon.c                            | 5
> > > > >  +++++
> > > > >  drivers/gpu/drm/sun4i/sun8i_mixer.c                           | 4
> > > > >  ++++
> > > > >  4 files changed, 14 insertions(+)
> > > > > 
> > > > > diff --git
> > > > > a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> > > > > b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> > > > > index
> > > > > d4259a4f5171..d6b52e5c48c0 100644
> > > > > --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> > > > > +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> > > > > 
> > > > > @@ -93,6 +93,7 @@ Required properties:
> > > > >     * allwinner,sun6i-a31s-tcon
> > > > >     * allwinner,sun7i-a20-tcon
> > > > >     * allwinner,sun8i-a33-tcon
> > > > > 
> > > > > +   * allwinner,sun8i-a83t-tcon-lcd
> > > > > 
> > > > >     * allwinner,sun8i-v3s-tcon
> > > > >   
> > > > >   - reg: base address and size of memory-mapped region
> > > > >   - interrupts: interrupt associated to this IP
> > > > > 
> > > > > @@ -224,6 +225,7 @@ supported.
> > > > > 
> > > > >  Required properties:
> > > > >    - compatible: value must be one of:
> > > > > +    * allwinner,sun8i-a83t-de2-mixer
> > > > 
> > > > What will be the name of the second mixer, once support for HDMI is
> > > > added?
> > > > Should we start directly with 0 and 1 postfix ?
> > > 
> > > What are the differences exactly without the two mixers?
> > 
> > Mixer properties:
> > - mixer index (0 or 1), important for determining CCSC base (see my
> > patches)
> Is that the only thing we need to determine?

For now, mixer index is important only for determining CCSC base in conjuction 
with VEP capability. Obviously, I can't exclude that there is some other case 
where that mixer index is needed.

Can't we just add reg property for that?

> 
> > - number of VI planes (usually 1)
> 
> Usually or always?

V3s mixer has 2 VI channels and others have 1.

(Channel is better term, since is used throughout BSP code)

> 
> > - number of UI planes (usually 1 or 3)
> 
> Same question.

For now, most SoCs (I didn't check all) have 3 UI channels on first mixer and 1 
UI channel on second mixer. Except V3s, which have only one mixer with 1 UI 
channel.

> 
> > - writeback support (yes/no)
> > - scale line buffer length (2048 or 4096)
> > - smart backligth support (yes/no)
> > 
> > channel properties (for both, VI and UI):
> > - scaler support (yes/no, usually yes)

Again, V3s is exception here. Scaler is not supported on UI channel, but other 
SoCs have scalers on all channels.

Disclaimer: I didn't check DE2 capabilities of all SoCs, only few populars.

Best regards,
Jernej

> > - overlay count (seems to be always 4)
> > - VEP support (yes/no)
> > 
> > Those are properties found in BSP de_feat.c, so I guess that's enough to
> > make any kind of decision in the code.
> > 
> > Usually, but we can't count on that, first mixer has 1 VI and 3 UI planes
> > and second mixer has 1 VI and 1 UI plane.
> 
> Right. So that would be easy to support using a property as well. The
> only difference would be the CSC base.
> 
> Maxime
> 
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com

Re: [PATCH v2 05/18] drm/sun4i: Force the mixer rate at 150MHz

[Maxime Ripard]

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On Tue, Nov 28, 2017 at 10:56:31PM +0100, Jernej Škrabec wrote:
> Hi!
> 
> Dne torek, 28. november 2017 ob 09:58:26 CET je Maxime Ripard napisal(a):
> > On Mon, Nov 27, 2017 at 05:07:04PM +0100, Jernej Škrabec wrote:
> > > Hi Maxime,
> > > 
> > > Dne ponedeljek, 27. november 2017 ob 16:41:29 CET je Maxime Ripard 
> napisal(a):
> > > > It seems like the mixer can only run properly when clocked at 150MHz. In
> > > > order to have something more robust than simply a fire-and-forget
> > > > assigned-clocks-rate, let's put that in the code.
> > > > 
> > > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> > > > ---
> > > > 
> > > >  drivers/gpu/drm/sun4i/sun8i_mixer.c | 7 +++++++
> > > >  1 file changed, 7 insertions(+)
> > > > 
> > > > diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c
> > > > b/drivers/gpu/drm/sun4i/sun8i_mixer.c index cb193c5f1686..c0cdccf772a2
> > > > 100644
> > > > --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
> > > > +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
> > > > @@ -315,6 +315,13 @@ static int sun8i_mixer_bind(struct device *dev,
> > > > struct
> > > > device *master, }
> > > > 
> > > >  	clk_prepare_enable(mixer->mod_clk);
> > > > 
> > > > +	/*
> > > > +	 * It seems that we need to enforce that rate for whatever
> > > > +	 * reason for the mixer to be functional. Make sure it's the
> > > > +	 * case.
> > > > +	 */
> > > > +	clk_set_rate(mixer->mod_clk, 150000000);
> > > > +
> > > 
> > > H3 mixer works at much higher rate and if we want to support tv out, it
> > > must be dividable by 432 MHz, so either 432 MHz or maybe even 864 MHz.
> > > 
> > > We talked about that few months ago.
> > > 
> > > I guess this should be read from mixer configuration structure.
> > 
> > That works for me. Actually, I didn't need it at all for the LVDS
> > output on the A83t, the default seems to work just fine. Do you know
> > what it's related to? Maybe we can make that a bit more dynamic?
> 
> There doesn't seem to be any rule to determine which frequency is best, except 
> on H3. Obviously, it must be high enough to process data for current 
> resolution, which means 150 MHz should be just enough for 1920x1080@60Hz. I 
> guess we should just check BSP configuration and use same rate since AW 
> engineers may know something we don't.

Yeah, that makes sense. And the fact that it's in the kernel allows us
to change for something smarter when we want (and if we need) to.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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Re: [PATCH v2 01/18] dt-bindings: panel: lvds: Document power-supply property

[Maxime Ripard]

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Hi Rob,

On Tue, Nov 28, 2017 at 11:48:47AM -0600, Rob Herring wrote:
> Please CC DT list.
> 
> On Mon, Nov 27, 2017 at 9:41 AM, Maxime Ripard
> <maxime.ripard@free-electrons.com> wrote:
> > The power-supply property is used by a vast majority of panels, including
> > panel-simple. Let's document it as a common property
> >
> > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> > ---
> >  Documentation/devicetree/bindings/display/panel/panel-common.txt | 6 ++++++
> >  Documentation/devicetree/bindings/display/panel/panel-lvds.txt   | 1 +
> >  2 files changed, 7 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/display/panel/panel-common.txt b/Documentation/devicetree/bindings/display/panel/panel-common.txt
> > index ec52c472c845..125ea68052af 100644
> > --- a/Documentation/devicetree/bindings/display/panel/panel-common.txt
> > +++ b/Documentation/devicetree/bindings/display/panel/panel-common.txt
> > @@ -78,6 +78,12 @@ used for panels that implement compatible control signals.
> >    while active. Active high reset signals can be supported by inverting the
> >    GPIO specifier polarity flag.
> >
> > +Power
> > +-----
> > +
> > +- power-supply: many display panels need an additional power supply in
> > +  order to be fully powered-up. For such panels, power-supply contains
> > +  a phandle to the regulator powering the panel.
> >
> >  Backlight
> >  ---------
> > diff --git a/Documentation/devicetree/bindings/display/panel/panel-lvds.txt b/Documentation/devicetree/bindings/display/panel/panel-lvds.txt
> > index b938269f841e..250850a2150b 100644
> > --- a/Documentation/devicetree/bindings/display/panel/panel-lvds.txt
> > +++ b/Documentation/devicetree/bindings/display/panel/panel-lvds.txt
> > @@ -32,6 +32,7 @@ Optional properties:
> >  - label: See panel-common.txt.
> >  - gpios: See panel-common.txt.
> >  - backlight: See panel-common.txt.
> > +- power-supply: See panel-common.txt.
> 
> simple-panel.txt should do the same.

I'll make simple-panel do that then

> Really, I'd like to see panel-common.txt and simple-panel.txt merged
> and simple-panel.txt removed altogether. But there are a lot of
> references back to simple-panel.txt. A given panel still needs to say
> what common properties it uses or doesn't use. Omitting a property
> like power-supply is ambiguous and can either mean "I only have 1
> supply" or "I haven't thought about supplies yet there are more than
> 1".

While I agree with you here, and in general, power-supply should be
mandatory, do you expect me to fix all the panel bindings as part of
this serie?

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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Re: [PATCH v2 11/18] drm/sun4i: Add A83T support

[Maxime Ripard]

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On Tue, Nov 28, 2017 at 11:33:44PM +0100, Jernej Škrabec wrote:
> Hi!
> 
> Dne torek, 28. november 2017 ob 23:00:14 CET je Maxime Ripard napisal(a):
> > On Tue, Nov 28, 2017 at 04:48:55PM +0100, Jernej Škrabec wrote:
> > > > On Mon, Nov 27, 2017 at 05:01:49PM +0100, Jernej Škrabec wrote:
> > > > > Dne ponedeljek, 27. november 2017 ob 16:41:35 CET je Maxime Ripard
> > > 
> > > napisal(a):
> > > > > > Add support for the A83T display pipeline.
> > > > > > 
> > > > > > Reviewed-by: Chen-Yu Tsai <wens@csie.org>
> > > > > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> > > > > > ---
> > > > > > 
> > > > > >  Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 3
> > > > > >  +++
> > > > > >  drivers/gpu/drm/sun4i/sun4i_drv.c                             | 2
> > > > > >  ++
> > > > > >  drivers/gpu/drm/sun4i/sun4i_tcon.c                            | 5
> > > > > >  +++++
> > > > > >  drivers/gpu/drm/sun4i/sun8i_mixer.c                           | 4
> > > > > >  ++++
> > > > > >  4 files changed, 14 insertions(+)
> > > > > > 
> > > > > > diff --git
> > > > > > a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> > > > > > b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> > > > > > index
> > > > > > d4259a4f5171..d6b52e5c48c0 100644
> > > > > > --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> > > > > > +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> > > > > > 
> > > > > > @@ -93,6 +93,7 @@ Required properties:
> > > > > >     * allwinner,sun6i-a31s-tcon
> > > > > >     * allwinner,sun7i-a20-tcon
> > > > > >     * allwinner,sun8i-a33-tcon
> > > > > > 
> > > > > > +   * allwinner,sun8i-a83t-tcon-lcd
> > > > > > 
> > > > > >     * allwinner,sun8i-v3s-tcon
> > > > > >   
> > > > > >   - reg: base address and size of memory-mapped region
> > > > > >   - interrupts: interrupt associated to this IP
> > > > > > 
> > > > > > @@ -224,6 +225,7 @@ supported.
> > > > > > 
> > > > > >  Required properties:
> > > > > >    - compatible: value must be one of:
> > > > > > +    * allwinner,sun8i-a83t-de2-mixer
> > > > > 
> > > > > What will be the name of the second mixer, once support for HDMI is
> > > > > added?
> > > > > Should we start directly with 0 and 1 postfix ?
> > > > 
> > > > What are the differences exactly without the two mixers?
> > > 
> > > Mixer properties:
> > > - mixer index (0 or 1), important for determining CCSC base (see my
> > > patches)
> > Is that the only thing we need to determine?
> 
> For now, mixer index is important only for determining CCSC base in conjuction 
> with VEP capability. Obviously, I can't exclude that there is some other case 
> where that mixer index is needed.

That's unfortunate...

> Can't we just add reg property for that?

No, reg is here specifically for the bus address, not for an index,
and in general, indices are poorly perceived and have been subject to
a lot of debate in the past. Hence why I'd really like to avoid any
solution looking like this. But I guess we don't really have the
choice either.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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Re: [PATCH v2 01/18] dt-bindings: panel: lvds: Document power-supply property

[Rob Herring]

On Thu, Nov 30, 2017 at 9:30 AM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> Hi Rob,
>
> On Tue, Nov 28, 2017 at 11:48:47AM -0600, Rob Herring wrote:
>> Please CC DT list.
>>
>> On Mon, Nov 27, 2017 at 9:41 AM, Maxime Ripard
>> <maxime.ripard@free-electrons.com> wrote:
>> > The power-supply property is used by a vast majority of panels, including
>> > panel-simple. Let's document it as a common property
>> >
>> > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
>> > ---
>> >  Documentation/devicetree/bindings/display/panel/panel-common.txt | 6 ++++++
>> >  Documentation/devicetree/bindings/display/panel/panel-lvds.txt   | 1 +
>> >  2 files changed, 7 insertions(+)
>> >
>> > diff --git a/Documentation/devicetree/bindings/display/panel/panel-common.txt b/Documentation/devicetree/bindings/display/panel/panel-common.txt
>> > index ec52c472c845..125ea68052af 100644
>> > --- a/Documentation/devicetree/bindings/display/panel/panel-common.txt
>> > +++ b/Documentation/devicetree/bindings/display/panel/panel-common.txt
>> > @@ -78,6 +78,12 @@ used for panels that implement compatible control signals.
>> >    while active. Active high reset signals can be supported by inverting the
>> >    GPIO specifier polarity flag.
>> >
>> > +Power
>> > +-----
>> > +
>> > +- power-supply: many display panels need an additional power supply in
>> > +  order to be fully powered-up. For such panels, power-supply contains
>> > +  a phandle to the regulator powering the panel.
>> >
>> >  Backlight
>> >  ---------
>> > diff --git a/Documentation/devicetree/bindings/display/panel/panel-lvds.txt b/Documentation/devicetree/bindings/display/panel/panel-lvds.txt
>> > index b938269f841e..250850a2150b 100644
>> > --- a/Documentation/devicetree/bindings/display/panel/panel-lvds.txt
>> > +++ b/Documentation/devicetree/bindings/display/panel/panel-lvds.txt
>> > @@ -32,6 +32,7 @@ Optional properties:
>> >  - label: See panel-common.txt.
>> >  - gpios: See panel-common.txt.
>> >  - backlight: See panel-common.txt.
>> > +- power-supply: See panel-common.txt.
>>
>> simple-panel.txt should do the same.
>
> I'll make simple-panel do that then
>
>> Really, I'd like to see panel-common.txt and simple-panel.txt merged
>> and simple-panel.txt removed altogether. But there are a lot of
>> references back to simple-panel.txt. A given panel still needs to say
>> what common properties it uses or doesn't use. Omitting a property
>> like power-supply is ambiguous and can either mean "I only have 1
>> supply" or "I haven't thought about supplies yet there are more than
>> 1".
>
> While I agree with you here, and in general, power-supply should be
> mandatory, do you expect me to fix all the panel bindings as part of
> this serie?

No, certainly not.

Rob

Re: [PATCH v2 11/18] drm/sun4i: Add A83T support

[Jernej Škrabec]

Dne četrtek, 30. november 2017 ob 16:33:12 CET je Maxime Ripard napisal(a):
> On Tue, Nov 28, 2017 at 11:33:44PM +0100, Jernej Škrabec wrote:
> > Hi!
> > 
> > Dne torek, 28. november 2017 ob 23:00:14 CET je Maxime Ripard napisal(a):
> > > On Tue, Nov 28, 2017 at 04:48:55PM +0100, Jernej Škrabec wrote:
> > > > > On Mon, Nov 27, 2017 at 05:01:49PM +0100, Jernej Škrabec wrote:
> > > > > > Dne ponedeljek, 27. november 2017 ob 16:41:35 CET je Maxime Ripard
> > > > 
> > > > napisal(a):
> > > > > > > Add support for the A83T display pipeline.
> > > > > > > 
> > > > > > > Reviewed-by: Chen-Yu Tsai <wens@csie.org>
> > > > > > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> > > > > > > ---
> > > > > > > 
> > > > > > >  Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt |
> > > > > > >  3
> > > > > > >  +++
> > > > > > >  drivers/gpu/drm/sun4i/sun4i_drv.c                             |
> > > > > > >  2
> > > > > > >  ++
> > > > > > >  drivers/gpu/drm/sun4i/sun4i_tcon.c                            |
> > > > > > >  5
> > > > > > >  +++++
> > > > > > >  drivers/gpu/drm/sun4i/sun8i_mixer.c                           |
> > > > > > >  4
> > > > > > >  ++++
> > > > > > >  4 files changed, 14 insertions(+)
> > > > > > > 
> > > > > > > diff --git
> > > > > > > a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> > > > > > > b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> > > > > > > index
> > > > > > > d4259a4f5171..d6b52e5c48c0 100644
> > > > > > > ---
> > > > > > > a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> > > > > > > +++
> > > > > > > b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> > > > > > > 
> > > > > > > @@ -93,6 +93,7 @@ Required properties:
> > > > > > >     * allwinner,sun6i-a31s-tcon
> > > > > > >     * allwinner,sun7i-a20-tcon
> > > > > > >     * allwinner,sun8i-a33-tcon
> > > > > > > 
> > > > > > > +   * allwinner,sun8i-a83t-tcon-lcd
> > > > > > > 
> > > > > > >     * allwinner,sun8i-v3s-tcon
> > > > > > >   
> > > > > > >   - reg: base address and size of memory-mapped region
> > > > > > >   - interrupts: interrupt associated to this IP
> > > > > > > 
> > > > > > > @@ -224,6 +225,7 @@ supported.
> > > > > > > 
> > > > > > >  Required properties:
> > > > > > >    - compatible: value must be one of:
> > > > > > > +    * allwinner,sun8i-a83t-de2-mixer
> > > > > > 
> > > > > > What will be the name of the second mixer, once support for HDMI
> > > > > > is
> > > > > > added?
> > > > > > Should we start directly with 0 and 1 postfix ?
> > > > > 
> > > > > What are the differences exactly without the two mixers?
> > > > 
> > > > Mixer properties:
> > > > - mixer index (0 or 1), important for determining CCSC base (see my
> > > > patches)
> > > 
> > > Is that the only thing we need to determine?
> > 
> > For now, mixer index is important only for determining CCSC base in
> > conjuction with VEP capability. Obviously, I can't exclude that there is
> > some other case where that mixer index is needed.
> 
> That's unfortunate...

I take a deeper look today about that issue and it seems that mixer index is 
really needed only here. I did only regex search and not line by line check, 
so take this with grain of salt.

Additionally, it seems that this comparison is kind of a hack for V3s. Channel 
output CSC is done through VEP (video enhancement processor, maybe?) unit. 
Those units are only on VI channels. But every SoC with DE2 I checked except 
V3s have 1 VI channel and VEP enabled on first mixer. V3s on the other hand 
have 2 VI channels and no VEP, but same addresses should work for channel 
output CSC according to the code. Of course, that is only a theory, but if you 
want, we can go with quirks structure. Or better yet, with quirk property, 
since there may be some (future?) SoC with two mixers and no VEP unit 
supported.

BTW, how should be DE3 on H6 handled in the future? Registers offsets seems to 
be same within same DE2 and DE3 units, just extended. However, some base 
addresses are different, for example, those connected to VEP. I don't think 
new driver is needed, just some quirks structure which would tell DE version.

Best regards,
Jernej

> 
> > Can't we just add reg property for that?
> 
> No, reg is here specifically for the bus address, not for an index,
> and in general, indices are poorly perceived and have been subject to
> a lot of debate in the past. Hence why I'd really like to avoid any
> solution looking like this. But I guess we don't really have the
> choice either.
> 
> Maxime
> 
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com