From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751845AbdLASV0 (ORCPT ); Fri, 1 Dec 2017 13:21:26 -0500 Received: from mail-it0-f66.google.com ([209.85.214.66]:40134 "EHLO mail-it0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750872AbdLASVY (ORCPT ); Fri, 1 Dec 2017 13:21:24 -0500 X-Google-Smtp-Source: AGs4zMY4fA08ypEzsocpqwp4yuwZvtkCq/rCsVSZYR6dM2AlmIx4J6mN+muHN6BUTO3yvehO8rEoUA== Date: Fri, 1 Dec 2017 10:21:19 -0800 From: Brian Norris To: Nickey Yang Cc: robh+dt@kernel.org, heiko@sntech.de, mark.rutland@arm.com, airlied@linux.ie, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, laurent.pinchart@ideasonboard.com, seanpaul@chromium.org, mka@chromium.org, hoegsberg@gmail.com, architt@codeaurora.org, philippe.cornu@st.com, yannick.fertre@st.com, hl@rock-chips.com, zyw@rock-chips.com, xbl@rock-chips.com Subject: Re: [PATCH v4 2/3] dt-bindings: display: rockchip: update DSI controller Message-ID: <20171201182118.GA66630@google.com> References: <1512100685-4015-1-git-send-email-nickey.yang@rock-chips.com> <1512100685-4015-3-git-send-email-nickey.yang@rock-chips.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1512100685-4015-3-git-send-email-nickey.yang@rock-chips.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Dec 01, 2017 at 11:58:04AM +0800, Nickey Yang wrote: > This patch update describe panel/port links, including > unit addresses in documentation of device tree bindings > for the rockchip DSI controller based on the Synopsys > DesignWare MIPI DSI host controller. > > Signed-off-by: Nickey Yang Seems OK to me: Reviewed-by: Brian Norris > > --- > Changes in v4: > - keep the -cells properties > > .../display/rockchip/dw_mipi_dsi_rockchip.txt | 23 ++++++++++++++++++++-- > 1 file changed, 21 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt > index 6bb59ab..ce4c1fc 100644 > --- a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt > +++ b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt > @@ -14,6 +14,8 @@ Required properties: > - rockchip,grf: this soc should set GRF regs to mux vopl/vopb. > - ports: contain a port node with endpoint definitions as defined in [2]. > For vopb,set the reg = <0> and set the reg = <1> for vopl. > +- video port 0 for the VOP input, the remote endpoint maybe vopb or vopl > +- video port 1 for either a panel or subsequent encoder > > Optional properties: > - power-domains: a phandle to mipi dsi power domain node. > @@ -40,11 +42,12 @@ Example: > ports { > #address-cells = <1>; > #size-cells = <0>; > - reg = <1>; > > - mipi_in: port { > + mipi_in: port@0 { > + reg = <0>; > #address-cells = <1>; > #size-cells = <0>; > + > mipi_in_vopb: endpoint@0 { > reg = <0>; > remote-endpoint = <&vopb_out_mipi>; > @@ -54,6 +57,16 @@ Example: > remote-endpoint = <&vopl_out_mipi>; > }; > }; > + > + mipi_out: port@1 { > + reg = <1>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + mipi_out_panel: endpoint { > + remote-endpoint = <&panel_in_mipi>; > + }; > + }; > }; > > panel { > @@ -64,5 +77,11 @@ Example: > pinctrl-names = "default"; > pinctrl-0 = <&lcd_en>; > backlight = <&backlight>; > + > + port { > + panel_in_mipi: endpoint { > + remote-endpoint = <&mipi_out_panel>; > + }; > + }; > }; > }; > -- > 1.9.1 >