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From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: Linus Torvalds <torvalds@linuxfoundation.org>,
	x86@kernel.org, Andy Lutomirski <luto@kernel.org>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Peter Zijlstra <peterz@infradead.org>,
	Borislav Petkov <bp@alien8.de>,
	Dominik Brodowski <linux@dominikbrodowski.net>
Subject: [patch 3/3] x86/mm: Remove preempt_disable/enable() from __native_flush_tlb()
Date: Sat, 30 Dec 2017 22:13:54 +0100
Message-ID: <20171230211829.679325424@linutronix.de> (raw)
In-Reply-To: <20171230211351.980176980@linutronix.de>


[-- Attachment #0: x86-mm--Remove-preempt_disable-enable---from-__native_tlb_flush--.patch --]
[-- Type: text/plain, Size: 1960 bytes --]

The preempt_disable/enable() pair in __native_flush_tlb() was added in
commit 5cf0791da5c1 ("x86/mm: Disable preemption during CR3 read+write") to
protect the UP variant of flush_tlb_mm_range().

That preempt_disable/enable() pair should have been added to the UP variant
of flush_tlb_mm_range() instead.

The UP variant was removed with commit ce4a4e565f52 ("x86/mm: Remove the UP
asm/tlbflush.h code, always use the (formerly) SMP code"), but the
preempt_disable/enable() pair stayed around.

The latest change to __native_flush_tlb() in commit 6fd166aae78c ("x86/mm:
Use/Fix PCID to optimize user/kernel switches") added an access to a per
cpu variable outside the preempt disabled regions which makes no sense at
all. __native_flush_tlb() must always be called with at least preemption
disabled.

Remove the preempt_disable/enable() pair and add a WARN_ON_ONCE() to catch
bad callers independent of the smp_processor_id() debugging.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/tlbflush.h |   14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -345,15 +345,17 @@ static inline void invalidate_user_asid(
  */
 static inline void __native_flush_tlb(void)
 {
-	invalidate_user_asid(this_cpu_read(cpu_tlbstate.loaded_mm_asid));
 	/*
-	 * If current->mm == NULL then we borrow a mm which may change
-	 * during a task switch and therefore we must not be preempted
-	 * while we write CR3 back:
+	 * Preemption or interrupts must be disabled to protect the access
+	 * to the per cpu variable and to prevent being preempted between
+	 * read_cr3() and write_cr3().
 	 */
-	preempt_disable();
+	WARN_ON_ONCE(preemptible());
+
+	invalidate_user_asid(this_cpu_read(cpu_tlbstate.loaded_mm_asid));
+
+	/* If current->mm == NULL then the read_cr3() "borrows" a mm */
 	native_write_cr3(__native_read_cr3());
-	preempt_enable();
 }
 
 /*

  parent reply index

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-12-30 21:13 [patch 0/3] x86/pti: Fix various fallout Thomas Gleixner
2017-12-30 21:13 ` [patch 1/3] x86/ldt: Free the right LDT memory in write_ldt() error path Thomas Gleixner
2017-12-30 21:33   ` Ingo Molnar
2017-12-31 10:24   ` [patch V2 1/3] x86/ldt: Plug memory leak in " Thomas Gleixner
2017-12-31 15:23     ` Andy Lutomirski
2017-12-30 21:13 ` [patch 2/3] x86/smpboot: Remove stale tlb flush invocations Thomas Gleixner
2017-12-30 21:32   ` Ingo Molnar
2017-12-30 21:13 ` Thomas Gleixner [this message]
2017-12-30 21:31   ` [patch 3/3] x86/mm: Remove preempt_disable/enable() from __native_flush_tlb() Ingo Molnar
2017-12-30 21:35 ` [patch 0/3] x86/pti: Fix various fallout Ingo Molnar
2017-12-30 22:06   ` Linus Torvalds
2017-12-31  2:23     ` Andy Lutomirski

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