From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Google-Smtp-Source: AH8x225+xzlgN8KgZZnb5YS9XTsGD6KxV3JgYKPQee0bQxI+/x1WtUZueLfLHgbf68H8c3CDxPxQ ARC-Seal: i=1; a=rsa-sha256; t=1516561308; cv=none; d=google.com; s=arc-20160816; b=mkwHZ5y6ltk9/CqAPHKTLqh3cGGhwrg/Dx1agL+4Fg6hRtQNj0Ltbwo2xX8dbzffA5 MGxpSd4kWCHot0NjbXynxiGEtyDV2FxT91bL4Z0Ig1tTmIKFgyMQfr2QsiSHYg4BCvk2 TVKzB22CTneNIXcGmDHPxzhQnU9MQHXkgkjubAA+dO9sBTf0arfQN+EfxgytoUsM0ZvM PwjbdoNWY7CCIPROtjBXQk1yOnufgnuPcJUDNQtA0TPz4OPf/3l8t/utT85oyamptwuO A5fLfQNF46m8bKVhKdIxjar/qND+ADHYJwNPMF8WMslvp9u8n99rSwRtOyzHcXim8syG xFow== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=user-agent:in-reply-to:content-disposition:mime-version:references :message-id:subject:cc:to:from:date:arc-authentication-results; bh=GtChl+uJelOPtzGSlDarqTOcYsKHaPb5xnJUZdKS+6o=; b=eKHoj1IovPLoJo6kBuQwHQdJgsYUd6BBlbAxDfDQEcEaWsShbRuNYupcli6VnYm/Lu 4D5JpSb92/jYVb1cbx+8/Q3/c3uTpMWYD5qbAN3HXyrMj09ziq8jzdNgD56D1jBUw52D +XB5Er+b45pjOJ2GiCn0o1Kbjhyc3zeoqRBf+Y6slLj93scuurPFvWdGot08s1VD+Mu5 JkdD10Cxw47cRG/O4xSHjWuHHw+Yqq61vCSK3SRRLCv+l4fAHnJPgflV4dLLK0dZkCya hvV4Eez76AxskzzptV9VwYeVyreNJmLm+p4rikv1Yu8Nlqof3JF7mn0AH3UKPRkqnCyA sSDw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of bp@alien8.de designates 5.9.137.197 as permitted sender) smtp.mailfrom=bp@alien8.de Authentication-Results: mx.google.com; spf=pass (google.com: domain of bp@alien8.de designates 5.9.137.197 as permitted sender) smtp.mailfrom=bp@alien8.de Date: Sun, 21 Jan 2018 20:01:45 +0100 From: Borislav Petkov To: KarimAllah Ahmed Cc: David Woodhouse , arjan@linux.intel.com, tglx@linutronix.de, karahmed@amazon.de, x86@kernel.org, linux-kernel@vger.kernel.org, tim.c.chen@linux.intel.com, peterz@infradead.org, pbonzini@redhat.com, ak@linux.intel.com, torvalds@linux-foundation.org, gregkh@linux-foundation.org Subject: Re: [PATCH v2 5/8] x86/speculation: Add basic support for IBPB Message-ID: <20180121190145.uuk3xizxejckth5s@pd.tnic> References: <1516528149-9370-1-git-send-email-dwmw@amazon.co.uk> <1516528149-9370-6-git-send-email-dwmw@amazon.co.uk> <20180121180621.ufmc5m7nr6v4tjvc@pd.tnic> <31c52131-5f7a-8af0-3092-5fc9e322a734@amazon.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <31c52131-5f7a-8af0-3092-5fc9e322a734@amazon.com> User-Agent: NeoMutt/20170609 (1.8.3) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: =?utf-8?q?1590195048808685762?= X-GMAIL-MSGID: =?utf-8?q?1590229791165308118?= X-Mailing-List: linux-kernel@vger.kernel.org List-ID: On Sun, Jan 21, 2018 at 07:29:43PM +0100, KarimAllah Ahmed wrote: > Because static_cpu_has is an indirect branch which will cause speculation > and > we have to avoid that. How so? The JMP_NOSPEC macro protects against JMP jumps but the static_cpu_has() macros all add JMPs with an immediate offset from the next instruction and I wouldn't call them indirect JMPs as there are no registers to speculate on there. IOW, before alternatives, the patch site of static_cpu_has() looks like this: # 151 "./arch/x86/include/asm/cpufeature.h" 1 1: jmp 6f and that 6f label is: 6: testb $1,boot_cpu_data+50(%rip) #, MEM[(const char *)&boot_cpu_data + 50B] jnz .L707 # jmp .L706 # i.e., we basically do if (boot_cpu_has(..)). If the feature is not present, same patch site turns into: 4: jmp .L706 # 5: after patching. Which is a label after the whole thing. That is not an indrect jump through a register either. If the feature is present, the patch site becomes: NOP - added by the patching # ./arch/x86/include/asm/msr.h:105: asm volatile("1: wrmsr\n" .loc 18 105 0 movl $73, %ecx #, tmp138 movl $1, %eax #, tmp139 xorl %edx, %edx # tmp140 #APP # 105 "./arch/x86/include/asm/msr.h" 1 1: wrmsr 2: so execution runs directly into the MSR write and the JMP is gone. So I don't see indirect branches anywhere... -- Regards/Gruss, Boris. Good mailing practices for 400: avoid top-posting and trim the reply.