From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Google-Smtp-Source: AH8x227wQ4Nu1/ZA1jy3h3T787pglqrbySy3FRcSixKnw9mO/V6CNhFlGKV4FVPyy+IJhWc/AMXG ARC-Seal: i=1; a=rsa-sha256; t=1516610879; cv=none; d=google.com; s=arc-20160816; b=EUFCCDolJMNjuOi35Ob5kPwfwVG3WQ70poE7YNHo9CQUH2kpw/c0dXUFvEFCTOljFD ApxKQw/X9zozfN08tqnLpMi48ADRDfbnbGcoR/Nxpy0BzvRcJbKDtmV9V0pPG36ZWOjY tQSg4wejnf10LyVmvVqdZ9I/Lc5W6I/iDKdRTZEVeGIiIWEdGyzFmXPVE8Jzf0/X1tYh YCWhu3DJaxx5QaffRoyUbbYJdu1ljFPZaMb3oldK2bFuA5zU/9E8aPVA8AGjHNAtfeXq tFcIfkU/DVZkeDzHUkauaYNUTJi9EBX9/rutVKWoeKiXMhGpxyzzmpiJOOWDutqlD0eR nP2g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:user-agent:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=67N1rgyEK6LXm+cQDbA/eyi+2ckqfH9KkWY/U4ZPlns=; b=kVgK808uWqOC0k5Pl9k+AbqmOXsMCKpaxHu4teP6v1x7A0Uded6Qvvvfz/lkzzGrD8 SFoaP+tIsbYsNMJiUZl+91wDKBVVPLvFE/S11CgO7BOC94p6QsyZXe5ffV5cwOdg9XLi EeXn3+wV3dlJe0wCKshIJzA5xxpZRX99V2t4yLQqiQQ2FPcoLGpemmsLALxMRGR+VIDS PkHaB6WV3XqW7LdUEou2T0gGWWFvP10Cdfae8nt9p8dv4JHMxMPP6aKtTd7cPWA8cCpy fwQi+KHQJH1ZQi1pkMiS3fjhcfFyg0iTLsIso/Z3SWHKOMnRaqoqVLuVvB4JxCgreyzD ww/w== ARC-Authentication-Results: i=1; mx.google.com; spf=softfail (google.com: domain of transitioning gregkh@linuxfoundation.org does not designate 90.92.71.90 as permitted sender) smtp.mailfrom=gregkh@linuxfoundation.org Authentication-Results: mx.google.com; spf=softfail (google.com: domain of transitioning gregkh@linuxfoundation.org does not designate 90.92.71.90 as permitted sender) smtp.mailfrom=gregkh@linuxfoundation.org From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Tom Lendacky , Thomas Gleixner , Borislav Petkov , David Woodhouse , Arjan van de Ven , Rik van Riel , Andi Kleen , Paul Turner , Peter Zijlstra , Tim Chen , Jiri Kosina , Dave Hansen , Andy Lutomirski , Josh Poimboeuf , Dan Williams , Linus Torvalds , Kees Cook , Greg Kroah-Hartman Subject: [PATCH 4.9 15/47] x86/retpoline: Add LFENCE to the retpoline/RSB filling RSB macros Date: Mon, 22 Jan 2018 09:45:26 +0100 Message-Id: <20180122083926.680772544@linuxfoundation.org> X-Mailer: git-send-email 2.16.0 In-Reply-To: <20180122083925.568134913@linuxfoundation.org> References: <20180122083925.568134913@linuxfoundation.org> User-Agent: quilt/0.65 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-LABELS: =?utf-8?b?IlxcU2VudCI=?= X-GMAIL-THRID: =?utf-8?q?1590281407196559740?= X-GMAIL-MSGID: =?utf-8?q?1590281769206790903?= X-Mailing-List: linux-kernel@vger.kernel.org List-ID: 4.9-stable review patch. If anyone has any objections, please let me know. ------------------ From: Tom Lendacky commit 28d437d550e1e39f805d99f9f8ac399c778827b7 upstream. The PAUSE instruction is currently used in the retpoline and RSB filling macros as a speculation trap. The use of PAUSE was originally suggested because it showed a very, very small difference in the amount of cycles/time used to execute the retpoline as compared to LFENCE. On AMD, the PAUSE instruction is not a serializing instruction, so the pause/jmp loop will use excess power as it is speculated over waiting for return to mispredict to the correct target. The RSB filling macro is applicable to AMD, and, if software is unable to verify that LFENCE is serializing on AMD (possible when running under a hypervisor), the generic retpoline support will be used and, so, is also applicable to AMD. Keep the current usage of PAUSE for Intel, but add an LFENCE instruction to the speculation trap for AMD. The same sequence has been adopted by GCC for the GCC generated retpolines. Signed-off-by: Tom Lendacky Signed-off-by: Thomas Gleixner Reviewed-by: Borislav Petkov Acked-by: David Woodhouse Acked-by: Arjan van de Ven Cc: Rik van Riel Cc: Andi Kleen Cc: Paul Turner Cc: Peter Zijlstra Cc: Tim Chen Cc: Jiri Kosina Cc: Dave Hansen Cc: Andy Lutomirski Cc: Josh Poimboeuf Cc: Dan Williams Cc: Linus Torvalds Cc: Greg Kroah-Hartman Cc: Kees Cook Link: https://lkml.kernel.org/r/20180113232730.31060.36287.stgit@tlendack-t1.amdoffice.net Signed-off-by: Greg Kroah-Hartman --- arch/x86/include/asm/nospec-branch.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) --- a/arch/x86/include/asm/nospec-branch.h +++ b/arch/x86/include/asm/nospec-branch.h @@ -11,7 +11,7 @@ * Fill the CPU return stack buffer. * * Each entry in the RSB, if used for a speculative 'ret', contains an - * infinite 'pause; jmp' loop to capture speculative execution. + * infinite 'pause; lfence; jmp' loop to capture speculative execution. * * This is required in various cases for retpoline and IBRS-based * mitigations for the Spectre variant 2 vulnerability. Sometimes to @@ -38,11 +38,13 @@ call 772f; \ 773: /* speculation trap */ \ pause; \ + lfence; \ jmp 773b; \ 772: \ call 774f; \ 775: /* speculation trap */ \ pause; \ + lfence; \ jmp 775b; \ 774: \ dec reg; \ @@ -73,6 +75,7 @@ call .Ldo_rop_\@ .Lspec_trap_\@: pause + lfence jmp .Lspec_trap_\@ .Ldo_rop_\@: mov \reg, (%_ASM_SP) @@ -165,6 +168,7 @@ " .align 16\n" \ "901: call 903f;\n" \ "902: pause;\n" \ + " lfence;\n" \ " jmp 902b;\n" \ " .align 16\n" \ "903: addl $4, %%esp;\n" \