From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Google-Smtp-Source: AH8x2255MgDnhp08r+EjMZB+SIvtI5bq9yNfSlBccKjXK9KwNEflVdaGfLmEvs6YdITj4u6jG2mM ARC-Seal: i=1; a=rsa-sha256; t=1516783668; cv=none; d=google.com; s=arc-20160816; b=hQH7ln91Muw1U0GK7pKBVB5zs+SjPhlmxKKc7Jutm/T07cTQYmJ0JbyPs6WYZhoItT qwIwp7gRRavNEeUGkixSx/7d6N/wrz3tmcT8io9FVjBsHN6DAYrbOeXTJ3vzq4Wd7WwK oZqz77vzEucewew/o9BCEerb8ch2qeh/HUv/6yvg9slXkKYoYJUj0TYKRUpE6lnDOvPW xb/xHUC6JNeH46DzzL1aXLGfeojk5RMNtt/8tvcsQOZW3bay/JIVZ9yjs19TmmT4IgEG TRwjNeCgB4KoCVX1K1rj1Bc/mGzOFRI9F/+iYAJoq+aRiOnXyRp4q2SEeXvTOTTf9tPN IbgA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=user-agent:in-reply-to:content-transfer-encoding :content-disposition:mime-version:references:message-id:subject:cc :to:from:date:dkim-signature:arc-authentication-results; bh=vRHsRA6lC+1EvX6mg3HJ9XSsPNaxsSTzeijX3+qfvHg=; b=oN0GmlFyQDbRVuiuQ6YbM+tBej3bwk+vioLbQ8pAt3vpz+Cvz9QIjfLlnR5v1P0sjv 4SkUZxcjGT/Ti8WFbktXcAHz71g79rhkirq+I3ct4oirMJlHTsqDXch0LmKMosjgXYub prWsJf+4Ikq+GmODnyXe2Ifh0DuM5XFhbdVRaVTMEk/Mru6mZCuSmLUBO3Avj12gXeul 8eCxlz8HKalq++fpedJ6+8wsZT5gsm96uPH88lbJ0BmmGjBtDa/BqxTvB/zzHeSp2Skn 7JCS/Pqz+wk89plRNJP1htCAr27fGmiIaSJTNTNrUVzteIEeBuIB8gr8tS414BzKJtoV UYlQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@infradead.org header.s=bombadil.20170209 header.b=lddo10Gw; spf=pass (google.com: best guess record for domain of peterz@infradead.org designates 65.50.211.133 as permitted sender) smtp.mailfrom=peterz@infradead.org Authentication-Results: mx.google.com; dkim=pass header.i=@infradead.org header.s=bombadil.20170209 header.b=lddo10Gw; spf=pass (google.com: best guess record for domain of peterz@infradead.org designates 65.50.211.133 as permitted sender) smtp.mailfrom=peterz@infradead.org Date: Wed, 24 Jan 2018 09:47:35 +0100 From: Peter Zijlstra To: David Woodhouse Cc: Thomas Gleixner , KarimAllah Ahmed , linux-kernel@vger.kernel.org, Andi Kleen , Andrea Arcangeli , Andy Lutomirski , Arjan van de Ven , Ashok Raj , Asit Mallick , Borislav Petkov , Dan Williams , Dave Hansen , Greg Kroah-Hartman , "H . Peter Anvin" , Ingo Molnar , Janakarajan Natarajan , Joerg Roedel , Jun Nakajima , Laura Abbott , Linus Torvalds , Masami Hiramatsu , Paolo Bonzini , Radim =?utf-8?B?S3LEjW3DocWZ?= , Tim Chen , Tom Lendacky , kvm@vger.kernel.org, x86@kernel.org Subject: Re: [RFC 05/10] x86/speculation: Add basic IBRS support infrastructure Message-ID: <20180124084735.GM2228@hirez.programming.kicks-ass.net> References: <1516476182-5153-1-git-send-email-karahmed@amazon.de> <1516476182-5153-6-git-send-email-karahmed@amazon.de> <1516741116.13558.11.camel@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1516741116.13558.11.camel@infradead.org> User-Agent: Mutt/1.9.2 (2017-12-15) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: =?utf-8?q?1590140581449802182?= X-GMAIL-MSGID: =?utf-8?q?1590462952250509083?= X-Mailing-List: linux-kernel@vger.kernel.org List-ID: On Tue, Jan 23, 2018 at 08:58:36PM +0000, David Woodhouse wrote: > +static const struct sku_microcode spectre_bad_microcodes[] = { > + { INTEL_FAM6_KABYLAKE_DESKTOP, 0x0B, 0x80 }, > + { INTEL_FAM6_KABYLAKE_MOBILE, 0x0A, 0x80 }, > + { INTEL_FAM6_KABYLAKE_MOBILE, 0x0A, 0x80 }, > + { INTEL_FAM6_KABYLAKE_MOBILE, 0x09, 0x80 }, > + { INTEL_FAM6_KABYLAKE_DESKTOP, 0x09, 0x80 }, > + { INTEL_FAM6_SKYLAKE_X, 0x04, 0x0200003C }, > + { INTEL_FAM6_SKYLAKE_MOBILE, 0x03, 0x000000C2 }, > + { INTEL_FAM6_SKYLAKE_DESKTOP, 0x03, 0x000000C2 }, > + { INTEL_FAM6_BROADWELL_CORE, 0x04, 0x28 }, > + { INTEL_FAM6_BROADWELL_GT3E, 0x01, 0x0000001B }, > + { INTEL_FAM6_HASWELL_ULT, 0x01, 0x21 }, > + { INTEL_FAM6_HASWELL_GT3E, 0x01, 0x18 }, > + { INTEL_FAM6_HASWELL_CORE, 0x03, 0x23 }, > + { INTEL_FAM6_IVYBRIDGE_X, 0x04, 0x42a }, > + { INTEL_FAM6_HASWELL_X, 0x02, 0x3b }, > + { INTEL_FAM6_HASWELL_X, 0x04, 0x10 }, > + { INTEL_FAM6_HASWELL_CORE, 0x03, 0x23 }, > + { INTEL_FAM6_BROADWELL_XEON_D, 0x02, 0x14 }, > + { INTEL_FAM6_BROADWELL_XEON_D, 0x03, 0x7000011 }, > + { INTEL_FAM6_BROADWELL_GT3E, 0x01, 0x0000001B }, > + /* For 406F1 Intel says "0x25, 0x23" while VMware says 0x0B000025 > +  * and a real CPU has a firmware in the 0x0B0000xx range. So: */ > + { INTEL_FAM6_BROADWELL_X, 0x01, 0x0b000025 }, > + { INTEL_FAM6_KABYLAKE_DESKTOP, 0x09, 0x80 }, > + { INTEL_FAM6_SKYLAKE_X, 0x03, 0x100013e }, > + { INTEL_FAM6_SKYLAKE_X, 0x04, 0x200003c }, > +}; Typically tglx likes to use x86_match_cpu() for these things; see also commit: bd9240a18edfb ("x86/apic: Add TSC_DEADLINE quirk due to errata"). > + > +static int bad_spectre_microcode(struct cpuinfo_x86 *c) > +{ > + int i; > + > + for (i = 0; i < ARRAY_SIZE(spectre_bad_microcodes); i++) { > + if (c->x86_model == spectre_bad_microcodes[i].model && > +     c->x86_mask == spectre_bad_microcodes[i].stepping) > + return (c->microcode <= spectre_bad_microcodes[i].microcode); > + } > + return 0; > +} The above is Intel only, you should check vendor too I think. >  static void early_init_intel(struct cpuinfo_x86 *c) >  { >   u64 misc_enable; > @@ -122,6 +173,18 @@ static void early_init_intel(struct cpuinfo_x86 *c) >   if (c->x86 >= 6 && !cpu_has(c, X86_FEATURE_IA64)) >   c->microcode = intel_get_microcode_revision(); >   > + if ((cpu_has(c, X86_FEATURE_SPEC_CTRL) || > +      cpu_has(c, X86_FEATURE_AMD_SPEC_CTRL) || > +      cpu_has(c, X86_FEATURE_AMD_PRED_CMD) || > +      cpu_has(c, X86_FEATURE_AMD_STIBP)) && bad_spectre_microcode(c)) { > + pr_warn("Intel Spectre v2 broken microcode detected; disabling SPEC_CTRL\n"); > + clear_cpu_cap(c, X86_FEATURE_SPEC_CTRL); > + clear_cpu_cap(c, X86_FEATURE_STIBP); > + clear_cpu_cap(c, X86_FEATURE_AMD_SPEC_CTRL); > + clear_cpu_cap(c, X86_FEATURE_AMD_PRED_CMD); > + clear_cpu_cap(c, X86_FEATURE_AMD_STIBP); > + } And since its Intel only, what are those AMD features doing there?