From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Google-Smtp-Source: AH8x226gd2267Jfg3nkGPAVuI27W1lB3K0W74V2AGoqXautraHrEA6i0ZodJrm5uPslevVGt+y0b ARC-Seal: i=1; a=rsa-sha256; t=1519411261; cv=none; d=google.com; s=arc-20160816; b=v/QAiOrBOJA7g8uw+1FQsgkPgDV2dTeHO+lLfoh4A8uzMxGwiIn3Kh+3kNRsrLXuHa YjC4eapI0ed2wsrWETzRWKE9d+nR/qRaetY3e0QwdE7yFs+DvHxmavZyuH80x0tH3KOh Hnk14YVjMcwAVIoMzuZz6BeiSlpBV9Owtyi3Z18Rc2ttcSyQPBR7zcowJDWpjPb4Ylmt toLT9Jp5SfoYnIXskAYIm846ohL2jqdc6uZlvFrI4J5EUVEGtJr/M+GpsTyKNpsyM45q rYgLYMsVXDi0yAyJIi2e9+Zng6QaRbvr8JmS9Dqchv8pQ8WUVgd++9vQBefrFqP31Uo8 o88Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:user-agent:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=Ecao++3B3zNc3TYjnVVXUqOu6JsvnRkcAtF1QrG/D9g=; b=Mu5uUtG1jzhzyZW/dCNy1W4dS6B/vQ3K1lQUamD32YxR/uJqiLfFzeZUYmke8Hrfg+ 5olTZdpVfjn6bOALnwIOvDT2gSAzgtyvpBL0BvisgDTJlOzQJ53XJw4A/7+dCvm8MHlA 5a8GpnJcr9tO0hXcifYU0CS84ZlEaTF5f4x/nnokAbGtEDwqDIDkXg9cbkgomqRrc2I+ 2unTziogBuTcslTABaGpYcfrHlNMfp/8QAq4iapQcor4tZHA3sDqKhChluDb8rFB5jtZ NtxyBkaKhs6OA03e1F/SSpPsO0ULyiSIEyuH9fPkTaPftJzd2s4b96oYlZp5mCwS7kVj X1dw== ARC-Authentication-Results: i=1; mx.google.com; spf=softfail (google.com: domain of transitioning gregkh@linuxfoundation.org does not designate 90.92.71.90 as permitted sender) smtp.mailfrom=gregkh@linuxfoundation.org Authentication-Results: mx.google.com; spf=softfail (google.com: domain of transitioning gregkh@linuxfoundation.org does not designate 90.92.71.90 as permitted sender) smtp.mailfrom=gregkh@linuxfoundation.org From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Linus Torvalds , Andi Kleen , Ingo Molnar , Dan Williams , Thomas Gleixner , linux-arch@vger.kernel.org, Tom Lendacky , Kees Cook , kernel-hardening@lists.openwall.com, Al Viro , alan@linux.intel.com, David Woodhouse , Jack Wang Subject: [PATCH 4.4 176/193] x86: Introduce barrier_nospec Date: Fri, 23 Feb 2018 19:26:49 +0100 Message-Id: <20180223170353.649405309@linuxfoundation.org> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180223170325.997716448@linuxfoundation.org> References: <20180223170325.997716448@linuxfoundation.org> User-Agent: quilt/0.65 X-stable: review MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-LABELS: =?utf-8?b?IlxcU2VudCI=?= X-GMAIL-THRID: =?utf-8?q?1593218183175279621?= X-GMAIL-MSGID: =?utf-8?q?1593218183175279621?= X-Mailing-List: linux-kernel@vger.kernel.org List-ID: 4.4-stable review patch. If anyone has any objections, please let me know. ------------------ From: Dan Williams (cherry picked from commit b3d7ad85b80bbc404635dca80f5b129f6242bc7a) Rename the open coded form of this instruction sequence from rdtsc_ordered() into a generic barrier primitive, barrier_nospec(). One of the mitigations for Spectre variant1 vulnerabilities is to fence speculative execution after successfully validating a bounds check. I.e. force the result of a bounds check to resolve in the instruction pipeline to ensure speculative execution honors that result before potentially operating on out-of-bounds data. No functional changes. Suggested-by: Linus Torvalds Suggested-by: Andi Kleen Suggested-by: Ingo Molnar Signed-off-by: Dan Williams Signed-off-by: Thomas Gleixner Cc: linux-arch@vger.kernel.org Cc: Tom Lendacky Cc: Kees Cook Cc: kernel-hardening@lists.openwall.com Cc: gregkh@linuxfoundation.org Cc: Al Viro Cc: alan@linux.intel.com Link: https://lkml.kernel.org/r/151727415361.33451.9049453007262764675.stgit@dwillia2-desk3.amr.corp.intel.com Signed-off-by: David Woodhouse [jwang: cherry pick to 4.4] Signed-off-by: Jack Wang Signed-off-by: Greg Kroah-Hartman --- arch/x86/include/asm/barrier.h | 4 ++++ arch/x86/include/asm/msr.h | 3 +-- 2 files changed, 5 insertions(+), 2 deletions(-) --- a/arch/x86/include/asm/barrier.h +++ b/arch/x86/include/asm/barrier.h @@ -48,6 +48,10 @@ static inline unsigned long array_index_ /* Override the default implementation from linux/nospec.h. */ #define array_index_mask_nospec array_index_mask_nospec +/* Prevent speculative execution past this barrier. */ +#define barrier_nospec() alternative_2("", "mfence", X86_FEATURE_MFENCE_RDTSC, \ + "lfence", X86_FEATURE_LFENCE_RDTSC) + #ifdef CONFIG_X86_PPRO_FENCE #define dma_rmb() rmb() #else --- a/arch/x86/include/asm/msr.h +++ b/arch/x86/include/asm/msr.h @@ -147,8 +147,7 @@ static __always_inline unsigned long lon * that some other imaginary CPU is updating continuously with a * time stamp. */ - alternative_2("", "mfence", X86_FEATURE_MFENCE_RDTSC, - "lfence", X86_FEATURE_LFENCE_RDTSC); + barrier_nospec(); return rdtsc(); }