From: Maxime Ripard <maxime.ripard@bootlin.com>
To: hao_zhang <hao5781286@gmail.com>
Cc: thierry.reding@gmail.com, robh+dt@kernel.org,
mark.rutland@arm.com, linux@armlinux.org.uk, wens@csie.org,
Claudiu.Beznea@microchip.com, linux-gpio@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-pwm@vger.kernel.org,
linux-sunxi@googlegroups.com
Subject: Re: [PATCH v2 2/4] ARM: dtsi: add pwm node for sun8i.
Date: Mon, 26 Feb 2018 09:49:19 +0100 [thread overview]
Message-ID: <20180226084919.wt2yljq3nxr5g2vu@flea.lan> (raw)
In-Reply-To: <20180225135134.GA14529@arx-s1>
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On Sun, Feb 25, 2018 at 09:51:34PM +0800, hao_zhang wrote:
> This patch adds pwm node for sun8i.
>
> Signed-off-by: hao_zhang <hao5781286@gmail.com>
> ---
> arch/arm/boot/dts/sun8i-r40.dtsi | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
> index 173dcc1..99a0261 100644
> --- a/arch/arm/boot/dts/sun8i-r40.dtsi
> +++ b/arch/arm/boot/dts/sun8i-r40.dtsi
> @@ -295,6 +295,11 @@
> bias-pull-up;
> };
>
> + pwm_ch0_pin: pwm-ch0-pin {
> + pins = "PB2";
> + function = "pwm";
> + };
> +
> uart0_pb_pins: uart0-pb-pins {
> pins = "PB22", "PB23";
> function = "uart0";
> @@ -306,6 +311,14 @@
> reg = <0x01c20c90 0x10>;
> };
>
> + pwm: pwm@1c23400 {
> + compatible = "allwinner,sun8i-r40-pwm";
> + reg = <0x01c23400 0x154>;
The size must be the size of the whole memory block allocated to the
controller, so that would be 0x400 in this case.
Maxime
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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next prev parent reply other threads:[~2018-02-26 8:49 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-25 13:51 [PATCH v2 2/4] ARM: dtsi: add pwm node for sun8i hao_zhang
2018-02-26 8:49 ` Maxime Ripard [this message]
2018-02-28 1:53 ` [linux-sunxi] " André Przywara
2018-05-14 16:08 ` Hao Zhang
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