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Date: Tue, 27 Feb 2018 11:43:14 +0000
From: Mark Rutland <mark.rutland@arm.com>
To: skannan@codeaurora.org
Cc: Peter Zijlstra <peterz@infradead.org>, Ingo Molnar <mingo@redhat.com>,
        Arnaldo Carvalho de Melo <acme@kernel.org>,
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Subject: Re: [PATCH v1 2/2] perf/core: Add support for PMUs that can be read
 from any CPU
Message-ID: <20180227114313.mtvyo6rdavqfj2hy@lakrids.cambridge.arm.com>
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On Mon, Feb 26, 2018 at 06:11:45PM -0800, skannan@codeaurora.org wrote:
> On 2018-02-25 06:38, Mark Rutland wrote:
> > On Fri, Feb 23, 2018 at 04:19:38PM -0800, Saravana Kannan wrote:
> > > Some PMUs events can be read from any CPU. So allow the PMU to mark
> > > events as such. For these events, we don't need to reject reads or
> > > make smp calls to the event's CPU and cause unnecessary wake ups.
> > > 
> > > Good examples of such events would be events from caches shared across
> > > all CPUs.
> > 
> > I think that if we need to generalize PERF_EV_CAP_READ_ACTIVE_PKG, it
> > would be
> > better to give events a pointer to a cpumask. That could then cover all
> > cases
> > quite trivially:
> > 
> > static int __perf_event_read_cpu(struct perf_event *event, int
> > event_cpu)
> > {
> > 	int local_cpu = smp_processor_id();
> > 
> > 	if (event->read_mask &&
> > 	    cpumask_test_cpu(local_cpu, event->read_mask))
> > 		event_cpu = local_cpu;
> > 
> > 	return event_cpu;
> > }
> 
> This is a good improvement on my attempt. If I send a patch for this, is
> that something you'd be willing to incorporate into your patch set and make
> sure the DSU pmu driver handles it correctly?

As I commented, I don't think that willl work without more invasive
changes as the DSU PMU's pmu::read() function has side effects on
hwc->prev_count and event_count, and could race with an IRQ handler on
another CPU.

Is the IPI really a problem in practice?

Thanks,
Mark.