From: Maxime Ripard <maxime.ripard@bootlin.com>
To: Giulio Benetti <giulio.benetti@micronovasrl.com>
Cc: David Airlie <airlied@linux.ie>, Chen-Yu Tsai <wens@csie.org>,
dri-devel@lists.freedesktop.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] drm/sun4i: Fix dclk_set_phase
Date: Thu, 1 Mar 2018 10:41:47 +0100 [thread overview]
Message-ID: <20180301094147.2mjgpfq4q64gtptv@flea> (raw)
In-Reply-To: <1519836413-35023-1-git-send-email-giulio.benetti@micronovasrl.com>
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On Wed, Feb 28, 2018 at 05:46:53PM +0100, Giulio Benetti wrote:
> Phase value is not shifted before writing.
>
> Shift left of 28 bits to fit right bits
>
> Signed-off-by: Giulio Benetti <giulio.benetti@micronovasrl.com>
Applied, thanks!
Maxime
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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prev parent reply other threads:[~2018-03-01 9:42 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-28 16:46 [PATCH] drm/sun4i: Fix dclk_set_phase Giulio Benetti
2018-03-01 9:41 ` Maxime Ripard [this message]
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