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From: Mark Rutland <mark.rutland@arm.com>
To: Borislav Petkov <bp@alien8.de>
Cc: York Sun <york.sun@nxp.com>,
	linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH RFC 1/2] drivers/edac: Add L1 and L2 error detection for A53 and A57
Date: Thu, 15 Mar 2018 15:10:42 +0000	[thread overview]
Message-ID: <20180315151042.ikmjg67s6te5ov4x@lakrids.cambridge.arm.com> (raw)
In-Reply-To: <20180315010728.GF11061@pd.tnic>

On Thu, Mar 15, 2018 at 02:07:28AM +0100, Borislav Petkov wrote:
> On Wed, Mar 14, 2018 at 05:17:46PM -0700, York Sun wrote:
> > Add error detection for A53 and A57 cores. Hardware error injection
> > is supported on A53. Software error injection is supported on both.
> > For hardware error injection on A53 to work, proper access to
> > L2ACTLR_EL1, CPUACTLR_EL1 needs to be granted by EL3 firmware. This
> > is done by making an SMC call in the driver. Failure to enable access
> > disables hardware error injection. For error interrupt to work,
> > another SMC call enables access to L2ECTLR_EL1. Failure to enable
> > access disables interrupt for error reporting.
> > 
> > Signed-off-by: York Sun <york.sun@nxp.com>
> > ---
> >  .../devicetree/bindings/edac/cortex-arm64-edac.txt |  37 +
> >  arch/arm64/include/asm/cacheflush.h                |   1 +
> >  arch/arm64/mm/cache.S                              |  35 +
> >  drivers/edac/Kconfig                               |   6 +
> >  drivers/edac/Makefile                              |   1 +
> >  drivers/edac/cortex_arm64_l1_l2.c                  | 741 +++++++++++++++++++++
> 
> I don't want per-functional unit EDAC drivers. Also, what happened to
> talking to ARM people about designing a generic ARM64 EDAC driver?

Practically speaking, a generic drivers is only possible on ARMv8.2
parts where RAS functionality is architected.

On other parts, it's IMPLEMENTATION DEFINED, and varies wildly between
CPU implementations, even if they sometimes look deceptively similar at
first glance...

This driver is certainly not generic, and is specific to Cortex-A53 and
Cortex-A57 as integrated by NXP (since it relies on NXP-specific
firmware interfaces).

Thanks,
Mark.

  parent reply	other threads:[~2018-03-15 15:10 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-15  0:17 [PATCH RFC 1/2] drivers/edac: Add L1 and L2 error detection for A53 and A57 York Sun
2018-03-15  0:17 ` [PATCH RFC 2/2] arm64: Update device tree for ls1043a and ls1046a to enable edac driver York Sun
2018-03-15  1:07 ` [PATCH RFC 1/2] drivers/edac: Add L1 and L2 error detection for A53 and A57 Borislav Petkov
2018-03-15  1:20   ` York Sun
2018-03-15 10:17     ` Borislav Petkov
2018-03-15 14:55       ` York Sun
2018-03-15 15:10   ` Mark Rutland [this message]
2018-03-15 13:33 ` James Morse
2018-03-15 15:15   ` York Sun
2018-03-15 15:07 ` Mark Rutland
2018-03-15 15:15   ` York Sun

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