From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753011AbeC1LvJ (ORCPT ); Wed, 28 Mar 2018 07:51:09 -0400 Received: from bastet.se.axis.com ([195.60.68.11]:53987 "EHLO bastet.se.axis.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752969AbeC1LvG (ORCPT ); Wed, 28 Mar 2018 07:51:06 -0400 From: Niklas Cassel To: kishon@ti.com, cyrille.pitchen@free-electrons.com, Lorenzo Pieralisi , Bjorn Helgaas , Sekhar Nori , John Keeping , Niklas Cassel , Shawn Lin Cc: Niklas Cassel , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 08/12] PCI: endpoint: Handle 64-bit BARs properly Date: Wed, 28 Mar 2018 13:50:13 +0200 Message-Id: <20180328115018.31921-9-niklas.cassel@axis.com> X-Mailer: git-send-email 2.14.2 In-Reply-To: <20180328115018.31921-1-niklas.cassel@axis.com> References: <20180328115018.31921-1-niklas.cassel@axis.com> X-TM-AS-GCONF: 00 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org If a 64-bit BAR was set-up, we need to skip a BAR, since a 64-bit BAR consists of a BAR pair. We need to check what BAR width the epc->ops->set_bar() specific implementation actually did set-up, since some drivers, like the Cadence EP controller, sometimes sets up a 64-bit BAR, even though a 32-bit BAR was requested. Signed-off-by: Niklas Cassel --- drivers/pci/endpoint/functions/pci-epf-test.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c index 91274779e59f..d46e3ebabb8e 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -380,6 +380,13 @@ static int pci_epf_test_set_bar(struct pci_epf *epf) if (bar == test_reg_bar) return ret; } + /* + * pci_epc_set_bar() sets PCI_BASE_ADDRESS_MEM_TYPE_64 + * if the specific implementation required a 64-bit BAR, + * even if we only requested a 32-bit BAR. + */ + if (epf_bar->flags & PCI_BASE_ADDRESS_MEM_TYPE_64) + bar++; } return 0; -- 2.14.2