From: Ian Liu Rodrigues <ian.liu88@gmail.com>
To: gregkh@linuxfoundation.org, christian.gromm@microchip.com,
andrey.shvetsov@k2l.de, devel@driverdev.osuosl.org,
linux-kernel@vger.kernel.org, lkcamp@lists.libreplanetbr.org
Cc: Ian Liu Rodrigues <ian.liu88@gmail.com>
Subject: [PATCH] Staging: most: Move comments to the end of line
Date: Tue, 10 Apr 2018 19:57:21 -0300 [thread overview]
Message-ID: <20180410225721.9303-1-ian.liu88@gmail.com> (raw)
Signed-off-by: Ian Liu Rodrigues <ian.liu88@gmail.com>
---
drivers/staging/most/dim2/reg.h | 84 ++++++++++++++++-----------------
1 file changed, 42 insertions(+), 42 deletions(-)
diff --git a/drivers/staging/most/dim2/reg.h b/drivers/staging/most/dim2/reg.h
index 69cbf78239f1..4343a483017e 100644
--- a/drivers/staging/most/dim2/reg.h
+++ b/drivers/staging/most/dim2/reg.h
@@ -12,48 +12,48 @@
#include <linux/types.h>
struct dim2_regs {
- /* 0x00 */ u32 MLBC0;
- /* 0x01 */ u32 rsvd0[1];
- /* 0x02 */ u32 MLBPC0;
- /* 0x03 */ u32 MS0;
- /* 0x04 */ u32 rsvd1[1];
- /* 0x05 */ u32 MS1;
- /* 0x06 */ u32 rsvd2[2];
- /* 0x08 */ u32 MSS;
- /* 0x09 */ u32 MSD;
- /* 0x0A */ u32 rsvd3[1];
- /* 0x0B */ u32 MIEN;
- /* 0x0C */ u32 rsvd4[1];
- /* 0x0D */ u32 MLBPC2;
- /* 0x0E */ u32 MLBPC1;
- /* 0x0F */ u32 MLBC1;
- /* 0x10 */ u32 rsvd5[0x10];
- /* 0x20 */ u32 HCTL;
- /* 0x21 */ u32 rsvd6[1];
- /* 0x22 */ u32 HCMR0;
- /* 0x23 */ u32 HCMR1;
- /* 0x24 */ u32 HCER0;
- /* 0x25 */ u32 HCER1;
- /* 0x26 */ u32 HCBR0;
- /* 0x27 */ u32 HCBR1;
- /* 0x28 */ u32 rsvd7[8];
- /* 0x30 */ u32 MDAT0;
- /* 0x31 */ u32 MDAT1;
- /* 0x32 */ u32 MDAT2;
- /* 0x33 */ u32 MDAT3;
- /* 0x34 */ u32 MDWE0;
- /* 0x35 */ u32 MDWE1;
- /* 0x36 */ u32 MDWE2;
- /* 0x37 */ u32 MDWE3;
- /* 0x38 */ u32 MCTL;
- /* 0x39 */ u32 MADR;
- /* 0x3A */ u32 rsvd8[0xB6];
- /* 0xF0 */ u32 ACTL;
- /* 0xF1 */ u32 rsvd9[3];
- /* 0xF4 */ u32 ACSR0;
- /* 0xF5 */ u32 ACSR1;
- /* 0xF6 */ u32 ACMR0;
- /* 0xF7 */ u32 ACMR1;
+ u32 MLBC0; /* 0x00 */
+ u32 rsvd0[1]; /* 0x01 */
+ u32 MLBPC0; /* 0x02 */
+ u32 MS0; /* 0x03 */
+ u32 rsvd1[1]; /* 0x04 */
+ u32 MS1; /* 0x05 */
+ u32 rsvd2[2]; /* 0x06 */
+ u32 MSS; /* 0x08 */
+ u32 MSD; /* 0x09 */
+ u32 rsvd3[1]; /* 0x0A */
+ u32 MIEN; /* 0x0B */
+ u32 rsvd4[1]; /* 0x0C */
+ u32 MLBPC2; /* 0x0D */
+ u32 MLBPC1; /* 0x0E */
+ u32 MLBC1; /* 0x0F */
+ u32 rsvd5[0x10]; /* 0x10 */
+ u32 HCTL; /* 0x20 */
+ u32 rsvd6[1]; /* 0x21 */
+ u32 HCMR0; /* 0x22 */
+ u32 HCMR1; /* 0x23 */
+ u32 HCER0; /* 0x24 */
+ u32 HCER1; /* 0x25 */
+ u32 HCBR0; /* 0x26 */
+ u32 HCBR1; /* 0x27 */
+ u32 rsvd7[8]; /* 0x28 */
+ u32 MDAT0; /* 0x30 */
+ u32 MDAT1; /* 0x31 */
+ u32 MDAT2; /* 0x32 */
+ u32 MDAT3; /* 0x33 */
+ u32 MDWE0; /* 0x34 */
+ u32 MDWE1; /* 0x35 */
+ u32 MDWE2; /* 0x36 */
+ u32 MDWE3; /* 0x37 */
+ u32 MCTL; /* 0x38 */
+ u32 MADR; /* 0x39 */
+ u32 rsvd8[0xb6]; /* 0x3A */
+ u32 ACTL; /* 0xF0 */
+ u32 rsvd9[3]; /* 0xF1 */
+ u32 ACSR0; /* 0xF4 */
+ u32 ACSR1; /* 0xF5 */
+ u32 ACMR0; /* 0xF6 */
+ u32 ACMR1; /* 0xF7 */
};
#define DIM2_MASK(n) (~((~(u32)0) << (n)))
--
2.17.0
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