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* [PATCH] clk: qcom: Base rcg parent rate off plan frequency
@ 2018-04-13 20:33 Evan Green
  2018-05-10 18:46 ` Stephen Boyd
  0 siblings, 1 reply; 2+ messages in thread
From: Evan Green @ 2018-04-13 20:33 UTC (permalink / raw)
  To: Andy Gross, David Brown, Michael Turquette, Stephen Boyd,
	linux-arm-msm, linux-soc, linux-clk, linux-kernel
  Cc: Evan Green

_freq_tbl_determine_rate uses the pre_div found in the clock plan
multiplied by the requested rate from the caller to determine the
best parent rate to set. If the requested rate is not exactly equal
to the rate that was found in the clock plan, then using the requested
rate in parent rate calculations is incorrect. For instance, if 150MHz
was requested, but 200MHz was the match found, and that plan had a
pre_div of 3, then the parent should be set to 600MHz, not 450MHz.

Signed-off-by: Evan Green <evgreen@chromium.org>
---
 drivers/clk/qcom/clk-rcg2.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c
index bbeaf9c09dbb..ec6cee8ff1bc 100644
--- a/drivers/clk/qcom/clk-rcg2.c
+++ b/drivers/clk/qcom/clk-rcg2.c
@@ -211,6 +211,7 @@ static int _freq_tbl_determine_rate(struct clk_hw *hw, const struct freq_tbl *f,
 	clk_flags = clk_hw_get_flags(hw);
 	p = clk_hw_get_parent_by_index(hw, index);
 	if (clk_flags & CLK_SET_RATE_PARENT) {
+		rate = f->freq;
 		if (f->pre_div) {
 			rate /= 2;
 			rate *= f->pre_div + 1;
-- 
2.17.0.484.g0c8726318c-goog

^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH] clk: qcom: Base rcg parent rate off plan frequency
  2018-04-13 20:33 [PATCH] clk: qcom: Base rcg parent rate off plan frequency Evan Green
@ 2018-05-10 18:46 ` Stephen Boyd
  0 siblings, 0 replies; 2+ messages in thread
From: Stephen Boyd @ 2018-05-10 18:46 UTC (permalink / raw)
  To: Andy Gross, David Brown, Evan Green, Michael Turquette,
	linux-arm-msm, linux-clk, linux-kernel, linux-soc
  Cc: Evan Green

Quoting Evan Green (2018-04-13 13:33:36)
> _freq_tbl_determine_rate uses the pre_div found in the clock plan
> multiplied by the requested rate from the caller to determine the
> best parent rate to set. If the requested rate is not exactly equal
> to the rate that was found in the clock plan, then using the requested
> rate in parent rate calculations is incorrect. For instance, if 150MHz
> was requested, but 200MHz was the match found, and that plan had a
> pre_div of 3, then the parent should be set to 600MHz, not 450MHz.
> 
> Signed-off-by: Evan Green <evgreen@chromium.org>
> ---

Applied to clk-next

This problem is ancient so I tagged it with Fixes for all the stable
trees.

^ permalink raw reply	[flat|nested] 2+ messages in thread

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