From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Google-Smtp-Source: AB8JxZr+GNjui2Grx1B1HmSnv7c1CDQC5uB1lRR5EuP/LmqrqDs83TWlBD7e7Q61cAxhIv7wC5l2 ARC-Seal: i=1; a=rsa-sha256; t=1525697258; cv=none; d=google.com; s=arc-20160816; b=zJ56osz5k7esPUhS3+vl/va4ZbrfzSehq+BZ/gRLWWOR1gB1v1+Yu6UiagtmpNjP4Z /vomF24YG0CBeifk2A9Wl6rRs/+gKR4fN00DRAM7rAV732XwP3hJHaW0NHtZnXYzChzX d1cGYhtvSsZ0bi65O+6Mv6O/TPgn6PzigFf33pRjE1agfWVj0Kmzh2BG/RYujN+15JLN R/CR6Ti/ILVGbZnnnKYoFquD75fp3ZaU3df2lIsCvele9RE+v9JvR81oGgqZm3NtaBl2 qt6YP0CdC7JGROVVzax4dZJzq4pdnFzw4mDspIOi1HuvX0BlvVQnXJF6E+aONTdu0p2z MdUg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=rvAnw8ENzEhkASds2+ETdOIgP/iMNPTZIfrXp9lwn2E=; b=vkjcwNKupJkKfgNWyzQI+NNnaO8HGWA+k6DimHYMGBDpV6/etbJB0UsERhrRx5Q7zx cTrousrlUrfni2blZ1qgvPlTZGDpUoCvySK28HBzJj20B2cNHKZA9e9gnRH2h3KsE3KG oBiGbltq6ZFWV0wkEeazqJuho2j9011PkcAAutnSVmk2oVCk7bW2AmNwFSUbR7sm7DeH xW0g52L7qJ+fuFfQYMl9fWmuyjCUOBwbfZLAq5+5wUljyGw5zv7vMv5X6+jf1Mtgo05P aQj3LhT0IfxaJIALaQUkJvwQ9SqXf6NnKfB+6wuj++ixn8COS7k3jMX0THkG0ke9tcYj JA5w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of paul.kocialkowski@bootlin.com designates 62.4.15.54 as permitted sender) smtp.mailfrom=paul.kocialkowski@bootlin.com Authentication-Results: mx.google.com; spf=pass (google.com: domain of paul.kocialkowski@bootlin.com designates 62.4.15.54 as permitted sender) smtp.mailfrom=paul.kocialkowski@bootlin.com From: Paul Kocialkowski To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Mauro Carvalho Chehab , Rob Herring , Mark Rutland , Maxime Ripard , Chen-Yu Tsai , Paul Kocialkowski , Greg Kroah-Hartman , "David S . Miller" , Andrew Morton , Linus Walleij , Randy Dunlap , Hans Verkuil , Arnd Bergmann , Stanimir Varbanov , Sakari Ailus , Philipp Zabel , Ramesh Shanmugasundaram , Yannick Fertre , Thomas Gleixner , Hugues Fruchet , Alexandre Courbot , Florent Revest , Tomasz Figa , Ricardo Ribalda Delgado , Smitha T Murthy , Andy Shevchenko , Sylwester Nawrocki , Randy Li Subject: [PATCH v3 13/14] ARM: dts: sun7i-a20: Add Video Engine and reserved memory nodes Date: Mon, 7 May 2018 14:44:59 +0200 Message-Id: <20180507124500.20434-14-paul.kocialkowski@bootlin.com> X-Mailer: git-send-email 2.16.3 In-Reply-To: <20180507124500.20434-1-paul.kocialkowski@bootlin.com> References: <20180507124500.20434-1-paul.kocialkowski@bootlin.com> X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: =?utf-8?q?1599809528107529238?= X-GMAIL-MSGID: =?utf-8?q?1599809528107529238?= X-Mailing-List: linux-kernel@vger.kernel.org List-ID: This adds nodes for the Video Engine and the associated reserved memory for the A20. Up to 96 MiB of memory are dedicated to the CMA pool. The VPU can only map the first 256 MiB of DRAM, so the reserved memory pool has to be located in that area. Following Allwinner's decision in downstream software, the last 96 MiB of the first 256 MiB of RAM are reserved for this purpose. Signed-off-by: Paul Kocialkowski --- arch/arm/boot/dts/sun7i-a20.dtsi | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 9bb6c35fb850..5fccccff469b 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -161,6 +161,21 @@ reg = <0x40000000 0x80000000>; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + /* Address must be kept in the lower 256 MiBs of DRAM for VE. */ + cma_pool: cma@4a000000 { + compatible = "shared-dma-pool"; + size = <0x6000000>; + alloc-ranges = <0x4a000000 0x6000000>; + reusable; + linux,cma-default; + }; + }; + timer { compatible = "arm,armv7-timer"; interrupts = , @@ -463,6 +478,22 @@ }; }; + vpu: video-codec@1c0e000 { + compatible = "allwinner,sun7i-a20-video-engine"; + reg = <0x01c0e000 0x1000>; + + clocks = <&ccu CLK_AHB_VE>, <&ccu CLK_VE>, + <&ccu CLK_DRAM_VE>; + clock-names = "ahb", "mod", "ram"; + + assigned-clocks = <&ccu CLK_VE>; + assigned-clock-rates = <320000000>; + + resets = <&ccu RST_VE>; + interrupts = ; + allwinner,sram = <&ve_sram 1>; + }; + mmc0: mmc@1c0f000 { compatible = "allwinner,sun7i-a20-mmc"; reg = <0x01c0f000 0x1000>; -- 2.16.3