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From: Mark Brown <broonie@kernel.org>
To: Sergey Suloev <ssuloev@orpaltech.com>
Cc: Maxime Ripard <maxime.ripard@bootlin.com>,
	Chen-Yu Tsai <wens@csie.org>,
	linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 3/6] spi: sun6i: restrict transfer length in PIO-mode
Date: Thu, 17 May 2018 16:09:12 +0900	[thread overview]
Message-ID: <20180517070912.GR20254@sirena.org.uk> (raw)
In-Reply-To: <20180330125047.13936-4-ssuloev@orpaltech.com>

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On Fri, Mar 30, 2018 at 03:50:44PM +0300, Sergey Suloev wrote:

> There is no need to handle 3/4 empty/full interrupts as
> the maximum supported transfer length in PIO mode is
> 128 bytes for sun6i- and 64 bytes for sun8i-family SoCs.

Surely the whole point of the 3/4 full interrupts is to allow the FIFO
to be refilled and enable longer transfers?

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  reply	other threads:[~2018-05-17 16:37 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-30 12:50 [PATCH v2 0/6] spi: Add support for DMA transfers in sun6i SPI driver Sergey Suloev
2018-03-30 12:50 ` [PATCH v2 1/6] spi: sun6i: coding style/readability improvements Sergey Suloev
2018-05-17  7:03   ` Mark Brown
2018-05-18 14:29     ` Maxime Ripard
2018-03-30 12:50 ` [PATCH v2 2/6] spi: sun6i: handle chip select polarity flag Sergey Suloev
2018-05-17  7:07   ` Mark Brown
2018-03-30 12:50 ` [PATCH v2 3/6] spi: sun6i: restrict transfer length in PIO-mode Sergey Suloev
2018-05-17  7:09   ` Mark Brown [this message]
2018-03-30 12:50 ` [PATCH v2 4/6] spi: sun6i: use completion provided by SPI core Sergey Suloev
2018-03-30 12:50 ` [PATCH v2 5/6] spi: sun6i: introduce register set/unset helpers Sergey Suloev
2018-03-30 12:50 ` [PATCH v2 6/6] spi: sun6i: add DMA transfers support Sergey Suloev

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