Re: [PATCH v5 08/23] iommu/vt-d: support flushing more translation cache types

From: kbuild test robot <lkp@intel.com>
To: Jacob Pan <jacob.jun.pan@linux.intel.com>
Cc: kbuild-all@01.org, iommu@lists.linux-foundation.org,
	LKML <linux-kernel@vger.kernel.org>,
	Joerg Roedel <joro@8bytes.org>,
	David Woodhouse <dwmw2@infradead.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Alex Williamson <alex.williamson@redhat.com>,
	Jean-Philippe Brucker <jean-philippe.brucker@arm.com>,
	Rafael Wysocki <rafael.j.wysocki@intel.com>,
	"Liu, Yi L" <yi.l.liu@intel.com>,
	"Tian, Kevin" <kevin.tian@intel.com>,
	Raj Ashok <ashok.raj@intel.com>,
	Jean Delvare <khali@linux-fr.org>,
	Christoph Hellwig <hch@infradead.org>,
	Lu Baolu <baolu.lu@linux.intel.com>,
	Jacob Pan <jacob.jun.pan@linux.intel.com>
Subject: Re: [PATCH v5 08/23] iommu/vt-d: support flushing more translation cache types
Date: Thu, 17 May 2018 16:44:35 +0800	[thread overview]
Message-ID: <201805171414.Zk5q0V2W%fengguang.wu@intel.com> (raw)
In-Reply-To: <1526072055-86990-9-git-send-email-jacob.jun.pan@linux.intel.com>

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Hi Jacob,

I love your patch! Perhaps something to improve:

[auto build test WARNING on iommu/next]
[also build test WARNING on v4.17-rc5 next-20180516]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Jacob-Pan/IOMMU-and-VT-d-driver-support-for-Shared-Virtual-Address-SVA/20180512-114854
base:   https://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git next
config: x86_64-rhel-7.2 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-16) 7.3.0
reproduce:
        # save the attached .config to linux build tree
        make ARCH=x86_64 

All warnings (new ones prefixed by >>):

   drivers/iommu/dmar.c: In function 'qi_flush_dev_eiotlb':
>> drivers/iommu/dmar.c:1382:12: warning: 'desc.high' is used uninitialized in this function [-Wuninitialized]
     desc.high |= QI_DEV_EIOTLB_GLOB(granu);
               ^~

vim +1382 drivers/iommu/dmar.c

  1374	
  1375	void qi_flush_dev_eiotlb(struct intel_iommu *iommu, u16 sid,
  1376			u32 pasid,  u16 qdep, u64 addr, unsigned size, u64 granu)
  1377	{
  1378		struct qi_desc desc;
  1379	
  1380		desc.low = QI_DEV_EIOTLB_PASID(pasid) | QI_DEV_EIOTLB_SID(sid) |
  1381			QI_DEV_EIOTLB_QDEP(qdep) | QI_DEIOTLB_TYPE;
> 1382		desc.high |= QI_DEV_EIOTLB_GLOB(granu);
  1383	
  1384		/* If S bit is 0, we only flush a single page. If S bit is set,
  1385		 * The least significant zero bit indicates the size. VT-d spec
  1386		 * 6.5.2.6
  1387		 */
  1388		if (!size)
  1389			desc.high = QI_DEV_EIOTLB_ADDR(addr) & ~QI_DEV_EIOTLB_SIZE;
  1390		else {
  1391			unsigned long mask = 1UL << (VTD_PAGE_SHIFT + size);
  1392	
  1393			desc.high = QI_DEV_EIOTLB_ADDR(addr & ~mask) | QI_DEV_EIOTLB_SIZE;
  1394		}
  1395		qi_submit_sync(&desc, iommu);
  1396	}
  1397	

---
0-DAY kernel test infrastructure                Open Source Technology Center
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