From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: "Linus Walleij" <linus.walleij@linaro.org>,
"Rob Herring" <robh+dt@kernel.org>,
"Andreas Färber" <afaerber@suse.de>, 刘炜 <liuwei@actions-semi.com>,
mp-cs@actions-semi.com, 96boards@ucrobotics.com,
devicetree <devicetree@vger.kernel.org>,
"Daniel Thompson" <daniel.thompson@linaro.org>,
amit.kucheria@linaro.org,
"linux-arm Mailing List" <linux-arm-kernel@lists.infradead.org>,
"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
hzhang@ucrobotics.com, bdong@ucrobotics.com,
"Mani Sadhasivam" <manivannanece23@gmail.com>,
"Thomas Liau" <thomas.liau@actions-semi.com>,
jeff.chen@actions-semi.com
Subject: Re: [PATCH 3/3] pinctrl: actions: Add interrupt support for OWL S900 SoC
Date: Sun, 3 Jun 2018 22:27:23 +0530 [thread overview]
Message-ID: <20180603165723.GA14907@Mani-XPS-13-9360> (raw)
In-Reply-To: <CAHp75Ve8ZCbEqnYK0KqtCHQm-EOUWRSyMzi51P+3_7brtXq6dA@mail.gmail.com>
Hi Andy,
On Sun, Jun 03, 2018 at 11:37:53AM +0300, Andy Shevchenko wrote:
> On Sat, Jun 2, 2018 at 7:54 PM, Manivannan Sadhasivam
> <manivannan.sadhasivam@linaro.org> wrote:
> > Add interrupt support for Actions Semi OWL S900 SoC.
>
> > + port = owl_gpio_get_port(pctrl, &gpio);
> > + if (WARN_ON(port == NULL))
> > + return;
>
> At which circumstances the above possible?
>
Only possible when the requested GPIO exceeds chip->ngpio. I know it is
a kind of redundant check, but it is good to have this during development.
> > + port = owl_gpio_get_port(pctrl, &gpio);
> > + if (WARN_ON(port == NULL))
> > + return;
>
> Ditto.
>
Same as above.
> > + port = owl_gpio_get_port(pctrl, &gpio);
> > + if (WARN_ON(port == NULL))
> > + return;
>
> Ditto.
>
Same as above.
> > + port = owl_gpio_get_port(pctrl, &gpio);
> > + if (WARN_ON(port == NULL))
> > + return -ENODEV;
>
> Ditto.
>
Same as above.
>
> > + for (i = 0; i < chip->ngpio; i++) {
> > + irqno = irq_create_mapping(pctrl->domain, i);
> > + irq_set_chip_and_handler(irqno, &owl_gpio_irq_chip,
> > + handle_edge_irq);
> > + irq_set_chip_data(irqno, pctrl);
> > + }
>
> I'm not sure the handle_edge_irq() is a correct handler here. It would
> be handle_bad_irq() until IRQ has been requested properly.
> No?
>
Hmmm, good question. Since the handler used in irq_set_chip_and_handler
is superseded by irq_set_chained_handler_and_data, this doesn't matter
anyway. But I would like to hear what Linus suggests here!
> > +/* GPIO TYPE Bit Definition */
> > +#define OWL_GPIO_INT_LEVEL_HIGH 0
> > +#define OWL_GPIO_INT_LEVEL_LOW 1
> > +#define OWL_GPIO_INT_EDGE_RISING 2
> > +#define OWL_GPIO_INT_EDGE_FALLING 3
>
> > +#define OWL_GPIO_INT_MASK 3
>
> GENMASK?
>
Ack.
Thanks,
Mani
> --
> With Best Regards,
> Andy Shevchenko
next prev parent reply other threads:[~2018-06-03 16:57 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-02 16:54 [PATCH 0/3] Add gpio interrupt support for Actions Semi S900 SoC Manivannan Sadhasivam
2018-06-02 16:54 ` [PATCH 1/3] dt-bindings: pinctrl: Add gpio interrupt bindings for Actions " Manivannan Sadhasivam
2018-06-12 20:58 ` Rob Herring
2018-06-02 16:54 ` [PATCH 2/3] arm64: dts: actions: Add interrupt properties to pinctrl node for S900 Manivannan Sadhasivam
2018-06-02 16:54 ` [PATCH 3/3] pinctrl: actions: Add interrupt support for OWL S900 SoC Manivannan Sadhasivam
2018-06-03 8:37 ` Andy Shevchenko
2018-06-03 16:57 ` Manivannan Sadhasivam [this message]
2018-06-12 8:38 ` Linus Walleij
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