From: Sascha Hauer <s.hauer@pengutronix.de>
To: Martin Kaiser <martin@kaiser.cx>
Cc: Boris Brezillon <boris.brezillon@bootlin.com>,
David Woodhouse <dwmw2@infradead.org>,
Fabio Estevam <fabio.estevam@nxp.com>,
linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
stable@vger.kernel.org
Subject: Re: [PATCH] mtd: rawnand: mxc: set spare area size register explicitly
Date: Mon, 4 Jun 2018 08:53:07 +0200 [thread overview]
Message-ID: <20180604065307.ipq3qvktq3ppxw2r@pengutronix.de> (raw)
In-Reply-To: <1528025495-14443-1-git-send-email-martin@kaiser.cx>
On Sun, Jun 03, 2018 at 01:31:35PM +0200, Martin Kaiser wrote:
> The v21 version of the NAND flash controller contains a Spare Area Size
> Register (SPAS) at offset 0x10. Its setting defaults to the maximum
> spare area size of 218 bytes. The size that is set in this register is
> used by the controller when it calculates the ECC bytes internally in
> hardware.
>
> Usually, this register is updated from settings in the IIM fuses when
> the system is booting from nand flash. For other boot media, however,
> the SPAS register remains at the default setting, which may not work for
> the particular flash chip on the board. The same goes for flash chips
> whose configuration cannot be set in the IIM fuses (e.g. chips with 2k
> sector size and 128 bytes spare area size can't be configured in the IIM
> fuses on imx25 systems).
>
> Set the SPAS register explicitly during the preset operation. Derive the
> register value from mtd->oobsize that was detected during probe by
> decoding the flash chip's ID bytes.
>
> While at it, rename the define for the spare area register's offset to
> NFC_V21_RSLTSPARE_AREA. The register at offset 0x10 on v1 controllers is
> different from the register on v21 controllers.
>
> Signed-off-by: Martin Kaiser <martin@kaiser.cx>
> Cc: stable@vger.kernel.org
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha
> ---
> drivers/mtd/nand/raw/mxc_nand.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/nand/raw/mxc_nand.c b/drivers/mtd/nand/raw/mxc_nand.c
> index 45786e7..c2f8572 100644
> --- a/drivers/mtd/nand/raw/mxc_nand.c
> +++ b/drivers/mtd/nand/raw/mxc_nand.c
> @@ -48,7 +48,7 @@
> #define NFC_V1_V2_CONFIG (host->regs + 0x0a)
> #define NFC_V1_V2_ECC_STATUS_RESULT (host->regs + 0x0c)
> #define NFC_V1_V2_RSLTMAIN_AREA (host->regs + 0x0e)
> -#define NFC_V1_V2_RSLTSPARE_AREA (host->regs + 0x10)
> +#define NFC_V21_RSLTSPARE_AREA (host->regs + 0x10)
> #define NFC_V1_V2_WRPROT (host->regs + 0x12)
> #define NFC_V1_UNLOCKSTART_BLKADDR (host->regs + 0x14)
> #define NFC_V1_UNLOCKEND_BLKADDR (host->regs + 0x16)
> @@ -1274,6 +1274,9 @@ static void preset_v2(struct mtd_info *mtd)
> writew(config1, NFC_V1_V2_CONFIG1);
> /* preset operation */
>
> + /* spare area size in 16bit words */
> + writew(mtd->oobsize >> 1, NFC_V21_RSLTSPARE_AREA);
> +
> /* Unlock the internal RAM Buffer */
> writew(0x2, NFC_V1_V2_CONFIG);
>
> --
> 2.1.4
>
>
--
Pengutronix e.K. | |
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next prev parent reply other threads:[~2018-06-04 6:53 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-03 11:31 [PATCH] mtd: rawnand: mxc: set spare area size register explicitly Martin Kaiser
2018-06-04 6:53 ` Sascha Hauer [this message]
2018-06-07 15:19 ` Miquel Raynal
2018-06-10 13:14 ` Martin Kaiser
2018-06-10 13:31 ` [PATCH v2] " Martin Kaiser
2018-06-18 14:06 ` Miquel Raynal
2018-06-18 14:09 ` Boris Brezillon
2018-06-18 20:36 ` Martin Kaiser
2018-06-18 20:41 ` [PATCH v3] " Martin Kaiser
2018-06-19 5:52 ` Boris Brezillon
2018-06-19 9:07 ` Miquel Raynal
2018-06-20 9:41 ` Boris Brezillon
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