From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by aws-us-west-2-korg-lkml-1.web.codeaurora.org (Postfix) with ESMTP id BA719C433EF for ; Thu, 14 Jun 2018 01:22:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 72CA3208D9 for ; Thu, 14 Jun 2018 01:22:41 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 72CA3208D9 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935899AbeFNBWj (ORCPT ); Wed, 13 Jun 2018 21:22:39 -0400 Received: from mga06.intel.com ([134.134.136.31]:29238 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S935608AbeFNBWh (ORCPT ); Wed, 13 Jun 2018 21:22:37 -0400 X-Amp-Result: UNSCANNABLE X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Jun 2018 18:22:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,220,1526367600"; d="scan'208";a="62997122" Received: from voyager.sc.intel.com (HELO voyager) ([10.3.52.149]) by fmsmga004.fm.intel.com with ESMTP; 13 Jun 2018 18:22:36 -0700 Date: Wed, 13 Jun 2018 18:19:01 -0700 From: Ricardo Neri To: Peter Zijlstra Cc: Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , Andi Kleen , Ashok Raj , Borislav Petkov , Tony Luck , "Ravi V. Shankar" , x86@kernel.org, sparclinux@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, Jacob Pan , Don Zickus , Nicholas Piggin , Michael Ellerman , Frederic Weisbecker , Babu Moger , "David S. Miller" , Benjamin Herrenschmidt , Paul Mackerras , Mathieu Desnoyers , Masami Hiramatsu , Andrew Morton , Philippe Ombredanne , Colin Ian King , "Luis R. Rodriguez" , iommu@lists.linux-foundation.org Subject: Re: [RFC PATCH 14/23] watchdog/hardlockup: Decouple the hardlockup detector from perf Message-ID: <20180614011901.GA22652@voyager> References: <1528851463-21140-1-git-send-email-ricardo.neri-calderon@linux.intel.com> <1528851463-21140-15-git-send-email-ricardo.neri-calderon@linux.intel.com> <20180613084324.GU12258@hirez.programming.kicks-ass.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180613084324.GU12258@hirez.programming.kicks-ass.net> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jun 13, 2018 at 10:43:24AM +0200, Peter Zijlstra wrote: > On Tue, Jun 12, 2018 at 05:57:34PM -0700, Ricardo Neri wrote: > > The current default implementation of the hardlockup detector assumes that > > it is implemented using perf events. > > The sparc and powerpc things are very much not using perf. Isn't it true that the current hardlockup detector (under kernel/watchdog_hld.c) is based on perf? As far as I understand, this hardlockup detector is constructed using perf events for architectures that don't provide an NMI watchdog. Perhaps I can be more specific and say that this synthetized detector is based on perf. On a side note, I saw that powerpc might use a perf-based hardlockup detector if it has perf events [1]. Please let me know if my understanding is not correct. Thanks and BR, Ricardo [1]. https://elixir.bootlin.com/linux/v4.17/source/arch/powerpc/Kconfig#L218