linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: ilia.lin@gmail.com
To: ilia.lin@gmail.com
Cc: Ilia Lin <ilialin@codeaurora.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Andy Gross <andy.gross@linaro.org>,
	David Brown <david.brown@linaro.org>,
	Will Deacon <will.deacon@arm.com>,
	Amit Kucheria <amit.kucheria@linaro.org>,
	linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: [PATCH v13 5/8] dt-bindings: clk: qcom: Add bindings for CPU clock for msm8996
Date: Thu, 14 Jun 2018 23:53:52 +0200	[thread overview]
Message-ID: <20180614215358.11264-6-ilia.lin@gmail.com> (raw)
In-Reply-To: <20180614215358.11264-1-ilia.lin@gmail.com>

From: Ilia Lin <ilialin@codeaurora.org>

Each of the CPU clusters (Power and Perf) on msm8996 are
clocked via 2 PLLs, a primary and alternate. There are also
2 Mux'es, a primary and secondary all connected together
as shown below

                             +-------+
              XO             |       |
          +------------------>0      |
                             |       |
                   PLL/2     | SMUX  +----+
                     +------->1      |    |
                     |       |       |    |
                     |       +-------+    |    +-------+
                     |                    +---->0      |
                     |                         |       |
+---------------+    |             +----------->1      | CPU clk
|Primary PLL    +----+ PLL_EARLY   |           |       +------>
|               +------+-----------+    +------>2 PMUX |
+---------------+      |                |      |       |
                       |   +------+     |   +-->3      |
                       +--^+  ACD +-----+   |  +-------+
+---------------+          +------+         |
|Alt PLL        |                           |
|               +---------------------------+
+---------------+         PLL_EARLY

The primary PLL is what drives the CPU clk, except for times
when we are reprogramming the PLL itself (for rate changes) when
we temporarily switch to an alternate PLL. A subsequent patch adds
support to switch between primary and alternate PLL during rate
changes.

The primary PLL operates on a single VCO range, between 600MHz
and 3GHz. However the CPUs do support OPPs with frequencies
between 300MHz and 600MHz. In order to support running the CPUs
at those frequencies we end up having to lock the PLL at twice
the rate and drive the CPU clk via the PLL/2 output and SMUX.

Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Tested-by: Amit Kucheria <amit.kucheria@linaro.org>
---
 Documentation/devicetree/bindings/clock/qcom,kryocc.txt | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/qcom,kryocc.txt

diff --git a/Documentation/devicetree/bindings/clock/qcom,kryocc.txt b/Documentation/devicetree/bindings/clock/qcom,kryocc.txt
new file mode 100644
index 000000000000..8458783c5a1a
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,kryocc.txt
@@ -0,0 +1,17 @@
+Qualcomm CPUSS clock controller for Kryo CPUs
+----------------------------------------------------
+
+Required properties :
+- compatible : shall contain only one of the following:
+
+			"qcom,msm8996-apcc"
+
+- reg : shall contain base register location and length
+- #clock-cells : shall contain 1
+
+Example:
+	kryocc: clock-controller@6400000 {
+		compatible = "qcom,msm8996-apcc";
+		reg = <0x6400000 0x90000>;
+		#clock-cells = <1>;
+	};
-- 
2.11.0


  parent reply	other threads:[~2018-06-14 21:56 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-14 21:53 [PATCH v13 0/8] Clock for CPU scaling support " ilia.lin
2018-06-14 21:53 ` [PATCH v13 1/8] soc: qcom: Separate kryo l2 accessors from PMU driver ilia.lin
2018-06-14 21:53 ` [PATCH v13 2/8] clk: qcom: Make clk_alpha_pll_configure available to modules ilia.lin
2018-10-17 15:39   ` Stephen Boyd
2018-06-14 21:53 ` [PATCH v13 3/8] clk: Use devm_ in the register fixed factor clock ilia.lin
2018-09-14 18:53   ` Ricardo Salveti
2018-10-12 22:08     ` Stephen Boyd
2018-10-14 20:21       ` Niklas Cassel
2018-10-17 15:41         ` Stephen Boyd
2018-06-14 21:53 ` [PATCH v13 4/8] clk: qcom: Add CPU clock driver for msm8996 ilia.lin
2018-10-17 15:38   ` Stephen Boyd
2018-06-14 21:53 ` ilia.lin [this message]
2018-06-14 21:53 ` [PATCH v13 6/8] clk: qcom: cpu-8996: Add support to switch to alternate PLL ilia.lin
2018-10-17 15:32   ` Stephen Boyd
2018-06-14 21:53 ` [PATCH v13 7/8] clk: qcom: cpu-8996: Add support to switch below 600Mhz ilia.lin
2018-06-14 21:53 ` [PATCH v13 8/8] clk: qcom: Add ACD path to CPU clock driver for msm8996 ilia.lin
2018-10-16 23:56   ` Stephen Boyd

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180614215358.11264-6-ilia.lin@gmail.com \
    --to=ilia.lin@gmail.com \
    --cc=amit.kucheria@linaro.org \
    --cc=andy.gross@linaro.org \
    --cc=david.brown@linaro.org \
    --cc=devicetree@vger.kernel.org \
    --cc=ilialin@codeaurora.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-soc@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=mturquette@baylibre.com \
    --cc=robh+dt@kernel.org \
    --cc=sboyd@kernel.org \
    --cc=will.deacon@arm.com \
    --subject='Re: [PATCH v13 5/8] dt-bindings: clk: qcom: Add bindings for CPU clock for msm8996' \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).