From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3EBA5C1B0F2 for ; Wed, 20 Jun 2018 09:41:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EBFF720693 for ; Wed, 20 Jun 2018 09:41:15 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org EBFF720693 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bootlin.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932308AbeFTJlN (ORCPT ); Wed, 20 Jun 2018 05:41:13 -0400 Received: from mail.bootlin.com ([62.4.15.54]:47279 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932365AbeFTJlK (ORCPT ); Wed, 20 Jun 2018 05:41:10 -0400 Received: by mail.bootlin.com (Postfix, from userid 110) id E32A4207D4; Wed, 20 Jun 2018 11:41:08 +0200 (CEST) Received: from bbrezillon (AAubervilliers-681-1-50-153.w90-88.abo.wanadoo.fr [90.88.168.153]) by mail.bootlin.com (Postfix) with ESMTPSA id 9F4C9206D8; Wed, 20 Jun 2018 11:41:08 +0200 (CEST) Date: Wed, 20 Jun 2018 11:41:08 +0200 From: Boris Brezillon To: Miquel Raynal Cc: Martin Kaiser , David Woodhouse , Sascha Hauer , Fabio Estevam , linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: Re: [PATCH v3] mtd: rawnand: mxc: set spare area size register explicitly Message-ID: <20180620114108.4ef7ab58@bbrezillon> In-Reply-To: <20180619110741.32e4a5d8@xps13> References: <1528025495-14443-1-git-send-email-martin@kaiser.cx> <1529354463-23526-1-git-send-email-martin@kaiser.cx> <20180619110741.32e4a5d8@xps13> X-Mailer: Claws Mail 3.15.0-dirty (GTK+ 2.24.31; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 19 Jun 2018 11:07:41 +0200 Miquel Raynal wrote: > On Mon, 18 Jun 2018 22:41:03 +0200, Martin Kaiser > wrote: > > > The v21 version of the NAND flash controller contains a Spare Area Size > > Register (SPAS) at offset 0x10. Its setting defaults to the maximum > > spare area size of 218 bytes. The size that is set in this register is > > used by the controller when it calculates the ECC bytes internally in > > hardware. > > > > Usually, this register is updated from settings in the IIM fuses when > > the system is booting from NAND flash. For other boot media, however, > > the SPAS register remains at the default setting, which may not work for > > the particular flash chip on the board. The same goes for flash chips > > whose configuration cannot be set in the IIM fuses (e.g. chips with 2k > > sector size and 128 bytes spare area size can't be configured in the IIM > > fuses on imx25 systems). > > > > Set the SPAS register explicitly during the preset operation. Derive the > > register value from mtd->oobsize that was detected during probe by > > decoding the flash chip's ID bytes. > > > > While at it, rename the define for the spare area register's offset to > > NFC_V21_RSLTSPARE_AREA. The register at offset 0x10 on v1 controllers is > > different from the register on v21 controllers. > > > > Signed-off-by: Martin Kaiser > > Cc: stable@vger.kernel.org > > Fixes: d484018 ("mtd: mxc_nand: set NFC registers after reset") > > Reviewed-by: Miquel Raynal Applied. Thanks, Boris