From: Marc Zyngier <marc.zyngier@arm.com>
To: Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>
Cc: linux-kernel@vger.kernel.org,
Alexandre Belloni <alexandre.belloni@bootlin.com>,
Yang Yingliang <yangyingliang@huawei.com>,
Sumit Garg <sumit.garg@linaro.org>
Subject: [PATCH v2 1/7] genirq/debugfs: Add missing IRQCHIP_SUPPORTS_LEVEL_MSI debug
Date: Fri, 22 Jun 2018 10:52:48 +0100 [thread overview]
Message-ID: <20180622095254.5906-2-marc.zyngier@arm.com> (raw)
In-Reply-To: <20180622095254.5906-1-marc.zyngier@arm.com>
We're missing the IRQCHIP_SUPPORTS_LEVEL_MSI debug entry, making
debugfs slightly less useful. Take this opportunity to also add
a missing comment in the definition of IRQCHIP_SUPPORTS_LEVEL_MSI.
Fixes: 6988e0e0d283 ("genirq/msi: Limit level-triggered MSI to platform devices")
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
include/linux/irq.h | 1 +
kernel/irq/debugfs.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/include/linux/irq.h b/include/linux/irq.h
index 4bd2f34947f4..201de12a9957 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -503,6 +503,7 @@ struct irq_chip {
* IRQCHIP_SKIP_SET_WAKE: Skip chip.irq_set_wake(), for this irq chip
* IRQCHIP_ONESHOT_SAFE: One shot does not require mask/unmask
* IRQCHIP_EOI_THREADED: Chip requires eoi() on unmask in threaded mode
+ * IRQCHIP_SUPPORTS_LEVEL_MSI Chip can provide two doorbells for Level MSIs
*/
enum {
IRQCHIP_SET_TYPE_MASKED = (1 << 0),
diff --git a/kernel/irq/debugfs.c b/kernel/irq/debugfs.c
index 4dadeb3d6666..6f636136cccc 100644
--- a/kernel/irq/debugfs.c
+++ b/kernel/irq/debugfs.c
@@ -55,6 +55,7 @@ static const struct irq_bit_descr irqchip_flags[] = {
BIT_MASK_DESCR(IRQCHIP_SKIP_SET_WAKE),
BIT_MASK_DESCR(IRQCHIP_ONESHOT_SAFE),
BIT_MASK_DESCR(IRQCHIP_EOI_THREADED),
+ BIT_MASK_DESCR(IRQCHIP_SUPPORTS_LEVEL_MSI),
};
static void
--
2.17.1
next prev parent reply other threads:[~2018-06-22 9:53 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-22 9:52 [PATCH v2 0/7] irqchip: v4.18-rc1 fixes Marc Zyngier
2018-06-22 9:52 ` Marc Zyngier [this message]
2018-06-22 12:25 ` [tip:irq/urgent] genirq/debugfs: Add missing IRQCHIP_SUPPORTS_LEVEL_MSI debug tip-bot for Marc Zyngier
2018-06-22 9:52 ` [PATCH v2 2/7] irqchip/ls-scfg-msi: Fix MSI affinity handling Marc Zyngier
2018-06-22 11:02 ` Alexandre Belloni
2018-06-22 12:25 ` [tip:irq/urgent] " tip-bot for Marc Zyngier
2018-06-22 9:52 ` [PATCH v2 3/7] irqchip/gic-v2m: Fix SPI release on error path Marc Zyngier
2018-06-22 12:26 ` [tip:irq/urgent] " tip-bot for Marc Zyngier
2018-06-22 9:52 ` [PATCH v2 4/7] irqchip/gic-v3-its: Don't bind LPI to unavailable NUMA node Marc Zyngier
2018-06-22 12:26 ` [tip:irq/urgent] " tip-bot for Yang Yingliang
2018-06-22 9:52 ` [PATCH v2 5/7] irqchip/gic-v3-its: Only emit SYNC if targetting a valid collection Marc Zyngier
2018-06-22 12:27 ` [tip:irq/urgent] " tip-bot for Marc Zyngier
2018-06-22 9:52 ` [PATCH v2 6/7] irqchip/gic-v3-its: Only emit VSYNC " Marc Zyngier
2018-06-22 12:27 ` [tip:irq/urgent] " tip-bot for Marc Zyngier
2018-06-22 9:52 ` [PATCH v2 7/7] irqchip/gic-v3-its: Fix reprogramming of redistributors on CPU hotplug Marc Zyngier
2018-06-22 12:28 ` [tip:irq/urgent] " tip-bot for Marc Zyngier
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