From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.3 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AB6ACC6778A for ; Fri, 29 Jun 2018 20:39:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6B8D023E00 for ; Fri, 29 Jun 2018 20:39:28 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6B8D023E00 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935174AbeF2Uj0 (ORCPT ); Fri, 29 Jun 2018 16:39:26 -0400 Received: from mga03.intel.com ([134.134.136.65]:4464 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934227AbeF2UjZ (ORCPT ); Fri, 29 Jun 2018 16:39:25 -0400 X-Amp-Result: UNSCANNABLE X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Jun 2018 13:39:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,287,1526367600"; d="scan'208";a="71101619" Received: from romley-ivt3.sc.intel.com ([172.25.110.60]) by orsmga002.jf.intel.com with ESMTP; 29 Jun 2018 13:39:24 -0700 Date: Fri, 29 Jun 2018 13:38:44 -0700 From: Fenghua Yu To: Thomas Gleixner Cc: Fenghua Yu , Dave Hansen , Ingo Molnar , H Peter Anvin , Ashok Raj , Alan Cox , Peter Zijlstra , Rafael Wysocki , Tony Luck , Ravi V Shankar , linux-kernel , x86 Subject: Re: [PATCH v2 2/4] x86/split_lock: Align x86_capability to unsigned long to avoid split locked access Message-ID: <20180629203844.GA68178@romley-ivt3.sc.intel.com> References: <1530282807-66555-1-git-send-email-fenghua.yu@intel.com> <1530282807-66555-3-git-send-email-fenghua.yu@intel.com> <20180629190346.GO18979@romley-ivt3.sc.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jun 29, 2018 at 10:08:59PM +0200, Thomas Gleixner wrote: > On Fri, 29 Jun 2018, Fenghua Yu wrote: > > > On Fri, Jun 29, 2018 at 06:35:39PM +0200, Thomas Gleixner wrote: > > > On Fri, 29 Jun 2018, Dave Hansen wrote: > > > > > > Plus what enforces proper alignment for the other capability related > > > u32 arrays? > > > > Do you want me to enforce unsigned long alignment for all that are used by > > locked BTS/BTR? > > If there are variables which might be unaligned and accessed with locked > instructions and you have them identified, then why are you asking whether > they should be fixed? > > Ignoring them because they do not trigger #AC right now, is only the > correct answer if you are a follower of the 'works by chance' cult. > > Yeah, I know that most of this industry just works by chance.... > Ok. I can work on fixing alignment for these instructions in next version. How to handle data that is used in generic code which can be used on non-Intel platform? For exmple, if I do this change for struct efi in include/linux/efi.h because set_bit() sets bits in efi.flags: - unsigned long flags; + unsigned long flags __aligned(unsigned long); } efi; People may argue that the alignment unnecessarily increases size of 'efi' on non-Intel platform which doesn't have split lock issue. Do we care this argument? Another question, there will be a bunch of one-line changes for the alignment (i.e. adding __aligned(unsigned long)) in various files. Will the changes be put in one big patch or in separate one-liner patches? Thanks. -Fenghua