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[24.223.123.72]) by smtp.gmail.com with ESMTPSA id j128-v6sm526307ywf.9.2018.07.03.09.58.36 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 03 Jul 2018 09:58:37 -0700 (PDT) Date: Tue, 3 Jul 2018 10:58:35 -0600 From: Rob Herring To: Jae Hyun Yoo Cc: Lee Jones , Mark Rutland , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, Andrew Jeffery , James Feist , Jason M Biils , Joel Stanley , Vernon Mauery Subject: Re: [PATCH linux-next v6 07/13] dt-bindings: mfd: Add a document for PECI client MFD Message-ID: <20180703165835.GA18160@rob-hp-laptop> References: <20180621193721.20588-1-jae.hyun.yoo@linux.intel.com> <20180621194054.20897-1-jae.hyun.yoo@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180621194054.20897-1-jae.hyun.yoo@linux.intel.com> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jun 21, 2018 at 12:40:54PM -0700, Jae Hyun Yoo wrote: > This commit adds a dt-bindings document for PECI client MFD. This and the next patch still have the same issues I've outlined in at least 2 prior versions. > Signed-off-by: Jae Hyun Yoo > Cc: Andrew Jeffery > Cc: James Feist > Cc: Jason M Biils > Cc: Joel Stanley > Cc: Vernon Mauery > --- > .../bindings/mfd/intel-peci-client.txt | 34 +++++++++++++++++++ > 1 file changed, 34 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mfd/intel-peci-client.txt > > diff --git a/Documentation/devicetree/bindings/mfd/intel-peci-client.txt b/Documentation/devicetree/bindings/mfd/intel-peci-client.txt > new file mode 100644 > index 000000000000..cb341e363add > --- /dev/null > +++ b/Documentation/devicetree/bindings/mfd/intel-peci-client.txt > @@ -0,0 +1,34 @@ > +* Intel PECI client bindings > + > +PECI (Platform Environment Control Interface) is a one-wire bus interface that > +provides a communication channel from PECI clients in Intel processors and > +chipset components to external monitoring or control devices. PECI is designed > +to support the following sideband functions: > + > +- Processor and DRAM thermal management > +- Platform Manageability > +- Processor Interface Tuning and Diagnostics > +- Failure Analysis > + > +Required properties: > +- compatible : Should be "intel,peci-client". > +- reg : Should contain address of a client CPU. Address range of CPU > + clients starts from 0x30 based on PECI specification. > + > +Example: > + peci-bus@0 { > + compatible = "vendor,soc-peci"; > + reg = <0x0 0x1000>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + peci-client@30 { > + compatible = "intel,peci-client"; > + reg = <0x30>; > + }; > + > + peci-client@31 { > + compatible = "intel,peci-client"; > + reg = <0x31>; > + }; > + }; > -- > 2.17.1 >