From: Andrea Parri <andrea.parri@amarulasolutions.com>
To: Alan Stern <stern@rowland.harvard.edu>
Cc: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com>,
LKMM Maintainers -- Akira Yokosawa <akiyks@gmail.com>,
Boqun Feng <boqun.feng@gmail.com>,
Daniel Lustig <dlustig@nvidia.com>,
David Howells <dhowells@redhat.com>,
Jade Alglave <j.alglave@ucl.ac.uk>,
Luc Maranget <luc.maranget@inria.fr>,
Nicholas Piggin <npiggin@gmail.com>,
Peter Zijlstra <peterz@infradead.org>,
Will Deacon <will.deacon@arm.com>,
Kernel development list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2] tools/memory-model: Add extra ordering for locks and remove it for ordinary release/acquire
Date: Wed, 11 Jul 2018 01:14:55 +0200 [thread overview]
Message-ID: <20180710231455.GA11372@andrea> (raw)
In-Reply-To: <Pine.LNX.4.44L0.1807101127320.1449-100000@iolanthe.rowland.org>
On Tue, Jul 10, 2018 at 11:34:45AM -0400, Alan Stern wrote:
> On Tue, 10 Jul 2018, Andrea Parri wrote:
>
> > > > ACQUIRE operations include LOCK operations and both smp_load_acquire()
> > > > and smp_cond_acquire() operations. [BTW, the latter was replaced by
> > > > smp_cond_load_acquire() in 1f03e8d2919270 ...]
> > > >
> > > > RELEASE operations include UNLOCK operations and smp_store_release()
> > > > operations. [...]
> > > >
> > > > [...] after an ACQUIRE on a given variable, all memory accesses
> > > > preceding any prior RELEASE on that same variable are guaranteed
> > > > to be visible.
> > >
> > > As far as I can see, these statements remain valid.
> >
> > Interesting; ;-) What does these statement tells you ;-) when applied
> > to a: and b: below?
> >
> > a: WRITE_ONCE(x, 1); // "preceding any prior RELEASE..."
> > smp_store_release(&s, 1);
> > smp_load_acquire(&s);
> > b: WRITE_ONCE(y, 1); // "after an ACQUIRE..."
>
> The first statement tells me that b: follows an ACQUIRE.
>
> The second tells me that a: precedes a RELEASE.
>
> And the third tells me that any READ_ONCE(x) statements coming po-after
> b: would see x = 1 or a later value of x. (Of course, they would have
> to see that anyway because of the cache coherency rules.)
Mmh, something like "visible from the same CPU of the ACQUIRE" probably
could have helped me to reach the same conclusion.
>
> More to the point, given:
>
> P0()
> {
> WRITE_ONCE(x, 1);
> a: smp_store_release(&s, 1);
> }
>
> P1()
> {
> b: r1 = smp_load_acquire(&s);
> r2 = READ_ONCE(x);
> }
>
> the third statement tells me that if r1 = 1 (that is, if a: is prior to
> b:) then r2 must be 1.
Indeed; the "prior" is ambiguous, but yes.
Andrea
>
> Alan
>
next prev parent reply other threads:[~2018-07-10 23:15 UTC|newest]
Thread overview: 84+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-09 20:01 [PATCH v2] tools/memory-model: Add extra ordering for locks and remove it for ordinary release/acquire Alan Stern
2018-07-09 21:45 ` Paul E. McKenney
2018-07-10 13:57 ` Alan Stern
2018-07-10 16:25 ` Paul E. McKenney
[not found] ` <Pine.LNX.4.44L0.1807101416390.1449-100000@iolanthe.rowland.org>
2018-07-10 19:58 ` [PATCH v3] " Paul E. McKenney
2018-07-10 20:24 ` Alan Stern
2018-07-10 20:31 ` Paul E. McKenney
2018-07-11 9:43 ` Will Deacon
2018-07-11 15:42 ` Paul E. McKenney
2018-07-11 16:17 ` Andrea Parri
2018-07-11 18:03 ` Paul E. McKenney
2018-07-11 16:34 ` Peter Zijlstra
2018-07-11 18:10 ` Paul E. McKenney
2018-07-10 9:38 ` [PATCH v2] " Andrea Parri
2018-07-10 14:48 ` Alan Stern
2018-07-10 15:24 ` Andrea Parri
2018-07-10 15:34 ` Alan Stern
2018-07-10 23:14 ` Andrea Parri [this message]
2018-07-11 9:43 ` Will Deacon
2018-07-11 12:34 ` Andrea Parri
2018-07-11 12:54 ` Andrea Parri
2018-07-11 15:57 ` Will Deacon
2018-07-11 16:28 ` Andrea Parri
2018-07-11 17:00 ` Peter Zijlstra
2018-07-11 17:50 ` Daniel Lustig
2018-07-12 8:34 ` Andrea Parri
2018-07-12 9:29 ` Peter Zijlstra
2018-07-12 7:40 ` Peter Zijlstra
2018-07-12 9:34 ` Peter Zijlstra
2018-07-12 9:45 ` Will Deacon
2018-07-13 2:17 ` Daniel Lustig
2018-07-12 11:52 ` Andrea Parri
2018-07-12 12:01 ` Andrea Parri
2018-07-12 12:11 ` Peter Zijlstra
2018-07-12 13:48 ` Peter Zijlstra
2018-07-12 16:19 ` Paul E. McKenney
2018-07-12 17:04 ` Alan Stern
2018-07-12 17:14 ` Will Deacon
2018-07-12 17:28 ` Paul E. McKenney
2018-07-12 18:05 ` Peter Zijlstra
2018-07-12 18:10 ` Linus Torvalds
2018-07-12 19:52 ` Andrea Parri
2018-07-12 20:24 ` Andrea Parri
2018-07-13 2:05 ` Daniel Lustig
2018-07-13 4:03 ` Paul E. McKenney
2018-07-13 9:07 ` Andrea Parri
2018-07-13 9:35 ` Will Deacon
2018-07-13 17:16 ` Linus Torvalds
2018-07-13 19:06 ` Andrea Parri
2018-07-14 1:51 ` Alan Stern
2018-07-14 2:58 ` Linus Torvalds
2018-07-16 2:31 ` Paul E. McKenney
2018-07-13 11:08 ` Peter Zijlstra
2018-07-13 13:15 ` Michael Ellerman
2018-07-13 16:42 ` Peter Zijlstra
2018-07-13 19:56 ` Andrea Parri
2018-07-16 14:40 ` Michael Ellerman
2018-07-16 19:01 ` Peter Zijlstra
2018-07-16 19:30 ` Linus Torvalds
2018-07-17 14:45 ` Michael Ellerman
2018-07-17 16:19 ` Linus Torvalds
2018-07-17 18:33 ` Paul E. McKenney
2018-07-17 18:42 ` Peter Zijlstra
2018-07-17 19:40 ` Paul E. McKenney
2018-07-17 19:47 ` Alan Stern
2018-07-17 18:44 ` Linus Torvalds
2018-07-17 18:49 ` Linus Torvalds
2018-07-17 19:42 ` Paul E. McKenney
2018-07-17 19:37 ` Alan Stern
2018-07-17 20:13 ` Linus Torvalds
2018-07-17 19:38 ` Paul E. McKenney
2018-07-17 19:40 ` Andrea Parri
2018-07-17 19:52 ` Paul E. McKenney
2018-07-18 12:31 ` Michael Ellerman
2018-07-18 13:16 ` Michael Ellerman
2018-07-12 17:52 ` Andrea Parri
2018-07-12 20:43 ` Alan Stern
2018-07-12 21:13 ` Andrea Parri
2018-07-12 21:23 ` Andrea Parri
2018-07-12 18:33 ` Peter Zijlstra
2018-07-12 17:45 ` Andrea Parri
2018-07-10 16:56 ` Daniel Lustig
[not found] ` <Pine.LNX.4.44L0.1807101315140.1449-100000@iolanthe.rowland.org>
2018-07-10 23:31 ` Andrea Parri
2018-07-11 14:19 ` Alan Stern
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