From: Marcel Ziswiler <marcel@ziswiler.com>
To: devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>,
Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Subject: [PATCH 05/15] ARM: tegra: apalis-tk1: regulator clean-up
Date: Tue, 24 Jul 2018 12:42:59 +0200 [thread overview]
Message-ID: <20180724104309.21741-6-marcel@ziswiler.com> (raw)
In-Reply-To: <20180724104309.21741-1-marcel@ziswiler.com>
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Just cosmetic regulator clean-up.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi | 100 ++++++++++++++--------------
arch/arm/boot/dts/tegra124-apalis.dtsi | 100 ++++++++++++++--------------
2 files changed, 100 insertions(+), 100 deletions(-)
diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
index fe74dd73a572..8323fddceed8 100644
--- a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
@@ -21,13 +21,13 @@
pcie@1003000 {
status = "okay";
- avddio-pex-supply = <&vdd_1v05>;
- avdd-pex-pll-supply = <&vdd_1v05>;
- avdd-pll-erefe-supply = <&avdd_1v05>;
- dvddio-pex-supply = <&vdd_1v05>;
- hvdd-pex-pll-e-supply = <®_3v3>;
- hvdd-pex-supply = <®_3v3>;
- vddio-pex-ctl-supply = <®_3v3>;
+ avddio-pex-supply = <®_1v05_vdd>;
+ avdd-pex-pll-supply = <®_1v05_vdd>;
+ avdd-pll-erefe-supply = <®_1v05_avdd>;
+ dvddio-pex-supply = <®_1v05_vdd>;
+ hvdd-pex-pll-e-supply = <®_module_3v3>;
+ hvdd-pex-supply = <®_module_3v3>;
+ vddio-pex-ctl-supply = <®_module_3v3>;
/* Apalis PCIe (additional lane Apalis type specific) */
pci@1,0 {
@@ -65,7 +65,7 @@
* Node left disabled on purpose - the bootloader will enable
* it after having set the VPR up
*/
- vdd-supply = <&vdd_gpu>;
+ vdd-supply = <®_vdd_gpu>;
};
pinmux: pinmux@70000868 {
@@ -1565,8 +1565,8 @@
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
- VDDA-supply = <®_3v3>;
- VDDIO-supply = <&vddio_1v8>;
+ VDDA-supply = <®_module_3v3>;
+ VDDIO-supply = <®_1v8_vddio>;
clocks = <&tegra_car TEGRA124_CLK_EXTERN1>;
};
@@ -1598,18 +1598,18 @@
};
regulators {
- vsup-sd2-supply = <®_3v3>;
- vsup-sd3-supply = <®_3v3>;
- vsup-sd4-supply = <®_3v3>;
- vsup-sd5-supply = <®_3v3>;
- vin-ldo0-supply = <&vddio_ddr_1v35>;
- vin-ldo1-6-supply = <®_3v3>;
- vin-ldo2-5-7-supply = <&vddio_1v8>;
- vin-ldo3-4-supply = <®_3v3>;
- vin-ldo9-10-supply = <®_3v3>;
- vin-ldo11-supply = <®_3v3>;
-
- vdd_cpu: sd0 {
+ vsup-sd2-supply = <®_module_3v3>;
+ vsup-sd3-supply = <®_module_3v3>;
+ vsup-sd4-supply = <®_module_3v3>;
+ vsup-sd5-supply = <®_module_3v3>;
+ vin-ldo0-supply = <®_1v35_vddio_ddr>;
+ vin-ldo1-6-supply = <®_module_3v3>;
+ vin-ldo2-5-7-supply = <®_1v8_vddio>;
+ vin-ldo3-4-supply = <®_module_3v3>;
+ vin-ldo9-10-supply = <®_module_3v3>;
+ vin-ldo11-supply = <®_module_3v3>;
+
+ reg_vdd_cpu: sd0 {
regulator-name = "+VDD_CPU_AP";
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1400000>;
@@ -1631,7 +1631,7 @@
ams,ext-control = <1>;
};
- vddio_ddr_1v35: sd2 {
+ reg_1v35_vddio_ddr: sd2 {
regulator-name =
"+V1.35_VDDIO_DDR(sd2)";
regulator-min-microvolt = <1350000>;
@@ -1649,13 +1649,13 @@
regulator-boot-on;
};
- vdd_1v05: sd4 {
+ reg_1v05_vdd: sd4 {
regulator-name = "+V1.05";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
};
- vddio_1v8: sd5 {
+ reg_1v8_vddio: sd5 {
regulator-name = "+V1.8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
@@ -1663,7 +1663,7 @@
regulator-always-on;
};
- vdd_gpu: sd6 {
+ reg_vdd_gpu: sd6 {
regulator-name = "+VDD_GPU_AP";
regulator-min-microvolt = <650000>;
regulator-max-microvolt = <1200000>;
@@ -1673,7 +1673,7 @@
regulator-always-on;
};
- avdd_1v05: ldo0 {
+ reg_1v05_avdd: ldo0 {
regulator-name = "+V1.05_AVDD";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
@@ -1785,9 +1785,9 @@
sata@70020000 {
phys = <&{/padctl@7009f000/pads/sata/lanes/sata-0}>;
phy-names = "sata-0";
- avdd-supply = <&vdd_1v05>;
- hvdd-supply = <®_3v3>;
- vddio-supply = <&vdd_1v05>;
+ avdd-supply = <®_1v05_vdd>;
+ hvdd-supply = <®_module_3v3>;
+ vddio-supply = <®_1v05_vdd>;
};
usb@70090000 {
@@ -1798,14 +1798,14 @@
<&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>,
<&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>;
phy-names = "usb2-0", "usb3-1", "usb2-1", "usb2-2", "usb3-0";
- avddio-pex-supply = <&vdd_1v05>;
- avdd-pll-erefe-supply = <&avdd_1v05>;
- avdd-pll-utmip-supply = <&vddio_1v8>;
- avdd-usb-ss-pll-supply = <&vdd_1v05>;
- avdd-usb-supply = <®_3v3>;
- dvddio-pex-supply = <&vdd_1v05>;
- hvdd-usb-ss-pll-e-supply = <®_3v3>;
- hvdd-usb-ss-supply = <®_3v3>;
+ avddio-pex-supply = <®_1v05_vdd>;
+ avdd-pll-erefe-supply = <®_1v05_avdd>;
+ avdd-pll-utmip-supply = <®_1v8_vddio>;
+ avdd-usb-ss-pll-supply = <®_1v05_vdd>;
+ avdd-usb-supply = <®_module_3v3>;
+ dvddio-pex-supply = <®_1v05_vdd>;
+ hvdd-usb-ss-pll-e-supply = <®_module_3v3>;
+ hvdd-usb-ss-supply = <®_module_3v3>;
};
padctl@7009f000 {
@@ -1921,7 +1921,7 @@
/* CPU DFLL clock */
clock@70110000 {
status = "okay";
- vdd-cpu-supply = <&vdd_cpu>;
+ vdd-cpu-supply = <®_vdd_cpu>;
nvidia,i2c-fs-rate = <400000>;
};
@@ -1946,7 +1946,7 @@
cpus {
cpu@0 {
- vdd-cpu-supply = <&vdd_cpu>;
+ vdd-cpu-supply = <®_vdd_cpu>;
};
};
@@ -1956,7 +1956,7 @@
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
- vin-supply = <&vdd_1v05>;
+ vin-supply = <®_1v05_vdd>;
};
reg_3v3_mxm: regulator-3v3-mxm {
@@ -1968,7 +1968,15 @@
regulator-boot-on;
};
- reg_3v3: regulator-3v3 {
+ reg_3v3_avdd_hdmi: regulator-3v3-avdd-hdmi {
+ compatible = "regulator-fixed";
+ regulator-name = "+V3.3_AVDD_HDMI";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <®_1v05_vdd>;
+ };
+
+ reg_module_3v3: regulator-module-3v3 {
compatible = "regulator-fixed";
regulator-name = "+V3.3";
regulator-min-microvolt = <3300000>;
@@ -1981,14 +1989,6 @@
vin-supply = <®_3v3_mxm>;
};
- reg_3v3_avdd_hdmi: regulator-3v3-avdd-hdmi {
- compatible = "regulator-fixed";
- regulator-name = "+V3.3_AVDD_HDMI";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vdd_1v05>;
- };
-
sound {
compatible = "toradex,tegra-audio-sgtl5000-apalis_tk1",
"nvidia,tegra-audio-sgtl5000";
diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi b/arch/arm/boot/dts/tegra124-apalis.dtsi
index 3fc41e25b5e8..4ad14c7a64db 100644
--- a/arch/arm/boot/dts/tegra124-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis.dtsi
@@ -56,13 +56,13 @@
pcie@1003000 {
status = "okay";
- avddio-pex-supply = <&vdd_1v05>;
- avdd-pex-pll-supply = <&vdd_1v05>;
- avdd-pll-erefe-supply = <&avdd_1v05>;
- dvddio-pex-supply = <&vdd_1v05>;
- hvdd-pex-pll-e-supply = <®_3v3>;
- hvdd-pex-supply = <®_3v3>;
- vddio-pex-ctl-supply = <®_3v3>;
+ avddio-pex-supply = <®_1v05_vdd>;
+ avdd-pex-pll-supply = <®_1v05_vdd>;
+ avdd-pll-erefe-supply = <®_1v05_avdd>;
+ dvddio-pex-supply = <®_1v05_vdd>;
+ hvdd-pex-pll-e-supply = <®_module_3v3>;
+ hvdd-pex-supply = <®_module_3v3>;
+ vddio-pex-ctl-supply = <®_module_3v3>;
/* Apalis PCIe (additional lane Apalis type specific) */
pci@1,0 {
@@ -100,7 +100,7 @@
* Node left disabled on purpose - the bootloader will enable
* it after having set the VPR up
*/
- vdd-supply = <&vdd_gpu>;
+ vdd-supply = <®_vdd_gpu>;
};
pinmux: pinmux@70000868 {
@@ -1594,8 +1594,8 @@
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
- VDDA-supply = <®_3v3>;
- VDDIO-supply = <&vddio_1v8>;
+ VDDA-supply = <®_module_3v3>;
+ VDDIO-supply = <®_1v8_vddio>;
clocks = <&tegra_car TEGRA124_CLK_EXTERN1>;
};
@@ -1627,18 +1627,18 @@
};
regulators {
- vsup-sd2-supply = <®_3v3>;
- vsup-sd3-supply = <®_3v3>;
- vsup-sd4-supply = <®_3v3>;
- vsup-sd5-supply = <®_3v3>;
- vin-ldo0-supply = <&vddio_ddr_1v35>;
- vin-ldo1-6-supply = <®_3v3>;
- vin-ldo2-5-7-supply = <&vddio_1v8>;
- vin-ldo3-4-supply = <®_3v3>;
- vin-ldo9-10-supply = <®_3v3>;
- vin-ldo11-supply = <®_3v3>;
-
- vdd_cpu: sd0 {
+ vsup-sd2-supply = <®_module_3v3>;
+ vsup-sd3-supply = <®_module_3v3>;
+ vsup-sd4-supply = <®_module_3v3>;
+ vsup-sd5-supply = <®_module_3v3>;
+ vin-ldo0-supply = <®_1v35_vddio_ddr>;
+ vin-ldo1-6-supply = <®_module_3v3>;
+ vin-ldo2-5-7-supply = <®_1v8_vddio>;
+ vin-ldo3-4-supply = <®_module_3v3>;
+ vin-ldo9-10-supply = <®_module_3v3>;
+ vin-ldo11-supply = <®_module_3v3>;
+
+ reg_vdd_cpu: sd0 {
regulator-name = "+VDD_CPU_AP";
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1400000>;
@@ -1660,7 +1660,7 @@
ams,ext-control = <1>;
};
- vddio_ddr_1v35: sd2 {
+ reg_1v35_vddio_ddr: sd2 {
regulator-name =
"+V1.35_VDDIO_DDR(sd2)";
regulator-min-microvolt = <1350000>;
@@ -1678,13 +1678,13 @@
regulator-boot-on;
};
- vdd_1v05: sd4 {
+ reg_1v05_vdd: sd4 {
regulator-name = "+V1.05";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
};
- vddio_1v8: sd5 {
+ reg_1v8_vddio: sd5 {
regulator-name = "+V1.8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
@@ -1692,7 +1692,7 @@
regulator-always-on;
};
- vdd_gpu: sd6 {
+ reg_vdd_gpu: sd6 {
regulator-name = "+VDD_GPU_AP";
regulator-min-microvolt = <650000>;
regulator-max-microvolt = <1200000>;
@@ -1702,7 +1702,7 @@
regulator-always-on;
};
- avdd_1v05: ldo0 {
+ reg_1v05_avdd: ldo0 {
regulator-name = "+V1.05_AVDD";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
@@ -1814,9 +1814,9 @@
sata@70020000 {
phys = <&{/padctl@7009f000/pads/sata/lanes/sata-0}>;
phy-names = "sata-0";
- avdd-supply = <&vdd_1v05>;
- hvdd-supply = <®_3v3>;
- vddio-supply = <&vdd_1v05>;
+ avdd-supply = <®_1v05_vdd>;
+ hvdd-supply = <®_module_3v3>;
+ vddio-supply = <®_1v05_vdd>;
};
usb@70090000 {
@@ -1827,14 +1827,14 @@
<&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>,
<&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>;
phy-names = "usb2-0", "usb3-1", "usb2-1", "usb2-2", "usb3-0";
- avddio-pex-supply = <&vdd_1v05>;
- avdd-pll-erefe-supply = <&avdd_1v05>;
- avdd-pll-utmip-supply = <&vddio_1v8>;
- avdd-usb-ss-pll-supply = <&vdd_1v05>;
- avdd-usb-supply = <®_3v3>;
- dvddio-pex-supply = <&vdd_1v05>;
- hvdd-usb-ss-pll-e-supply = <®_3v3>;
- hvdd-usb-ss-supply = <®_3v3>;
+ avddio-pex-supply = <®_1v05_vdd>;
+ avdd-pll-erefe-supply = <®_1v05_avdd>;
+ avdd-pll-utmip-supply = <®_1v8_vddio>;
+ avdd-usb-ss-pll-supply = <®_1v05_vdd>;
+ avdd-usb-supply = <®_module_3v3>;
+ dvddio-pex-supply = <®_1v05_vdd>;
+ hvdd-usb-ss-pll-e-supply = <®_module_3v3>;
+ hvdd-usb-ss-supply = <®_module_3v3>;
};
padctl@7009f000 {
@@ -1950,7 +1950,7 @@
/* CPU DFLL clock */
clock@70110000 {
status = "okay";
- vdd-cpu-supply = <&vdd_cpu>;
+ vdd-cpu-supply = <®_vdd_cpu>;
nvidia,i2c-fs-rate = <400000>;
};
@@ -1975,7 +1975,7 @@
cpus {
cpu@0 {
- vdd-cpu-supply = <&vdd_cpu>;
+ vdd-cpu-supply = <®_vdd_cpu>;
};
};
@@ -1985,7 +1985,7 @@
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
- vin-supply = <&vdd_1v05>;
+ vin-supply = <®_1v05_vdd>;
};
reg_3v3_mxm: regulator-3v3-mxm {
@@ -1997,7 +1997,15 @@
regulator-boot-on;
};
- reg_3v3: regulator-3v3 {
+ reg_3v3_avdd_hdmi: regulator-3v3-avdd-hdmi {
+ compatible = "regulator-fixed";
+ regulator-name = "+V3.3_AVDD_HDMI";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <®_1v05_vdd>;
+ };
+
+ reg_module_3v3: regulator-module-3v3 {
compatible = "regulator-fixed";
regulator-name = "+V3.3";
regulator-min-microvolt = <3300000>;
@@ -2010,14 +2018,6 @@
vin-supply = <®_3v3_mxm>;
};
- reg_3v3_avdd_hdmi: regulator-3v3-avdd-hdmi {
- compatible = "regulator-fixed";
- regulator-name = "+V3.3_AVDD_HDMI";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vdd_1v05>;
- };
-
sound {
compatible = "toradex,tegra-audio-sgtl5000-apalis_tk1",
"nvidia,tegra-audio-sgtl5000";
--
2.14.4
next prev parent reply other threads:[~2018-07-24 10:43 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-24 10:42 [PATCH 00/15] ARM: dts: tegra: apalis-tk1: major revamp Marcel Ziswiler
2018-07-24 10:42 ` [PATCH 01/15] ARM: tegra: apalis-tk1: add local-mac-address property Marcel Ziswiler
2018-07-24 10:42 ` [PATCH 02/15] ARM: tegra: apalis-tk1: reorder pcie properties Marcel Ziswiler
2018-07-26 7:19 ` Stefan Agner
2018-07-24 10:42 ` [PATCH 03/15] ARM: tegra: apalis-tk1: reorder host1x/hdmi properties Marcel Ziswiler
2018-07-24 10:42 ` [PATCH 04/15] ARM: tegra: apalis-tk1: reorder padctl properties Marcel Ziswiler
2018-07-24 10:42 ` Marcel Ziswiler [this message]
2018-07-24 10:43 ` [PATCH 06/15] ARM: tegra: apalis-tk1: add missing regulators Marcel Ziswiler
2018-07-24 10:43 ` [PATCH 07/15] ARM: tegra: apalis-tk1: drop unused pinmux label Marcel Ziswiler
2018-07-24 10:43 ` [PATCH 08/15] ARM: tegra: apalis-tk1: white-space clean-up Marcel Ziswiler
2018-07-24 10:43 ` [PATCH 09/15] ARM: tegra: apalis-tk1: reorder backlight properties Marcel Ziswiler
2018-07-24 10:43 ` [PATCH 10/15] ARM: tegra: apalis-tk1: add proper emmc vmmc and vqmmc supplies Marcel Ziswiler
2018-07-24 10:43 ` [PATCH 11/15] ARM: tegra: apalis-tk1: enable emmc ddr52 mode Marcel Ziswiler
2018-07-24 10:43 ` [PATCH 12/15] ARM: tegra: apalis-tk1: add toradex,apalis-tk1-v1.2 compatible Marcel Ziswiler
2018-07-31 21:45 ` Rob Herring
2018-07-24 10:43 ` [PATCH 13/15] ARM: tegra: apalis-tk1: fix pcie switch vendor compatible Marcel Ziswiler
2018-07-26 7:34 ` Stefan Agner
2018-07-24 10:43 ` [PATCH 14/15] ARM: tegra: apalis-tk1: reorder cpu dfll clock properties Marcel Ziswiler
2018-07-24 10:43 ` [PATCH 15/15] ARM: tegra: apalis-tk1: reorder SD card properties Marcel Ziswiler
2018-07-24 12:24 ` [PATCH 00/15] ARM: dts: tegra: apalis-tk1: major revamp Marcel Ziswiler
2018-07-24 12:44 ` Dmitry Osipenko
2018-07-24 14:16 ` Marcel Ziswiler
2018-07-24 14:31 ` Dmitry Osipenko
2018-07-24 14:45 ` Marcel Ziswiler
2018-07-24 14:48 ` Dmitry Osipenko
2018-07-24 15:47 ` Peter Geis
2018-07-24 17:03 ` Dmitry Osipenko
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