Re: [PATCH 2/3] dt-bindings: i3c: Document Synopsys DesignWare I3C master bindings

[Rob Herring <robh@kernel.org>]

On Fri, Jul 20, 2018 at 09:57:51PM +0100, Vitor soares wrote:
> This patch document Synopsys DesignWare I3C master DT bindings.
> 
> Signed-off-by: Vitor soares <soares@synopsys.com>
> ---
>  .../devicetree/bindings/i3c/snps,dw-i3c-master.txt | 43 ++++++++++++++++++++++
>  1 file changed, 43 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.txt
> 
> diff --git a/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.txt b/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.txt
> new file mode 100644
> index 0000000..7f5c8b0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.txt
> @@ -0,0 +1,43 @@
> +Bindings for Synopsys DesignWare I3C master block
> +=================================================
> +
> +Required properties:
> +--------------------
> +- compatible: shall be "snps,dw-i3c-master"

Only one version and no version number?

... and an SoC specific compatible string.

> +- clocks: shall reference the core_clk
> +- clock-names: shall contain "core_clk"

"_clk" is redundant and *-names with a single entry is kind of 
pointless.

> +- interrupts: the interrupt line connected to this I3C master
> +- reg:  Offset and length of I3C master registers
> +
> +Mandatory properties defined by the generic binding (see
> +Documentation/devicetree/bindings/i3c/i3c.txt for more details):
> +
> +- #address-cells: shall be set to 3
> +- #size-cells: shall be set to 0
> +
> +Optional properties defined by the generic binding (see
> +Documentation/devicetree/bindings/i3c/i3c.txt for more details):
> +
> +- i2c-scl-hz
> +- i3c-scl-hz
> +
> +I3C device connected on the bus follow the generic description (see
> +Documentation/devicetree/bindings/i3c/i3c.txt for more details).
> +
> +Example:
> +
> +	i3c-master@0x2000 {

Drop the '0x'

> +		compatible = "snps,dw-i3c-master";
> +		#address-cells = <3>;
> +		#size-cells = <0>;
> +		reg = <0x02000 0x1000>;
> +		interrupts = <0>;
> +		clocks = <&i3cclk>;
> +		clock-names = "core_clk";
> +
> +		eeprom@0x57{
> +			compatible = "atmel,24c01";
> +			reg = < 0x57 0x80000010 0x0>;
> +			pagesize = <0x8>;
> +		};
> +	};
> -- 
> 2.7.4
> 
>