From: Alexandre Belloni <alexandre.belloni@bootlin.com>
To: Mark Brown <broonie@kernel.org>, James Hogan <jhogan@kernel.org>
Cc: Paul Burton <paul.burton@mips.com>,
Andy Shevchenko <andy.shevchenko@gmail.com>,
linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-mips@linux-mips.org,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Allan Nielsen <allan.nielsen@microsemi.com>,
Alexandre Belloni <alexandre.belloni@bootlin.com>
Subject: [PATCH v3 4/5] mips: dts: mscc: Add spi on Ocelot
Date: Fri, 27 Jul 2018 21:53:57 +0200 [thread overview]
Message-ID: <20180727195358.23336-5-alexandre.belloni@bootlin.com> (raw)
In-Reply-To: <20180727195358.23336-1-alexandre.belloni@bootlin.com>
Add support for the SPI controller
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
---
arch/mips/boot/dts/mscc/ocelot.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/mips/boot/dts/mscc/ocelot.dtsi b/arch/mips/boot/dts/mscc/ocelot.dtsi
index 4f33dbc67348..f7616a476247 100644
--- a/arch/mips/boot/dts/mscc/ocelot.dtsi
+++ b/arch/mips/boot/dts/mscc/ocelot.dtsi
@@ -91,6 +91,17 @@
status = "disabled";
};
+ spi: spi@101000 {
+ compatible = "mscc,ocelot-spi", "snps,dw-apb-ssi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x101000 0x100>, <0x3c 0x18>;
+ interrupts = <9>;
+ clocks = <&ahb_clk>;
+
+ status = "disabled";
+ };
+
switch@1010000 {
compatible = "mscc,vsc7514-switch";
reg = <0x1010000 0x10000>,
--
2.18.0
next prev parent reply other threads:[~2018-07-27 19:55 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-27 19:53 [PATCH v3 0/5] Add support for MSCC Ocelot SPI Alexandre Belloni
2018-07-27 19:53 ` [PATCH v3 1/5] spi: dw: export dw_spi_set_cs Alexandre Belloni
2018-07-27 20:07 ` Andy Shevchenko
2018-07-30 11:05 ` Applied "spi: dw: export dw_spi_set_cs" to the spi tree Mark Brown
2018-07-27 19:53 ` [PATCH v3 2/5] dt-bindings: spi: snps,dw-apb-ssi: document Microsemi integration Alexandre Belloni
2018-07-30 10:13 ` Mark Brown
2018-07-27 19:53 ` [PATCH v3 3/5] spi: dw-mmio: add MSCC Ocelot support Alexandre Belloni
2018-07-27 20:14 ` Andy Shevchenko
2018-07-30 11:05 ` Applied "spi: dw-mmio: add MSCC Ocelot support" to the spi tree Mark Brown
2018-07-27 19:53 ` Alexandre Belloni [this message]
2018-07-27 19:53 ` [PATCH v3 5/5] mips: dts: mscc: enable spi and NOR flash support on ocelot PCB123 Alexandre Belloni
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20180727195358.23336-5-alexandre.belloni@bootlin.com \
--to=alexandre.belloni@bootlin.com \
--cc=allan.nielsen@microsemi.com \
--cc=andy.shevchenko@gmail.com \
--cc=broonie@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=jhogan@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mips@linux-mips.org \
--cc=linux-spi@vger.kernel.org \
--cc=paul.burton@mips.com \
--cc=thomas.petazzoni@bootlin.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).