From: Peter Zijlstra <peterz@infradead.org>
To: "Luck, Tony" <tony.luck@intel.com>
Cc: "Chatre, Reinette" <reinette.chatre@intel.com>,
"Hansen, Dave" <dave.hansen@intel.com>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"mingo@redhat.com" <mingo@redhat.com>,
"Yu, Fenghua" <fenghua.yu@intel.com>,
"vikas.shivappa@linux.intel.com" <vikas.shivappa@linux.intel.com>,
"Hindman, Gavin" <gavin.hindman@intel.com>,
"Joseph, Jithu" <jithu.joseph@intel.com>,
"hpa@zytor.com" <hpa@zytor.com>,
"x86@kernel.org" <x86@kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 0/2] x86/intel_rdt and perf/x86: Fix lack of coordination with perf
Date: Wed, 8 Aug 2018 18:47:22 +0200 [thread overview]
Message-ID: <20180808164722.GR2494@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <3908561D78D1C84285E8C5FCA982C28F7D3A1B83@ORSMSX110.amr.corp.intel.com>
On Wed, Aug 08, 2018 at 03:55:54PM +0000, Luck, Tony wrote:
> > So _why_ doesn't this work? As said by Tony, that first call should
> > prime the caches, so the second and third calls should not generate any
> > misses.
>
> How much code/data is involved? If there is a lot, then you may be unlucky
> with cache coloring and the later parts of the "prime the caches" code path
> may evict some lines loaded in the early parts.
Well, Reinette used perf_event_read_local() which is unfortunately quite
a bit. But the inline I proposed is a single load and depending on
rdpmcl() or native_read_pmc() a call to or just a single inline asm
rdpmc instruction.
That should certainly work I think.
next prev parent reply other threads:[~2018-08-08 16:47 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-31 19:38 [PATCH 0/2] x86/intel_rdt and perf/x86: Fix lack of coordination with perf Reinette Chatre
2018-07-31 19:38 ` [PATCH 1/2] perf/x86: Expose PMC hardware reservation Reinette Chatre
2018-07-31 19:38 ` [PATCH 2/2] x86/intel_rdt: Coordinate performance monitoring with perf Reinette Chatre
2018-08-02 12:39 ` [PATCH 0/2] x86/intel_rdt and perf/x86: Fix lack of coordination " Peter Zijlstra
2018-08-02 16:14 ` Reinette Chatre
2018-08-02 16:18 ` Peter Zijlstra
2018-08-02 16:44 ` Reinette Chatre
2018-08-02 17:37 ` Peter Zijlstra
2018-08-02 18:18 ` Dave Hansen
2018-08-02 19:54 ` Peter Zijlstra
2018-08-02 20:06 ` Dave Hansen
2018-08-02 20:13 ` Peter Zijlstra
2018-08-02 20:43 ` Reinette Chatre
2018-08-03 10:49 ` Peter Zijlstra
2018-08-03 15:18 ` Reinette Chatre
2018-08-03 15:25 ` Peter Zijlstra
2018-08-03 18:37 ` Reinette Chatre
2018-08-06 19:50 ` Reinette Chatre
2018-08-06 22:12 ` Peter Zijlstra
2018-08-06 23:07 ` Reinette Chatre
2018-08-07 9:36 ` Peter Zijlstra
[not found] ` <ace0bebb-91ab-5d40-e7d7-d72d48302fa8@intel.com>
2018-08-08 1:28 ` Luck, Tony
2018-08-08 5:44 ` Reinette Chatre
2018-08-08 7:41 ` Peter Zijlstra
2018-08-08 15:55 ` Luck, Tony
2018-08-08 16:47 ` Peter Zijlstra [this message]
2018-08-08 16:51 ` Reinette Chatre
2018-08-08 7:51 ` Peter Zijlstra
2018-08-08 17:33 ` Reinette Chatre
2018-08-10 16:25 ` Reinette Chatre
2018-08-10 17:52 ` Reinette Chatre
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