On Thu, Aug 09, 2018 at 11:03:55AM -0700, Doug Anderson wrote: > On Fri, Aug 3, 2018 at 5:18 AM, wrote: > > Also, spi core framework will set the transfer speed to controller max > > frequency > > if transfer frequency is greater than controller max frequency. > > Please mention if you have a other opinion. > 1. It sure seems like the clock framework could be enforcing the max > speed here. SPI can just ask for the speed and the clock framework > will pick the highest speed it can if you ask for one too high. Isn't > that the whole point of the "struct freq_tbl" in the clock driver? This is more about matching the data rate between the two drivers - the clock framework could (and possibly should) reasonably return an error here, we're trying to ensure that drivers and controllers work well together here. > 2. The device tree writer already provides a max clock speed for each > SPI slave in the device tree. ...shouldn't the device tree writer > already be taking into account the max of the SPI port when setting > this value? Yes. We're overriding this because drivers can set a speed from code (this is especially common when devices have variable maximum speeds for different operations). > 3. If you really truly need code in the SPI driver then make sure you > include a compatible string for the SoC and have a table in the driver > that's found with of_device_get_match_data(). AKA: > compatible = "qcom,geni-spi-sdm845", "qcom,geni-spi"; A controller driver really shouldn't need to be open coding anything.