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From: Vinod <vkoul@kernel.org>
To: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Cc: dan.j.williams@intel.com, michal.simek@xilinx.com,
	appana.durga.rao@xilinx.com, lars@metafoo.de,
	dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/3] dmaengine: xilinx_dma: Refactor axidma channel validation
Date: Tue, 21 Aug 2018 21:20:24 +0530	[thread overview]
Message-ID: <20180821155024.GH2388@vkoul-mobl> (raw)
In-Reply-To: <1532688639-32230-3-git-send-email-radhey.shyam.pandey@xilinx.com>

On 27-07-18, 16:20, Radhey Shyam Pandey wrote:
> In axidma start_transfer, prefer checking channel states before
> other params i.e pending_list.

and what that preference be?

> 
> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
> ---
>  drivers/dma/xilinx/xilinx_dma.c |    4 ++--
>  1 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
> index 06d1632..a37871e 100644
> --- a/drivers/dma/xilinx/xilinx_dma.c
> +++ b/drivers/dma/xilinx/xilinx_dma.c
> @@ -1271,10 +1271,10 @@ static void xilinx_dma_start_transfer(struct xilinx_dma_chan *chan)
>  	if (chan->err)
>  		return;
>  
> -	if (list_empty(&chan->pending_list))
> +	if (!chan->idle)
>  		return;
>  
> -	if (!chan->idle)
> +	if (list_empty(&chan->pending_list))
>  		return;
>  
>  	head_desc = list_first_entry(&chan->pending_list,
> -- 
> 1.7.1
> 
> --
> To unsubscribe from this list: send the line "unsubscribe dmaengine" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

-- 
~Vinod

  reply	other threads:[~2018-08-21 15:50 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-27 10:50 [PATCH 0/3] dmaengine: xilinx_dma: Minor fix and refactoring Radhey Shyam Pandey
2018-07-27 10:50 ` [PATCH 1/3] dmaengine: xilinx_dma: Refactor axidma channel allocation Radhey Shyam Pandey
2018-08-21  7:31   ` Appana Durga Kedareswara Rao
2018-07-27 10:50 ` [PATCH 2/3] dmaengine: xilinx_dma: Refactor axidma channel validation Radhey Shyam Pandey
2018-08-21 15:50   ` Vinod [this message]
2018-08-28 13:03     ` Radhey Shyam Pandey
2018-07-27 10:50 ` [PATCH 3/3] dmaengine: xilinx_dma: Fix 64-bit simple CDMA transfer Radhey Shyam Pandey
2018-08-21 15:55   ` Vinod
2018-08-28 14:03     ` Radhey Shyam Pandey
2018-08-29  4:01       ` Vinod
2018-08-29 17:05         ` Radhey Shyam Pandey
2018-09-07 12:08           ` Radhey Shyam Pandey
2018-09-11  7:41             ` Vinod
2018-09-11  9:31               ` Radhey Shyam Pandey

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