linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
* [PATCH] usb: dwc2: Fix call location of dwc2_check_core_endianness
@ 2018-08-27 21:36 Bruno Meirelles Herrera
  2018-09-01 22:43 ` Martin Blumenstingl
  2018-09-03  8:09 ` Minas Harutyunyan
  0 siblings, 2 replies; 3+ messages in thread
From: Bruno Meirelles Herrera @ 2018-08-27 21:36 UTC (permalink / raw)
  To: Minas Harutyunyan, Greg Kroah-Hartman, linux-usb, linux-kernel
  Cc: John.Youn, alexandre.torgue, Bruno Meirelles Herrera

Some SoC/IP as STM32F469, the snpsid can only be read after clock is
enabled, otherwise it will read as 0, and the dwc2_check_core_endianness
will assume the core and AHB have opposite endianness, leading to the
following error:

[    1.976339] dwc2 50000000.usb: 50000000.usb supply vusb_d not found, using dummy regulator
[    1.986124] dwc2 50000000.usb: Linked as a consumer to regulator.0
[    1.992711] dwc2 50000000.usb: 50000000.usb supply vusb_a not found, using dummy regulator
[    2.003672] dwc2 50000000.usb: dwc2_core_reset: HANG! AHB Idle timeout GRSTCTL GRSTCTL_AHBIDLE
[    2.015176] dwc2: probe of 50000000.usb failed with error -16

The proposed patch changes the location where dwc2_check_core_endianness
is called, allowing the clock peripheral to be enabled first.

Signed-off-by: Bruno Meirelles Herrera <bmh@certi.org.br>
---
 drivers/usb/dwc2/platform.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
index 9a53a58e676e..577642895b57 100644
--- a/drivers/usb/dwc2/platform.c
+++ b/drivers/usb/dwc2/platform.c
@@ -412,8 +412,6 @@ static int dwc2_driver_probe(struct platform_device *dev)
 	dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n",
 		(unsigned long)res->start, hsotg->regs);
 
-	hsotg->needs_byte_swap = dwc2_check_core_endianness(hsotg);
-
 	retval = dwc2_lowlevel_hw_init(hsotg);
 	if (retval)
 		return retval;
@@ -438,6 +436,8 @@ static int dwc2_driver_probe(struct platform_device *dev)
 	if (retval)
 		return retval;
 
+	hsotg->needs_byte_swap = dwc2_check_core_endianness(hsotg);
+
 	retval = dwc2_get_dr_mode(hsotg);
 	if (retval)
 		goto error;
-- 
2.15.2 (Apple Git-101.1)


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* [PATCH] usb: dwc2: Fix call location of dwc2_check_core_endianness
  2018-08-27 21:36 [PATCH] usb: dwc2: Fix call location of dwc2_check_core_endianness Bruno Meirelles Herrera
@ 2018-09-01 22:43 ` Martin Blumenstingl
  2018-09-03  8:09 ` Minas Harutyunyan
  1 sibling, 0 replies; 3+ messages in thread
From: Martin Blumenstingl @ 2018-09-01 22:43 UTC (permalink / raw)
  To: bmh; +Cc: John.Youn, alexandre.torgue, gregkh, hminas, linux-kernel, linux-usb

> Some SoC/IP as STM32F469, the snpsid can only be read after clock is
> enabled, otherwise it will read as 0, and the dwc2_check_core_endianness
> will assume the core and AHB have opposite endianness, leading to the
> following error:
> 
> [    1.976339] dwc2 50000000.usb: 50000000.usb supply vusb_d not found, using dummy regulator
> [    1.986124] dwc2 50000000.usb: Linked as a consumer to regulator.0
> [    1.992711] dwc2 50000000.usb: 50000000.usb supply vusb_a not found, using dummy regulator
> [    2.003672] dwc2 50000000.usb: dwc2_core_reset: HANG! AHB Idle timeout GRSTCTL GRSTCTL_AHBIDLE
> [    2.015176] dwc2: probe of 50000000.usb failed with error -16
> 
> The proposed patch changes the location where dwc2_check_core_endianness
> is called, allowing the clock peripheral to be enabled first.
> 
> Signed-off-by: Bruno Meirelles Herrera <bmh@certi.org.br>
Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

This fixes the same error on my Odroid-C1 (Meson8b SoC).
Thank you for spotting and fixing this!


Regards
Martin

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] usb: dwc2: Fix call location of dwc2_check_core_endianness
  2018-08-27 21:36 [PATCH] usb: dwc2: Fix call location of dwc2_check_core_endianness Bruno Meirelles Herrera
  2018-09-01 22:43 ` Martin Blumenstingl
@ 2018-09-03  8:09 ` Minas Harutyunyan
  1 sibling, 0 replies; 3+ messages in thread
From: Minas Harutyunyan @ 2018-09-03  8:09 UTC (permalink / raw)
  To: Bruno Meirelles Herrera, Minas Harutyunyan, Greg Kroah-Hartman,
	linux-usb, linux-kernel
  Cc: John.Youn, alexandre.torgue

On 8/28/2018 1:37 AM, Bruno Meirelles Herrera wrote:
> Some SoC/IP as STM32F469, the snpsid can only be read after clock is
> enabled, otherwise it will read as 0, and the dwc2_check_core_endianness
> will assume the core and AHB have opposite endianness, leading to the
> following error:
> 
> [    1.976339] dwc2 50000000.usb: 50000000.usb supply vusb_d not found, using dummy regulator
> [    1.986124] dwc2 50000000.usb: Linked as a consumer to regulator.0
> [    1.992711] dwc2 50000000.usb: 50000000.usb supply vusb_a not found, using dummy regulator
> [    2.003672] dwc2 50000000.usb: dwc2_core_reset: HANG! AHB Idle timeout GRSTCTL GRSTCTL_AHBIDLE
> [    2.015176] dwc2: probe of 50000000.usb failed with error -16
> 
> The proposed patch changes the location where dwc2_check_core_endianness
> is called, allowing the clock peripheral to be enabled first.
> 
> Signed-off-by: Bruno Meirelles Herrera <bmh@certi.org.br>

Acked-by: Minas Harutyunyan <hminas@synopsys.com>

> ---
>   drivers/usb/dwc2/platform.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
> index 9a53a58e676e..577642895b57 100644
> --- a/drivers/usb/dwc2/platform.c
> +++ b/drivers/usb/dwc2/platform.c
> @@ -412,8 +412,6 @@ static int dwc2_driver_probe(struct platform_device *dev)
>   	dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n",
>   		(unsigned long)res->start, hsotg->regs);
>   
> -	hsotg->needs_byte_swap = dwc2_check_core_endianness(hsotg);
> -
>   	retval = dwc2_lowlevel_hw_init(hsotg);
>   	if (retval)
>   		return retval;
> @@ -438,6 +436,8 @@ static int dwc2_driver_probe(struct platform_device *dev)
>   	if (retval)
>   		return retval;
>   
> +	hsotg->needs_byte_swap = dwc2_check_core_endianness(hsotg);
> +
>   	retval = dwc2_get_dr_mode(hsotg);
>   	if (retval)
>   		goto error;
> 


^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2018-09-03  8:10 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-08-27 21:36 [PATCH] usb: dwc2: Fix call location of dwc2_check_core_endianness Bruno Meirelles Herrera
2018-09-01 22:43 ` Martin Blumenstingl
2018-09-03  8:09 ` Minas Harutyunyan

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).