From: Nicholas Piggin <npiggin@gmail.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will.deacon@arm.com>,
Linus Torvalds <torvalds@linux-foundation.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Benjamin Herrenschmidt <benh@au1.ibm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
"Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
Subject: Re: [PATCH 00/12] Avoid synchronous TLB invalidation for intermediate page-table entries on arm64
Date: Fri, 31 Aug 2018 20:32:34 +1000 [thread overview]
Message-ID: <20180831203234.7b8f4d13@roar.ozlabs.ibm.com> (raw)
In-Reply-To: <20180831101014.GG24124@hirez.programming.kicks-ass.net>
On Fri, 31 Aug 2018 12:10:14 +0200
Peter Zijlstra <peterz@infradead.org> wrote:
> On Fri, Aug 31, 2018 at 10:54:18AM +0100, Will Deacon wrote:
>
> > Proposal below (omitted Linus because that seems to be the pattern elsewhere
> > in the file and he's not going to shout at himself when things break :)
> > Anybody I've missed?
> >
> > Will
> >
> > --->8
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index a5b256b25905..7224b5618883 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -9681,6 +9681,15 @@ S: Maintained
> > F: arch/arm/boot/dts/mmp*
> > F: arch/arm/mach-mmp/
> >
> > +MMU GATHER AND TLB INVALIDATION
> > +M: Will Deacon <will.deacon@arm.com>
> > +M: Nick Piggin <npiggin@gmail.com>
Oh gee, I suppose. powerpc hash is kind of interesting because it's
crazy, Aneesh knows that code a lot better than I do. radix modulo
some minor details of exact instructions is fairly like x86 (he
wrote a lot of that code too AFAIK).
> > +M: Peter Zijlstra <peterz@infradead.org>
> > +L: linux-arch@vger.kernel.org
Maybe put linux-mm as well? Or should there just be one list?
> > +S: Maintained
> > +F: include/asm-generic/tlb.h
> > +F: arch/*/include/asm/tlb.h
> > +
> > MN88472 MEDIA DRIVER
> > M: Antti Palosaari <crope@iki.fi>
> > L: linux-media@vger.kernel.org
>
> If we're going to do that (and I'm not opposed); it might make sense to
> do something like the below and add:
>
> F: mm/mmu_gather.c
I think that is a good idea regardless. How do feel about calling it
tlb.c? Easier to type and autocompletes sooner.
>
> ---
> b/mm/mmu_gather.c | 250 ++++++++++++++++++++++++++++++++++++++++++++++
> include/asm-generic/tlb.h | 2
> mm/Makefile | 2
> mm/memory.c | 247 ---------------------------------------------
next prev parent reply other threads:[~2018-08-31 10:32 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-30 16:15 [PATCH 00/12] Avoid synchronous TLB invalidation for intermediate page-table entries on arm64 Will Deacon
2018-08-30 16:15 ` [PATCH 01/12] arm64: tlb: Use last-level invalidation in flush_tlb_kernel_range() Will Deacon
2018-08-30 16:15 ` [PATCH 02/12] arm64: tlb: Add DSB ISHST prior to TLBI in __flush_tlb_[kernel_]pgtable() Will Deacon
2018-08-30 16:15 ` [PATCH 03/12] arm64: pgtable: Implement p[mu]d_valid() and check in set_p[mu]d() Will Deacon
2018-08-30 16:15 ` [PATCH 04/12] arm64: tlb: Justify non-leaf invalidation in flush_tlb_range() Will Deacon
2018-08-30 16:15 ` [PATCH 05/12] arm64: tlbflush: Allow stride to be specified for __flush_tlb_range() Will Deacon
2018-08-30 16:15 ` [PATCH 06/12] arm64: tlb: Remove redundant !CONFIG_HAVE_RCU_TABLE_FREE code Will Deacon
2018-08-30 16:15 ` [PATCH 07/12] asm-generic/tlb: Guard with #ifdef CONFIG_MMU Will Deacon
2018-08-30 16:15 ` [PATCH 08/12] asm-generic/tlb: Track freeing of page-table directories in struct mmu_gather Will Deacon
2018-08-30 16:15 ` [PATCH 09/12] asm-generic/tlb: Track which levels of the page tables have been cleared Will Deacon
2018-08-31 1:23 ` Nicholas Piggin
2018-08-30 16:15 ` [PATCH 10/12] arm64: tlb: Adjust stride and type of TLBI according to mmu_gather Will Deacon
2018-08-30 16:15 ` [PATCH 11/12] arm64: tlb: Avoid synchronous TLBIs when freeing page tables Will Deacon
2018-08-30 16:15 ` [PATCH 12/12] arm64: tlb: Rewrite stale comment in asm/tlbflush.h Will Deacon
2018-08-30 16:39 ` [PATCH 00/12] Avoid synchronous TLB invalidation for intermediate page-table entries on arm64 Linus Torvalds
2018-08-31 1:00 ` Nicholas Piggin
2018-08-31 1:04 ` Linus Torvalds
2018-08-31 9:54 ` Will Deacon
2018-08-31 10:10 ` Peter Zijlstra
2018-08-31 10:32 ` Nicholas Piggin [this message]
2018-08-31 10:49 ` Peter Zijlstra
2018-08-31 11:12 ` Will Deacon
2018-08-31 11:20 ` Peter Zijlstra
2018-08-31 11:50 ` Nicholas Piggin
2018-09-03 12:52 ` Will Deacon
2018-08-30 17:11 ` Peter Zijlstra
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