From: Jernej Skrabec <jernej.skrabec@siol.net>
To: robh+dt@kernel.org, maxime.ripard@bootlin.com, wens@csie.org
Cc: mark.rutland@arm.com, mturquette@baylibre.com, sboyd@kernel.org,
airlied@linux.ie, architt@codeaurora.org, a.hajda@samsung.com,
jernej.skrabec@siol.net, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
dri-devel@lists.freedesktop.org, linux-sunxi@googlegroups.com,
Icenowy Zheng <icenowy@aosc.io>
Subject: [PATCH 08/27] clk: sunxi-ng: Add support for H6 DE3 clocks
Date: Sun, 2 Sep 2018 09:26:24 +0200 [thread overview]
Message-ID: <20180902072643.4917-9-jernej.skrabec@siol.net> (raw)
In-Reply-To: <20180902072643.4917-1-jernej.skrabec@siol.net>
Support for mixer0, mixer1, writeback and rotation units is added.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 65 ++++++++++++++++++++++++++++
drivers/clk/sunxi-ng/ccu-sun8i-de2.h | 1 +
2 files changed, 66 insertions(+)
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
index bae5ee67a797..4535c1c27d27 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
@@ -31,6 +31,8 @@ static SUNXI_CCU_GATE(bus_mixer1_clk, "bus-mixer1", "bus-de",
0x04, BIT(1), 0);
static SUNXI_CCU_GATE(bus_wb_clk, "bus-wb", "bus-de",
0x04, BIT(2), 0);
+static SUNXI_CCU_GATE(bus_rot_clk, "bus-rot", "bus-de",
+ 0x04, BIT(3), 0);
static SUNXI_CCU_GATE(mixer0_clk, "mixer0", "mixer0-div",
0x00, BIT(0), CLK_SET_RATE_PARENT);
@@ -38,6 +40,8 @@ static SUNXI_CCU_GATE(mixer1_clk, "mixer1", "mixer1-div",
0x00, BIT(1), CLK_SET_RATE_PARENT);
static SUNXI_CCU_GATE(wb_clk, "wb", "wb-div",
0x00, BIT(2), CLK_SET_RATE_PARENT);
+static SUNXI_CCU_GATE(rot_clk, "rot", "rot-div",
+ 0x00, BIT(3), CLK_SET_RATE_PARENT);
static SUNXI_CCU_M(mixer0_div_clk, "mixer0-div", "de", 0x0c, 0, 4,
CLK_SET_RATE_PARENT);
@@ -45,6 +49,8 @@ static SUNXI_CCU_M(mixer1_div_clk, "mixer1-div", "de", 0x0c, 4, 4,
CLK_SET_RATE_PARENT);
static SUNXI_CCU_M(wb_div_clk, "wb-div", "de", 0x0c, 8, 4,
CLK_SET_RATE_PARENT);
+static SUNXI_CCU_M(rot_div_clk, "rot-div", "de", 0x0c, 0x0c, 4,
+ CLK_SET_RATE_PARENT);
static SUNXI_CCU_M(mixer0_div_a83_clk, "mixer0-div", "pll-de", 0x0c, 0, 4,
CLK_SET_RATE_PARENT);
@@ -53,6 +59,24 @@ static SUNXI_CCU_M(mixer1_div_a83_clk, "mixer1-div", "pll-de", 0x0c, 4, 4,
static SUNXI_CCU_M(wb_div_a83_clk, "wb-div", "pll-de", 0x0c, 8, 4,
CLK_SET_RATE_PARENT);
+static struct ccu_common *sun50i_h6_de3_clks[] = {
+ &mixer0_clk.common,
+ &mixer1_clk.common,
+ &wb_clk.common,
+
+ &bus_mixer0_clk.common,
+ &bus_mixer1_clk.common,
+ &bus_wb_clk.common,
+
+ &mixer0_div_clk.common,
+ &mixer1_div_clk.common,
+ &wb_div_clk.common,
+
+ &bus_rot_clk.common,
+ &rot_clk.common,
+ &rot_div_clk.common,
+};
+
static struct ccu_common *sun8i_a83t_de2_clks[] = {
&mixer0_clk.common,
&mixer1_clk.common,
@@ -92,6 +116,26 @@ static struct ccu_common *sun8i_v3s_de2_clks[] = {
&wb_div_clk.common,
};
+static struct clk_hw_onecell_data sun50i_h6_de3_hw_clks = {
+ .hws = {
+ [CLK_MIXER0] = &mixer0_clk.common.hw,
+ [CLK_MIXER1] = &mixer1_clk.common.hw,
+ [CLK_WB] = &wb_clk.common.hw,
+ [CLK_ROT] = &rot_clk.common.hw,
+
+ [CLK_BUS_MIXER0] = &bus_mixer0_clk.common.hw,
+ [CLK_BUS_MIXER1] = &bus_mixer1_clk.common.hw,
+ [CLK_BUS_WB] = &bus_wb_clk.common.hw,
+ [CLK_BUS_ROT] = &bus_rot_clk.common.hw,
+
+ [CLK_MIXER0_DIV] = &mixer0_div_clk.common.hw,
+ [CLK_MIXER1_DIV] = &mixer1_div_clk.common.hw,
+ [CLK_WB_DIV] = &wb_div_clk.common.hw,
+ [CLK_ROT_DIV] = &rot_div_clk.common.hw,
+ },
+ .num = 12,
+};
+
static struct clk_hw_onecell_data sun8i_a83t_de2_hw_clks = {
.hws = {
[CLK_MIXER0] = &mixer0_clk.common.hw,
@@ -156,6 +200,13 @@ static struct ccu_reset_map sun50i_a64_de2_resets[] = {
[RST_WB] = { 0x08, BIT(2) },
};
+static struct ccu_reset_map sun50i_h6_de3_resets[] = {
+ [RST_MIXER0] = { 0x08, BIT(0) },
+ [RST_MIXER1] = { 0x08, BIT(1) },
+ [RST_WB] = { 0x08, BIT(2) },
+ [RST_ROT] = { 0x08, BIT(3) },
+};
+
static const struct sunxi_ccu_desc sun8i_a83t_de2_clk_desc = {
.ccu_clks = sun8i_a83t_de2_clks,
.num_ccu_clks = ARRAY_SIZE(sun8i_a83t_de2_clks),
@@ -186,6 +237,16 @@ static const struct sunxi_ccu_desc sun50i_a64_de2_clk_desc = {
.num_resets = ARRAY_SIZE(sun50i_a64_de2_resets),
};
+static const struct sunxi_ccu_desc sun50i_h6_de3_clk_desc = {
+ .ccu_clks = sun50i_h6_de3_clks,
+ .num_ccu_clks = ARRAY_SIZE(sun50i_h6_de3_clks),
+
+ .hw_clks = &sun50i_h6_de3_hw_clks,
+
+ .resets = sun50i_h6_de3_resets,
+ .num_resets = ARRAY_SIZE(sun50i_h6_de3_resets),
+};
+
static const struct sunxi_ccu_desc sun8i_v3s_de2_clk_desc = {
.ccu_clks = sun8i_v3s_de2_clks,
.num_ccu_clks = ARRAY_SIZE(sun8i_v3s_de2_clks),
@@ -296,6 +357,10 @@ static const struct of_device_id sunxi_de2_clk_ids[] = {
.compatible = "allwinner,sun50i-h5-de2-clk",
.data = &sun50i_a64_de2_clk_desc,
},
+ {
+ .compatible = "allwinner,sun50i-h6-de3-clk",
+ .data = &sun50i_h6_de3_clk_desc,
+ },
{ }
};
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.h b/drivers/clk/sunxi-ng/ccu-sun8i-de2.h
index 530c006e0ae9..27bd88539f42 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-de2.h
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-de2.h
@@ -22,6 +22,7 @@
#define CLK_MIXER0_DIV 3
#define CLK_MIXER1_DIV 4
#define CLK_WB_DIV 5
+#define CLK_ROT_DIV 11
#define CLK_NUMBER (CLK_WB + 1)
--
2.18.0
next prev parent reply other threads:[~2018-09-02 7:27 UTC|newest]
Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-02 7:26 [PATCH 00/27] Allwinner H6 DE3 and HDMI support Jernej Skrabec
2018-09-02 7:26 ` [PATCH 01/27] dt-bindings: sunxi-sram: add binding for Allwinner H6 SRAM C Jernej Skrabec
2018-09-04 8:39 ` Chen-Yu Tsai
2018-09-02 7:26 ` [PATCH 02/27] arm64: allwinner: h6: add system controller device tree node Jernej Skrabec
2018-09-04 8:40 ` Chen-Yu Tsai
2018-09-04 8:44 ` [linux-sunxi] " Icenowy Zheng
2018-09-12 14:49 ` Chen-Yu Tsai
2018-09-12 15:37 ` Icenowy Zheng
2018-09-02 7:26 ` [PATCH 03/27] dt-bindings: bus: add H6 DE3 bus binding Jernej Skrabec
2018-09-02 7:26 ` [PATCH 04/27] clk: sunxi-ng: Adjust MP clock parent rate when allowed Jernej Skrabec
2018-09-02 7:26 ` [PATCH 05/27] clk: sunxi-ng: Use u64 for calculation of NM rate Jernej Skrabec
2018-09-04 9:18 ` Chen-Yu Tsai
2018-09-04 18:06 ` Jernej Škrabec
2018-09-02 7:26 ` [PATCH 06/27] clk: sunxi-ng: h6: Set video PLLs limits Jernej Skrabec
2018-09-04 15:49 ` kbuild test robot
2018-09-04 15:49 ` kbuild test robot
2018-09-02 7:26 ` [PATCH 07/27] dt-bindings: clock: sun8i-de2: Add H6 DE3 clock description Jernej Skrabec
2018-09-04 8:59 ` Chen-Yu Tsai
2018-09-04 9:05 ` Chen-Yu Tsai
2018-09-02 7:26 ` Jernej Skrabec [this message]
2018-09-04 9:04 ` [PATCH 08/27] clk: sunxi-ng: Add support for H6 DE3 clocks Chen-Yu Tsai
2018-09-04 17:45 ` Jernej Škrabec
2018-09-12 12:20 ` Chen-Yu Tsai
2018-09-12 14:55 ` Jernej Škrabec
2018-09-12 16:16 ` [linux-sunxi] " Chen-Yu Tsai
2018-09-02 7:26 ` [PATCH 09/27] dt-bindings: display: sun4i-drm: Add H6 display engine compatibles Jernej Skrabec
[not found] ` <5b9f3f4d.1c69fb81.c776b.ee42@mx.google.com>
2018-09-22 13:32 ` Chen-Yu Tsai
2018-09-02 7:26 ` [PATCH 10/27] drm/sun4i: Add compatible for H6 display engine Jernej Skrabec
2018-09-03 12:18 ` Maxime Ripard
2018-09-02 7:26 ` [PATCH 11/27] drm/sun4i: Rework DE2 register defines Jernej Skrabec
2018-09-22 12:32 ` [linux-sunxi] " Chen-Yu Tsai
2018-09-23 20:02 ` Jernej Škrabec
2018-09-24 2:01 ` Chen-Yu Tsai
2018-09-02 7:26 ` [PATCH 12/27] drm/sun4i: Add basic support for DE3 Jernej Skrabec
2018-09-22 13:19 ` Chen-Yu Tsai
2018-09-23 19:51 ` Jernej Škrabec
2018-09-24 2:04 ` Chen-Yu Tsai
2018-10-05 17:51 ` Jernej Škrabec
2018-10-06 15:34 ` [linux-sunxi] " Chen-Yu Tsai
2018-09-02 7:26 ` [PATCH 13/27] drm/sun4i: Add support for H6 DE3 mixer 0 Jernej Skrabec
2018-09-22 13:23 ` Chen-Yu Tsai
2018-09-22 13:47 ` Chen-Yu Tsai
2018-09-23 19:40 ` [linux-sunxi] " Jernej Škrabec
2018-09-24 1:59 ` Chen-Yu Tsai
2018-09-02 7:26 ` [PATCH 14/27] drm/bridge/synopsys: dw-hdmi: Enable workaround for v2.12a Jernej Skrabec
2018-09-22 13:54 ` Chen-Yu Tsai
2018-09-02 7:26 ` [PATCH 15/27] drm/sun4i: Not all DW HDMI controllers has scrambled addresses Jernej Skrabec
2018-09-12 12:25 ` Chen-Yu Tsai
2018-09-02 7:26 ` [PATCH 16/27] drm/sun4i: dw-hdmi: Make mode_valid function configurable Jernej Skrabec
2018-09-22 13:29 ` Chen-Yu Tsai
2018-09-02 7:26 ` [PATCH 17/27] drm/sun4i: dw-hdmi: Add quirk for setting TMDS clock Jernej Skrabec
2018-09-22 13:30 ` Chen-Yu Tsai
2018-09-02 7:26 ` [PATCH 18/27] dt-bindings: display: sunxi: add DT binding for Allwinner H6 DW HDMI Jernej Skrabec
2018-09-02 7:26 ` [PATCH 19/27] drm/sun4i: Add support for H6 DW HDMI controller Jernej Skrabec
2018-09-12 12:29 ` Chen-Yu Tsai
2018-09-02 7:26 ` [PATCH 20/27] drm/sun4i: Add support for Synopsys HDMI PHY Jernej Skrabec
2018-09-02 7:26 ` [PATCH 21/27] drm/sun4i: Add support for H6 " Jernej Skrabec
2018-09-22 15:55 ` Chen-Yu Tsai
2018-09-23 19:29 ` Jernej Škrabec
2018-09-02 7:26 ` [PATCH 22/27] drm/sun4i: Initialize registers in tcon-top driver Jernej Skrabec
2018-09-02 7:26 ` [PATCH 23/27] drm: sun4i: add quirks for TCON TOP Jernej Skrabec
2018-09-02 7:26 ` [PATCH 24/27] dt-bindings: display: sun4i-drm: document H6 " Jernej Skrabec
2018-09-02 7:26 ` [PATCH 25/27] drm: sun4i: add support for " Jernej Skrabec
2018-09-02 7:26 ` [PATCH 26/27] arm64: dts: sun50i: h6: Add HDMI pipeline Jernej Skrabec
2018-09-02 7:26 ` [PATCH 27/27] arm64: dts: sun50i: h6: Enable HDMI output on Pine H64 board Jernej Skrabec
2018-09-02 9:31 ` [PATCH 00/27] Allwinner H6 DE3 and HDMI support Chen-Yu Tsai
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