From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65DFFC433F5 for ; Mon, 3 Sep 2018 13:35:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 19F1820652 for ; Mon, 3 Sep 2018 13:35:31 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 19F1820652 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=aosc.io Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727363AbeICRzl (ORCPT ); Mon, 3 Sep 2018 13:55:41 -0400 Received: from hermes.aosc.io ([199.195.250.187]:52340 "EHLO hermes.aosc.io" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727186AbeICRzk (ORCPT ); Mon, 3 Sep 2018 13:55:40 -0400 Received: from localhost (localhost [127.0.0.1]) (Authenticated sender: icenowy@aosc.io) by hermes.aosc.io (Postfix) with ESMTPSA id C2B645999B; Mon, 3 Sep 2018 13:35:24 +0000 (UTC) From: Icenowy Zheng To: Maxime Ripard , Chen-Yu Tsai , Jernej Skrabec Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Icenowy Zheng Subject: [PATCH 1/3] dt-bindings: change the A64 HDMI PHY binding to R40 Date: Mon, 3 Sep 2018 21:34:32 +0800 Message-Id: <20180903133434.58188-2-icenowy@aosc.io> In-Reply-To: <20180903133434.58188-1-icenowy@aosc.io> References: <20180903133434.58188-1-icenowy@aosc.io> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org By experiment, the A64 HDMi PHY doesn't support the PLL-VIDEO mux introduced in R40, although it has two PLL-VIDEOs. Change the A64 HDMI PHY binding to R40 one. This binding is introduced in v4.19, which is still in RC stage, so we have change to fix it. Signed-off-by: Icenowy Zheng --- .../devicetree/bindings/display/sunxi/sun4i-drm.txt | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt index f8773ecb7525..de6814a5aba3 100644 --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt @@ -103,7 +103,7 @@ Required properties: - compatible: value must be one of: * allwinner,sun8i-a83t-hdmi-phy * allwinner,sun8i-h3-hdmi-phy - * allwinner,sun50i-a64-hdmi-phy + * allwinner,sun8i-r40-hdmi-phy - reg: base address and size of memory-mapped region - clocks: phandles to the clocks feeding the HDMI PHY * bus: the HDMI PHY interface clock @@ -112,9 +112,9 @@ Required properties: - resets: phandle to the reset controller driving the PHY - reset-names: must be "phy" -H3 and A64 HDMI PHY require additional clocks: +H3 and R40 HDMI PHY require additional clocks: - pll-0: parent of phy clock - - pll-1: second possible phy clock parent (A64 only) + - pll-1: second possible phy clock parent (R40 only) TV Encoder ---------- -- 2.18.0