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From: Vinod <vkoul@kernel.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: dan.j.williams@intel.com, afaerber@suse.de, robh+dt@kernel.org,
	gregkh@linuxfoundation.org, jslaby@suse.com,
	linux-serial@vger.kernel.org, dmaengine@vger.kernel.org,
	liuwei@actions-semi.com, 96boards@ucrobotics.com,
	devicetree@vger.kernel.org, daniel.thompson@linaro.org,
	amit.kucheria@linaro.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, hzhang@ucrobotics.com,
	bdong@ucrobotics.com, manivannanece23@gmail.com,
	thomas.liau@actions-semi.com, jeff.chen@actions-semi.com,
	pn@denx.de, edgar.righi@lsitec.org.br
Subject: Re: [PATCH 2/3] dmaengine: Add Slave and Cyclic mode support for Actions Semi Owl S900 SoC
Date: Tue, 18 Sep 2018 09:35:12 -0700	[thread overview]
Message-ID: <20180918163512.GE2613@vkoul-mobl> (raw)
In-Reply-To: <20180901164215.3683-3-manivannan.sadhasivam@linaro.org>

On 01-09-18, 22:12, Manivannan Sadhasivam wrote:

> @@ -364,6 +372,26 @@ static inline int owl_dma_cfg_lli(struct owl_dma_vchan *vchan,
>  			OWL_DMA_MODE_DT_DCU | OWL_DMA_MODE_SAM_INC |
>  			OWL_DMA_MODE_DAM_INC;
>  
> +		break;
> +	case DMA_MEM_TO_DEV:
> +		mode |= OWL_DMA_MODE_TS(vchan->drq)
> +			| OWL_DMA_MODE_ST_DCU | OWL_DMA_MODE_DT_DEV
> +			| OWL_DMA_MODE_SAM_INC | OWL_DMA_MODE_DAM_CONST;
> +
> +		/* Handle bus width for UART */
> +		if (sconfig->dst_addr_width == DMA_SLAVE_BUSWIDTH_1_BYTE)
> +			mode |= OWL_DMA_MODE_NDDBW_8BIT;

this is fine per se, but not correct way to handle in dmaengine driver.
You should be agnostic to user of dmaengine, so handle all the buswidths
the IP block supports and update the values accordingly. That way new
uses can be added w/o requiring change in dmaengine driver

-- 
~Vinod

  reply	other threads:[~2018-09-18 16:35 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-01 16:42 [PATCH 0/3] Add slave DMA support for Actios Semi " Manivannan Sadhasivam
2018-09-01 16:42 ` [PATCH 1/3] arm64: dts: actions: s900: Enable Tx DMA for UART5 Manivannan Sadhasivam
2018-09-11 12:03   ` kbuild test robot
2018-09-01 16:42 ` [PATCH 2/3] dmaengine: Add Slave and Cyclic mode support for Actions Semi Owl S900 SoC Manivannan Sadhasivam
2018-09-18 16:35   ` Vinod [this message]
2018-09-18 22:52     ` Manivannan Sadhasivam
2018-09-18 23:32       ` Vinod
2018-09-18 23:34         ` Manivannan Sadhasivam
2018-09-18 23:56           ` Manivannan Sadhasivam
2018-09-01 16:42 ` [PATCH 3/3] tty: serial: Add Tx DMA support for UART in Actions Semi Owl SoCs Manivannan Sadhasivam

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