* [PATCH 1/2] drm/fourcc: rename Intel modifiers to follow the naming convention
@ 2018-09-18 17:21 Eric Engestrom
2018-09-18 17:22 ` [PATCH 2/2] i915: rename " Eric Engestrom
2018-09-21 9:18 ` [PATCH 1/2] drm/fourcc: rename Intel " Daniel Vetter
0 siblings, 2 replies; 3+ messages in thread
From: Eric Engestrom @ 2018-09-18 17:21 UTC (permalink / raw)
To: dri-devel
Cc: Daniel Vetter, Gustavo Padovan, Maarten Lankhorst, Sean Paul,
David Airlie, linux-kernel
All the other vendors use the format
DRM_FORMAT_MOD_{SAMSUNG,QCOM,VIVANTE,NVIDIA,BROADCOM,ARM}_* for their
modifiers, except Intel.
Suggested-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
---
include/uapi/drm/drm_fourcc.h | 15 ++++++++++-----
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index 139632b871816f9e3dad..170a562223387687592a 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -271,7 +271,8 @@ extern "C" {
* sharing. It exists since on a given platform it does uniquely identify the
* layout in a simple way for i915-specific userspace.
*/
-#define I915_FORMAT_MOD_X_TILED fourcc_mod_code(INTEL, 1)
+#define DRM_FORMAT_MOD_INTEL_X_TILED fourcc_mod_code(INTEL, 1)
+#define I915_FORMAT_MOD_X_TILED DRM_FORMAT_MOD_INTEL_X_TILED
/*
* Intel Y-tiling layout
@@ -286,7 +287,8 @@ extern "C" {
* sharing. It exists since on a given platform it does uniquely identify the
* layout in a simple way for i915-specific userspace.
*/
-#define I915_FORMAT_MOD_Y_TILED fourcc_mod_code(INTEL, 2)
+#define DRM_FORMAT_MOD_INTEL_Y_TILED fourcc_mod_code(INTEL, 2)
+#define I915_FORMAT_MOD_Y_TILED DRM_FORMAT_MOD_INTEL_Y_TILED
/*
* Intel Yf-tiling layout
@@ -301,7 +303,8 @@ extern "C" {
* 64 byte blocks of pixels contain four pixel rows of 16 bytes, where the width
* in pixel depends on the pixel depth.
*/
-#define I915_FORMAT_MOD_Yf_TILED fourcc_mod_code(INTEL, 3)
+#define DRM_FORMAT_MOD_INTEL_Yf_TILED fourcc_mod_code(INTEL, 3)
+#define I915_FORMAT_MOD_Yf_TILED DRM_FORMAT_MOD_INTEL_Yf_TILED
/*
* Intel color control surface (CCS) for render compression
@@ -320,8 +323,10 @@ extern "C" {
* But that fact is not relevant unless the memory is accessed
* directly.
*/
-#define I915_FORMAT_MOD_Y_TILED_CCS fourcc_mod_code(INTEL, 4)
-#define I915_FORMAT_MOD_Yf_TILED_CCS fourcc_mod_code(INTEL, 5)
+#define DRM_FORMAT_MOD_INTEL_Y_TILED_CCS fourcc_mod_code(INTEL, 4)
+#define I915_FORMAT_MOD_Y_TILED_CCS DRM_FORMAT_MOD_INTEL_Y_TILED_CCS
+#define DRM_FORMAT_MOD_INTEL_Yf_TILED_CCS fourcc_mod_code(INTEL, 5)
+#define I915_FORMAT_MOD_Yf_TILED_CCS DRM_FORMAT_MOD_INTEL_Yf_TILED_CCS
/*
* Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks
--
Cheers,
Eric
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 2/2] i915: rename modifiers to follow the naming convention
2018-09-18 17:21 [PATCH 1/2] drm/fourcc: rename Intel modifiers to follow the naming convention Eric Engestrom
@ 2018-09-18 17:22 ` Eric Engestrom
2018-09-21 9:18 ` [PATCH 1/2] drm/fourcc: rename Intel " Daniel Vetter
1 sibling, 0 replies; 3+ messages in thread
From: Eric Engestrom @ 2018-09-18 17:22 UTC (permalink / raw)
To: dri-devel
Cc: Daniel Vetter, Jani Nikula, Joonas Lahtinen, Rodrigo Vivi,
David Airlie, intel-gfx, linux-kernel
$ sed -i s/I915_FORMAT_MOD_/DRM_FORMAT_MOD_INTEL_/g $(git grep -l I915_FORMAT_MOD_)
$ git checkout include/uapi/drm/drm_fourcc.h
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
---
drivers/gpu/drm/i915/intel_atomic_plane.c | 12 +-
drivers/gpu/drm/i915/intel_display.c | 128 +++++++++++-----------
drivers/gpu/drm/i915/intel_pm.c | 26 ++---
drivers/gpu/drm/i915/intel_sprite.c | 58 +++++-----
4 files changed, 112 insertions(+), 112 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c b/drivers/gpu/drm/i915/intel_atomic_plane.c
index fa7df5fe154bf06bdfc5..c26f0b25afa2dc8c3a3c 100644
--- a/drivers/gpu/drm/i915/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
@@ -126,8 +126,8 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_
if (state->fb && drm_rotation_90_or_270(state->rotation)) {
struct drm_format_name_buf format_name;
- if (state->fb->modifier != I915_FORMAT_MOD_Y_TILED &&
- state->fb->modifier != I915_FORMAT_MOD_Yf_TILED) {
+ if (state->fb->modifier != DRM_FORMAT_MOD_INTEL_Y_TILED &&
+ state->fb->modifier != DRM_FORMAT_MOD_INTEL_Yf_TILED) {
DRM_DEBUG_KMS("Y/Yf tiling required for 90/270!\n");
return -EINVAL;
}
@@ -169,10 +169,10 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_
*/
if (state->fb && INTEL_GEN(dev_priv) >= 9 && crtc_state->base.enable &&
adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
- if (state->fb->modifier == I915_FORMAT_MOD_Y_TILED ||
- state->fb->modifier == I915_FORMAT_MOD_Yf_TILED ||
- state->fb->modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
- state->fb->modifier == I915_FORMAT_MOD_Yf_TILED_CCS) {
+ if (state->fb->modifier == DRM_FORMAT_MOD_INTEL_Y_TILED ||
+ state->fb->modifier == DRM_FORMAT_MOD_INTEL_Yf_TILED ||
+ state->fb->modifier == DRM_FORMAT_MOD_INTEL_Y_TILED_CCS ||
+ state->fb->modifier == DRM_FORMAT_MOD_INTEL_Yf_TILED_CCS) {
DRM_DEBUG_KMS("Y/Yf tiling not supported in IF-ID mode\n");
return -EINVAL;
}
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index b2bab57cd113f2293850..087302d655f9a146846a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -69,7 +69,7 @@ static const uint32_t i965_primary_formats[] = {
};
static const uint64_t i9xx_format_modifiers[] = {
- I915_FORMAT_MOD_X_TILED,
+ DRM_FORMAT_MOD_INTEL_X_TILED,
DRM_FORMAT_MOD_LINEAR,
DRM_FORMAT_MOD_INVALID
};
@@ -106,19 +106,19 @@ static const uint32_t skl_pri_planar_formats[] = {
};
static const uint64_t skl_format_modifiers_noccs[] = {
- I915_FORMAT_MOD_Yf_TILED,
- I915_FORMAT_MOD_Y_TILED,
- I915_FORMAT_MOD_X_TILED,
+ DRM_FORMAT_MOD_INTEL_Yf_TILED,
+ DRM_FORMAT_MOD_INTEL_Y_TILED,
+ DRM_FORMAT_MOD_INTEL_X_TILED,
DRM_FORMAT_MOD_LINEAR,
DRM_FORMAT_MOD_INVALID
};
static const uint64_t skl_format_modifiers_ccs[] = {
- I915_FORMAT_MOD_Yf_TILED_CCS,
- I915_FORMAT_MOD_Y_TILED_CCS,
- I915_FORMAT_MOD_Yf_TILED,
- I915_FORMAT_MOD_Y_TILED,
- I915_FORMAT_MOD_X_TILED,
+ DRM_FORMAT_MOD_INTEL_Yf_TILED_CCS,
+ DRM_FORMAT_MOD_INTEL_Y_TILED_CCS,
+ DRM_FORMAT_MOD_INTEL_Yf_TILED,
+ DRM_FORMAT_MOD_INTEL_Y_TILED,
+ DRM_FORMAT_MOD_INTEL_X_TILED,
DRM_FORMAT_MOD_LINEAR,
DRM_FORMAT_MOD_INVALID
};
@@ -1925,25 +1925,25 @@ intel_tile_width_bytes(const struct drm_framebuffer *fb, int plane)
switch (fb->modifier) {
case DRM_FORMAT_MOD_LINEAR:
return cpp;
- case I915_FORMAT_MOD_X_TILED:
+ case DRM_FORMAT_MOD_INTEL_X_TILED:
if (IS_GEN2(dev_priv))
return 128;
else
return 512;
- case I915_FORMAT_MOD_Y_TILED_CCS:
+ case DRM_FORMAT_MOD_INTEL_Y_TILED_CCS:
if (plane == 1)
return 128;
/* fall through */
- case I915_FORMAT_MOD_Y_TILED:
+ case DRM_FORMAT_MOD_INTEL_Y_TILED:
if (IS_GEN2(dev_priv) || HAS_128_BYTE_Y_TILING(dev_priv))
return 128;
else
return 512;
- case I915_FORMAT_MOD_Yf_TILED_CCS:
+ case DRM_FORMAT_MOD_INTEL_Yf_TILED_CCS:
if (plane == 1)
return 128;
/* fall through */
- case I915_FORMAT_MOD_Yf_TILED:
+ case DRM_FORMAT_MOD_INTEL_Yf_TILED:
switch (cpp) {
case 1:
return 64;
@@ -2055,14 +2055,14 @@ static unsigned int intel_surf_alignment(const struct drm_framebuffer *fb,
switch (fb->modifier) {
case DRM_FORMAT_MOD_LINEAR:
return intel_linear_alignment(dev_priv);
- case I915_FORMAT_MOD_X_TILED:
+ case DRM_FORMAT_MOD_INTEL_X_TILED:
if (INTEL_GEN(dev_priv) >= 9)
return 256 * 1024;
return 0;
- case I915_FORMAT_MOD_Y_TILED_CCS:
- case I915_FORMAT_MOD_Yf_TILED_CCS:
- case I915_FORMAT_MOD_Y_TILED:
- case I915_FORMAT_MOD_Yf_TILED:
+ case DRM_FORMAT_MOD_INTEL_Y_TILED_CCS:
+ case DRM_FORMAT_MOD_INTEL_Yf_TILED_CCS:
+ case DRM_FORMAT_MOD_INTEL_Y_TILED:
+ case DRM_FORMAT_MOD_INTEL_Yf_TILED:
return 1 * 1024 * 1024;
default:
MISSING_CASE(fb->modifier);
@@ -2416,10 +2416,10 @@ static int intel_fb_offset_to_xy(int *x, int *y,
static unsigned int intel_fb_modifier_to_tiling(uint64_t fb_modifier)
{
switch (fb_modifier) {
- case I915_FORMAT_MOD_X_TILED:
+ case DRM_FORMAT_MOD_INTEL_X_TILED:
return I915_TILING_X;
- case I915_FORMAT_MOD_Y_TILED:
- case I915_FORMAT_MOD_Y_TILED_CCS:
+ case DRM_FORMAT_MOD_INTEL_Y_TILED:
+ case DRM_FORMAT_MOD_INTEL_Y_TILED_CCS:
return I915_TILING_Y;
default:
return I915_TILING_NONE;
@@ -2465,8 +2465,8 @@ static const struct drm_format_info *
intel_get_format_info(const struct drm_mode_fb_cmd2 *cmd)
{
switch (cmd->modifier[0]) {
- case I915_FORMAT_MOD_Y_TILED_CCS:
- case I915_FORMAT_MOD_Yf_TILED_CCS:
+ case DRM_FORMAT_MOD_INTEL_Y_TILED_CCS:
+ case DRM_FORMAT_MOD_INTEL_Yf_TILED_CCS:
return lookup_format_info(ccs_formats,
ARRAY_SIZE(ccs_formats),
cmd->pixel_format);
@@ -2477,8 +2477,8 @@ intel_get_format_info(const struct drm_mode_fb_cmd2 *cmd)
bool is_ccs_modifier(u64 modifier)
{
- return modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
- modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
+ return modifier == DRM_FORMAT_MOD_INTEL_Y_TILED_CCS ||
+ modifier == DRM_FORMAT_MOD_INTEL_Yf_TILED_CCS;
}
static int
@@ -2906,7 +2906,7 @@ static int skl_max_plane_width(const struct drm_framebuffer *fb, int plane,
switch (fb->modifier) {
case DRM_FORMAT_MOD_LINEAR:
- case I915_FORMAT_MOD_X_TILED:
+ case DRM_FORMAT_MOD_INTEL_X_TILED:
switch (cpp) {
case 8:
return 4096;
@@ -2919,11 +2919,11 @@ static int skl_max_plane_width(const struct drm_framebuffer *fb, int plane,
break;
}
break;
- case I915_FORMAT_MOD_Y_TILED_CCS:
- case I915_FORMAT_MOD_Yf_TILED_CCS:
+ case DRM_FORMAT_MOD_INTEL_Y_TILED_CCS:
+ case DRM_FORMAT_MOD_INTEL_Yf_TILED_CCS:
/* FIXME AUX plane? */
- case I915_FORMAT_MOD_Y_TILED:
- case I915_FORMAT_MOD_Yf_TILED:
+ case DRM_FORMAT_MOD_INTEL_Y_TILED:
+ case DRM_FORMAT_MOD_INTEL_Yf_TILED:
switch (cpp) {
case 8:
return 2048;
@@ -3043,7 +3043,7 @@ static int skl_check_main_surface(const struct intel_crtc_state *crtc_state,
*
* TODO: linear and Y-tiled seem fine, Yf untested,
*/
- if (fb->modifier == I915_FORMAT_MOD_X_TILED) {
+ if (fb->modifier == DRM_FORMAT_MOD_INTEL_X_TILED) {
int cpp = fb->format->cpp[0];
while ((x + w) * cpp > fb->pitches[0]) {
@@ -3262,7 +3262,7 @@ static u32 i9xx_plane_ctl(const struct intel_crtc_state *crtc_state,
}
if (INTEL_GEN(dev_priv) >= 4 &&
- fb->modifier == I915_FORMAT_MOD_X_TILED)
+ fb->modifier == DRM_FORMAT_MOD_INTEL_X_TILED)
dspcntr |= DISPPLANE_TILED;
if (rotation & DRM_MODE_ROTATE_180)
@@ -3551,15 +3551,15 @@ static u32 skl_plane_ctl_tiling(uint64_t fb_modifier)
switch (fb_modifier) {
case DRM_FORMAT_MOD_LINEAR:
break;
- case I915_FORMAT_MOD_X_TILED:
+ case DRM_FORMAT_MOD_INTEL_X_TILED:
return PLANE_CTL_TILED_X;
- case I915_FORMAT_MOD_Y_TILED:
+ case DRM_FORMAT_MOD_INTEL_Y_TILED:
return PLANE_CTL_TILED_Y;
- case I915_FORMAT_MOD_Y_TILED_CCS:
+ case DRM_FORMAT_MOD_INTEL_Y_TILED_CCS:
return PLANE_CTL_TILED_Y | PLANE_CTL_RENDER_DECOMPRESSION_ENABLE;
- case I915_FORMAT_MOD_Yf_TILED:
+ case DRM_FORMAT_MOD_INTEL_Yf_TILED:
return PLANE_CTL_TILED_YF;
- case I915_FORMAT_MOD_Yf_TILED_CCS:
+ case DRM_FORMAT_MOD_INTEL_Yf_TILED_CCS:
return PLANE_CTL_TILED_YF | PLANE_CTL_RENDER_DECOMPRESSION_ENABLE;
default:
MISSING_CASE(fb_modifier);
@@ -7752,7 +7752,7 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc,
if (INTEL_GEN(dev_priv) >= 4) {
if (val & DISPPLANE_TILED) {
plane_config->tiling = I915_TILING_X;
- fb->modifier = I915_FORMAT_MOD_X_TILED;
+ fb->modifier = DRM_FORMAT_MOD_INTEL_X_TILED;
}
}
@@ -8804,19 +8804,19 @@ skylake_get_initial_plane_config(struct intel_crtc *crtc,
break;
case PLANE_CTL_TILED_X:
plane_config->tiling = I915_TILING_X;
- fb->modifier = I915_FORMAT_MOD_X_TILED;
+ fb->modifier = DRM_FORMAT_MOD_INTEL_X_TILED;
break;
case PLANE_CTL_TILED_Y:
if (val & PLANE_CTL_RENDER_DECOMPRESSION_ENABLE)
- fb->modifier = I915_FORMAT_MOD_Y_TILED_CCS;
+ fb->modifier = DRM_FORMAT_MOD_INTEL_Y_TILED_CCS;
else
- fb->modifier = I915_FORMAT_MOD_Y_TILED;
+ fb->modifier = DRM_FORMAT_MOD_INTEL_Y_TILED;
break;
case PLANE_CTL_TILED_YF:
if (val & PLANE_CTL_RENDER_DECOMPRESSION_ENABLE)
- fb->modifier = I915_FORMAT_MOD_Yf_TILED_CCS;
+ fb->modifier = DRM_FORMAT_MOD_INTEL_Yf_TILED_CCS;
else
- fb->modifier = I915_FORMAT_MOD_Yf_TILED;
+ fb->modifier = DRM_FORMAT_MOD_INTEL_Yf_TILED;
break;
default:
MISSING_CASE(tiling);
@@ -13342,7 +13342,7 @@ static bool i8xx_plane_format_mod_supported(struct drm_plane *_plane,
{
switch (modifier) {
case DRM_FORMAT_MOD_LINEAR:
- case I915_FORMAT_MOD_X_TILED:
+ case DRM_FORMAT_MOD_INTEL_X_TILED:
break;
default:
return false;
@@ -13354,7 +13354,7 @@ static bool i8xx_plane_format_mod_supported(struct drm_plane *_plane,
case DRM_FORMAT_XRGB1555:
case DRM_FORMAT_XRGB8888:
return modifier == DRM_FORMAT_MOD_LINEAR ||
- modifier == I915_FORMAT_MOD_X_TILED;
+ modifier == DRM_FORMAT_MOD_INTEL_X_TILED;
default:
return false;
}
@@ -13365,7 +13365,7 @@ static bool i965_plane_format_mod_supported(struct drm_plane *_plane,
{
switch (modifier) {
case DRM_FORMAT_MOD_LINEAR:
- case I915_FORMAT_MOD_X_TILED:
+ case DRM_FORMAT_MOD_INTEL_X_TILED:
break;
default:
return false;
@@ -13379,7 +13379,7 @@ static bool i965_plane_format_mod_supported(struct drm_plane *_plane,
case DRM_FORMAT_XRGB2101010:
case DRM_FORMAT_XBGR2101010:
return modifier == DRM_FORMAT_MOD_LINEAR ||
- modifier == I915_FORMAT_MOD_X_TILED;
+ modifier == DRM_FORMAT_MOD_INTEL_X_TILED;
default:
return false;
}
@@ -13392,12 +13392,12 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane,
switch (modifier) {
case DRM_FORMAT_MOD_LINEAR:
- case I915_FORMAT_MOD_X_TILED:
- case I915_FORMAT_MOD_Y_TILED:
- case I915_FORMAT_MOD_Yf_TILED:
+ case DRM_FORMAT_MOD_INTEL_X_TILED:
+ case DRM_FORMAT_MOD_INTEL_Y_TILED:
+ case DRM_FORMAT_MOD_INTEL_Yf_TILED:
break;
- case I915_FORMAT_MOD_Y_TILED_CCS:
- case I915_FORMAT_MOD_Yf_TILED_CCS:
+ case DRM_FORMAT_MOD_INTEL_Y_TILED_CCS:
+ case DRM_FORMAT_MOD_INTEL_Yf_TILED_CCS:
if (!plane->has_ccs)
return false;
break;
@@ -13421,13 +13421,13 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane,
case DRM_FORMAT_UYVY:
case DRM_FORMAT_VYUY:
case DRM_FORMAT_NV12:
- if (modifier == I915_FORMAT_MOD_Yf_TILED)
+ if (modifier == DRM_FORMAT_MOD_INTEL_Yf_TILED)
return true;
/* fall through */
case DRM_FORMAT_C8:
if (modifier == DRM_FORMAT_MOD_LINEAR ||
- modifier == I915_FORMAT_MOD_X_TILED ||
- modifier == I915_FORMAT_MOD_Y_TILED)
+ modifier == DRM_FORMAT_MOD_INTEL_X_TILED ||
+ modifier == DRM_FORMAT_MOD_INTEL_Y_TILED)
return true;
/* fall through */
default:
@@ -14394,12 +14394,12 @@ u32 intel_fb_pitch_limit(struct drm_i915_private *dev_priv,
} else if (gen >= 5 && !HAS_GMCH_DISPLAY(dev_priv)) {
return 32*1024;
} else if (gen >= 4) {
- if (fb_modifier == I915_FORMAT_MOD_X_TILED)
+ if (fb_modifier == DRM_FORMAT_MOD_INTEL_X_TILED)
return 16*1024;
else
return 32*1024;
} else if (gen >= 3) {
- if (fb_modifier == I915_FORMAT_MOD_X_TILED)
+ if (fb_modifier == DRM_FORMAT_MOD_INTEL_X_TILED)
return 8*1024;
else
return 16*1024;
@@ -14439,7 +14439,7 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
}
} else {
if (tiling == I915_TILING_X) {
- mode_cmd->modifier[0] = I915_FORMAT_MOD_X_TILED;
+ mode_cmd->modifier[0] = DRM_FORMAT_MOD_INTEL_X_TILED;
} else if (tiling == I915_TILING_Y) {
DRM_DEBUG_KMS("No Y tiling for legacy addfb\n");
goto err;
@@ -14448,8 +14448,8 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
/* Passed in modifier sanity checking. */
switch (mode_cmd->modifier[0]) {
- case I915_FORMAT_MOD_Y_TILED_CCS:
- case I915_FORMAT_MOD_Yf_TILED_CCS:
+ case DRM_FORMAT_MOD_INTEL_Y_TILED_CCS:
+ case DRM_FORMAT_MOD_INTEL_Yf_TILED_CCS:
switch (mode_cmd->pixel_format) {
case DRM_FORMAT_XBGR8888:
case DRM_FORMAT_ABGR8888:
@@ -14461,15 +14461,15 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
goto err;
}
/* fall through */
- case I915_FORMAT_MOD_Y_TILED:
- case I915_FORMAT_MOD_Yf_TILED:
+ case DRM_FORMAT_MOD_INTEL_Y_TILED:
+ case DRM_FORMAT_MOD_INTEL_Yf_TILED:
if (INTEL_GEN(dev_priv) < 9) {
DRM_DEBUG_KMS("Unsupported tiling 0x%llx!\n",
mode_cmd->modifier[0]);
goto err;
}
case DRM_FORMAT_MOD_LINEAR:
- case I915_FORMAT_MOD_X_TILED:
+ case DRM_FORMAT_MOD_INTEL_X_TILED:
break;
default:
DRM_DEBUG_KMS("Unsupported fb modifier 0x%llx!\n",
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index d99e5fabe93c3a822361..c62a52b20e9bee09ecc0 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3757,7 +3757,7 @@ bool intel_can_enable_sagv(struct drm_atomic_state *state)
if (skl_needs_memory_bw_wa(intel_state) &&
plane->base.state->fb->modifier ==
- I915_FORMAT_MOD_X_TILED)
+ DRM_FORMAT_MOD_INTEL_X_TILED)
latency += 15;
/*
@@ -4233,10 +4233,10 @@ skl_ddb_min_alloc(const struct drm_plane_state *pstate, const int plane)
return 0;
/* For Non Y-tile return 8-blocks */
- if (fb->modifier != I915_FORMAT_MOD_Y_TILED &&
- fb->modifier != I915_FORMAT_MOD_Yf_TILED &&
- fb->modifier != I915_FORMAT_MOD_Y_TILED_CCS &&
- fb->modifier != I915_FORMAT_MOD_Yf_TILED_CCS)
+ if (fb->modifier != DRM_FORMAT_MOD_INTEL_Y_TILED &&
+ fb->modifier != DRM_FORMAT_MOD_INTEL_Yf_TILED &&
+ fb->modifier != DRM_FORMAT_MOD_INTEL_Y_TILED_CCS &&
+ fb->modifier != DRM_FORMAT_MOD_INTEL_Yf_TILED_CCS)
return 8;
/*
@@ -4531,13 +4531,13 @@ skl_compute_plane_wm_params(const struct drm_i915_private *dev_priv,
return -EINVAL;
}
- wp->y_tiled = fb->modifier == I915_FORMAT_MOD_Y_TILED ||
- fb->modifier == I915_FORMAT_MOD_Yf_TILED ||
- fb->modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
- fb->modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
- wp->x_tiled = fb->modifier == I915_FORMAT_MOD_X_TILED;
- wp->rc_surface = fb->modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
- fb->modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
+ wp->y_tiled = fb->modifier == DRM_FORMAT_MOD_INTEL_Y_TILED ||
+ fb->modifier == DRM_FORMAT_MOD_INTEL_Yf_TILED ||
+ fb->modifier == DRM_FORMAT_MOD_INTEL_Y_TILED_CCS ||
+ fb->modifier == DRM_FORMAT_MOD_INTEL_Yf_TILED_CCS;
+ wp->x_tiled = fb->modifier == DRM_FORMAT_MOD_INTEL_X_TILED;
+ wp->rc_surface = fb->modifier == DRM_FORMAT_MOD_INTEL_Y_TILED_CCS ||
+ fb->modifier == DRM_FORMAT_MOD_INTEL_Yf_TILED_CCS;
wp->is_planar = fb->format->format == DRM_FORMAT_NV12;
if (plane->id == PLANE_CURSOR) {
@@ -4559,7 +4559,7 @@ skl_compute_plane_wm_params(const struct drm_i915_private *dev_priv,
intel_pstate);
if (INTEL_GEN(dev_priv) >= 11 &&
- fb->modifier == I915_FORMAT_MOD_Yf_TILED && wp->cpp == 8)
+ fb->modifier == DRM_FORMAT_MOD_INTEL_Yf_TILED && wp->cpp == 8)
wp->dbuf_block_size = 256;
else
wp->dbuf_block_size = 512;
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 9600ccfc5b7699ff54b1..9546199e17032539e7b9 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -520,7 +520,7 @@ static u32 vlv_sprite_ctl(const struct intel_crtc_state *crtc_state,
if (plane_state->base.color_encoding == DRM_COLOR_YCBCR_BT709)
sprctl |= SP_YUV_FORMAT_BT709;
- if (fb->modifier == I915_FORMAT_MOD_X_TILED)
+ if (fb->modifier == DRM_FORMAT_MOD_INTEL_X_TILED)
sprctl |= SP_TILED;
if (rotation & DRM_MODE_ROTATE_180)
@@ -577,7 +577,7 @@ vlv_update_plane(struct intel_plane *plane,
I915_WRITE_FW(SPSTRIDE(pipe, plane_id), fb->pitches[0]);
I915_WRITE_FW(SPPOS(pipe, plane_id), (crtc_y << 16) | crtc_x);
- if (fb->modifier == I915_FORMAT_MOD_X_TILED)
+ if (fb->modifier == DRM_FORMAT_MOD_INTEL_X_TILED)
I915_WRITE_FW(SPTILEOFF(pipe, plane_id), (y << 16) | x);
else
I915_WRITE_FW(SPLINOFF(pipe, plane_id), linear_offset);
@@ -681,7 +681,7 @@ static u32 ivb_sprite_ctl(const struct intel_crtc_state *crtc_state,
if (plane_state->base.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
sprctl |= SPRITE_YUV_RANGE_CORRECTION_DISABLE;
- if (fb->modifier == I915_FORMAT_MOD_X_TILED)
+ if (fb->modifier == DRM_FORMAT_MOD_INTEL_X_TILED)
sprctl |= SPRITE_TILED;
if (rotation & DRM_MODE_ROTATE_180)
@@ -743,7 +743,7 @@ ivb_update_plane(struct intel_plane *plane,
* register */
if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
I915_WRITE_FW(SPROFFSET(pipe), (y << 16) | x);
- else if (fb->modifier == I915_FORMAT_MOD_X_TILED)
+ else if (fb->modifier == DRM_FORMAT_MOD_INTEL_X_TILED)
I915_WRITE_FW(SPRTILEOFF(pipe), (y << 16) | x);
else
I915_WRITE_FW(SPRLINOFF(pipe), linear_offset);
@@ -845,7 +845,7 @@ static u32 g4x_sprite_ctl(const struct intel_crtc_state *crtc_state,
if (plane_state->base.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
dvscntr |= DVS_YUV_RANGE_CORRECTION_DISABLE;
- if (fb->modifier == I915_FORMAT_MOD_X_TILED)
+ if (fb->modifier == DRM_FORMAT_MOD_INTEL_X_TILED)
dvscntr |= DVS_TILED;
if (rotation & DRM_MODE_ROTATE_180)
@@ -903,7 +903,7 @@ g4x_update_plane(struct intel_plane *plane,
I915_WRITE_FW(DVSSTRIDE(pipe), fb->pitches[0]);
I915_WRITE_FW(DVSPOS(pipe), (crtc_y << 16) | crtc_x);
- if (fb->modifier == I915_FORMAT_MOD_X_TILED)
+ if (fb->modifier == DRM_FORMAT_MOD_INTEL_X_TILED)
I915_WRITE_FW(DVSTILEOFF(pipe), (y << 16) | x);
else
I915_WRITE_FW(DVSLINOFF(pipe), linear_offset);
@@ -1228,7 +1228,7 @@ static const uint32_t g4x_plane_formats[] = {
};
static const uint64_t i9xx_plane_format_modifiers[] = {
- I915_FORMAT_MOD_X_TILED,
+ DRM_FORMAT_MOD_INTEL_X_TILED,
DRM_FORMAT_MOD_LINEAR,
DRM_FORMAT_MOD_INVALID
};
@@ -1282,19 +1282,19 @@ static uint32_t skl_planar_formats[] = {
};
static const uint64_t skl_plane_format_modifiers_noccs[] = {
- I915_FORMAT_MOD_Yf_TILED,
- I915_FORMAT_MOD_Y_TILED,
- I915_FORMAT_MOD_X_TILED,
+ DRM_FORMAT_MOD_INTEL_Yf_TILED,
+ DRM_FORMAT_MOD_INTEL_Y_TILED,
+ DRM_FORMAT_MOD_INTEL_X_TILED,
DRM_FORMAT_MOD_LINEAR,
DRM_FORMAT_MOD_INVALID
};
static const uint64_t skl_plane_format_modifiers_ccs[] = {
- I915_FORMAT_MOD_Yf_TILED_CCS,
- I915_FORMAT_MOD_Y_TILED_CCS,
- I915_FORMAT_MOD_Yf_TILED,
- I915_FORMAT_MOD_Y_TILED,
- I915_FORMAT_MOD_X_TILED,
+ DRM_FORMAT_MOD_INTEL_Yf_TILED_CCS,
+ DRM_FORMAT_MOD_INTEL_Y_TILED_CCS,
+ DRM_FORMAT_MOD_INTEL_Yf_TILED,
+ DRM_FORMAT_MOD_INTEL_Y_TILED,
+ DRM_FORMAT_MOD_INTEL_X_TILED,
DRM_FORMAT_MOD_LINEAR,
DRM_FORMAT_MOD_INVALID
};
@@ -1304,7 +1304,7 @@ static bool g4x_sprite_format_mod_supported(struct drm_plane *_plane,
{
switch (modifier) {
case DRM_FORMAT_MOD_LINEAR:
- case I915_FORMAT_MOD_X_TILED:
+ case DRM_FORMAT_MOD_INTEL_X_TILED:
break;
default:
return false;
@@ -1317,7 +1317,7 @@ static bool g4x_sprite_format_mod_supported(struct drm_plane *_plane,
case DRM_FORMAT_UYVY:
case DRM_FORMAT_VYUY:
if (modifier == DRM_FORMAT_MOD_LINEAR ||
- modifier == I915_FORMAT_MOD_X_TILED)
+ modifier == DRM_FORMAT_MOD_INTEL_X_TILED)
return true;
/* fall through */
default:
@@ -1330,7 +1330,7 @@ static bool snb_sprite_format_mod_supported(struct drm_plane *_plane,
{
switch (modifier) {
case DRM_FORMAT_MOD_LINEAR:
- case I915_FORMAT_MOD_X_TILED:
+ case DRM_FORMAT_MOD_INTEL_X_TILED:
break;
default:
return false;
@@ -1344,7 +1344,7 @@ static bool snb_sprite_format_mod_supported(struct drm_plane *_plane,
case DRM_FORMAT_UYVY:
case DRM_FORMAT_VYUY:
if (modifier == DRM_FORMAT_MOD_LINEAR ||
- modifier == I915_FORMAT_MOD_X_TILED)
+ modifier == DRM_FORMAT_MOD_INTEL_X_TILED)
return true;
/* fall through */
default:
@@ -1357,7 +1357,7 @@ static bool vlv_sprite_format_mod_supported(struct drm_plane *_plane,
{
switch (modifier) {
case DRM_FORMAT_MOD_LINEAR:
- case I915_FORMAT_MOD_X_TILED:
+ case DRM_FORMAT_MOD_INTEL_X_TILED:
break;
default:
return false;
@@ -1376,7 +1376,7 @@ static bool vlv_sprite_format_mod_supported(struct drm_plane *_plane,
case DRM_FORMAT_UYVY:
case DRM_FORMAT_VYUY:
if (modifier == DRM_FORMAT_MOD_LINEAR ||
- modifier == I915_FORMAT_MOD_X_TILED)
+ modifier == DRM_FORMAT_MOD_INTEL_X_TILED)
return true;
/* fall through */
default:
@@ -1391,12 +1391,12 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane,
switch (modifier) {
case DRM_FORMAT_MOD_LINEAR:
- case I915_FORMAT_MOD_X_TILED:
- case I915_FORMAT_MOD_Y_TILED:
- case I915_FORMAT_MOD_Yf_TILED:
+ case DRM_FORMAT_MOD_INTEL_X_TILED:
+ case DRM_FORMAT_MOD_INTEL_Y_TILED:
+ case DRM_FORMAT_MOD_INTEL_Yf_TILED:
break;
- case I915_FORMAT_MOD_Y_TILED_CCS:
- case I915_FORMAT_MOD_Yf_TILED_CCS:
+ case DRM_FORMAT_MOD_INTEL_Y_TILED_CCS:
+ case DRM_FORMAT_MOD_INTEL_Yf_TILED_CCS:
if (!plane->has_ccs)
return false;
break;
@@ -1420,13 +1420,13 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane,
case DRM_FORMAT_UYVY:
case DRM_FORMAT_VYUY:
case DRM_FORMAT_NV12:
- if (modifier == I915_FORMAT_MOD_Yf_TILED)
+ if (modifier == DRM_FORMAT_MOD_INTEL_Yf_TILED)
return true;
/* fall through */
case DRM_FORMAT_C8:
if (modifier == DRM_FORMAT_MOD_LINEAR ||
- modifier == I915_FORMAT_MOD_X_TILED ||
- modifier == I915_FORMAT_MOD_Y_TILED)
+ modifier == DRM_FORMAT_MOD_INTEL_X_TILED ||
+ modifier == DRM_FORMAT_MOD_INTEL_Y_TILED)
return true;
/* fall through */
default:
--
Cheers,
Eric
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH 1/2] drm/fourcc: rename Intel modifiers to follow the naming convention
2018-09-18 17:21 [PATCH 1/2] drm/fourcc: rename Intel modifiers to follow the naming convention Eric Engestrom
2018-09-18 17:22 ` [PATCH 2/2] i915: rename " Eric Engestrom
@ 2018-09-21 9:18 ` Daniel Vetter
1 sibling, 0 replies; 3+ messages in thread
From: Daniel Vetter @ 2018-09-21 9:18 UTC (permalink / raw)
To: Eric Engestrom
Cc: dri-devel, Daniel Vetter, Gustavo Padovan, Maarten Lankhorst,
Sean Paul, David Airlie, linux-kernel
On Tue, Sep 18, 2018 at 06:21:59PM +0100, Eric Engestrom wrote:
> All the other vendors use the format
> DRM_FORMAT_MOD_{SAMSUNG,QCOM,VIVANTE,NVIDIA,BROADCOM,ARM}_* for their
> modifiers, except Intel.
>
> Suggested-by: Gerd Hoffmann <kraxel@redhat.com>
> Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
I think it'd be good to add why you want this (easier to parse in tooling,
or something like that was what you said on irc). With that addressed,
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> on both patches.
Probably best if you get i915 maintainers to merge both through drm-intel.
-Daniel
> ---
> include/uapi/drm/drm_fourcc.h | 15 ++++++++++-----
> 1 file changed, 10 insertions(+), 5 deletions(-)
>
> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> index 139632b871816f9e3dad..170a562223387687592a 100644
> --- a/include/uapi/drm/drm_fourcc.h
> +++ b/include/uapi/drm/drm_fourcc.h
> @@ -271,7 +271,8 @@ extern "C" {
> * sharing. It exists since on a given platform it does uniquely identify the
> * layout in a simple way for i915-specific userspace.
> */
> -#define I915_FORMAT_MOD_X_TILED fourcc_mod_code(INTEL, 1)
> +#define DRM_FORMAT_MOD_INTEL_X_TILED fourcc_mod_code(INTEL, 1)
> +#define I915_FORMAT_MOD_X_TILED DRM_FORMAT_MOD_INTEL_X_TILED
>
> /*
> * Intel Y-tiling layout
> @@ -286,7 +287,8 @@ extern "C" {
> * sharing. It exists since on a given platform it does uniquely identify the
> * layout in a simple way for i915-specific userspace.
> */
> -#define I915_FORMAT_MOD_Y_TILED fourcc_mod_code(INTEL, 2)
> +#define DRM_FORMAT_MOD_INTEL_Y_TILED fourcc_mod_code(INTEL, 2)
> +#define I915_FORMAT_MOD_Y_TILED DRM_FORMAT_MOD_INTEL_Y_TILED
>
> /*
> * Intel Yf-tiling layout
> @@ -301,7 +303,8 @@ extern "C" {
> * 64 byte blocks of pixels contain four pixel rows of 16 bytes, where the width
> * in pixel depends on the pixel depth.
> */
> -#define I915_FORMAT_MOD_Yf_TILED fourcc_mod_code(INTEL, 3)
> +#define DRM_FORMAT_MOD_INTEL_Yf_TILED fourcc_mod_code(INTEL, 3)
> +#define I915_FORMAT_MOD_Yf_TILED DRM_FORMAT_MOD_INTEL_Yf_TILED
>
> /*
> * Intel color control surface (CCS) for render compression
> @@ -320,8 +323,10 @@ extern "C" {
> * But that fact is not relevant unless the memory is accessed
> * directly.
> */
> -#define I915_FORMAT_MOD_Y_TILED_CCS fourcc_mod_code(INTEL, 4)
> -#define I915_FORMAT_MOD_Yf_TILED_CCS fourcc_mod_code(INTEL, 5)
> +#define DRM_FORMAT_MOD_INTEL_Y_TILED_CCS fourcc_mod_code(INTEL, 4)
> +#define I915_FORMAT_MOD_Y_TILED_CCS DRM_FORMAT_MOD_INTEL_Y_TILED_CCS
> +#define DRM_FORMAT_MOD_INTEL_Yf_TILED_CCS fourcc_mod_code(INTEL, 5)
> +#define I915_FORMAT_MOD_Yf_TILED_CCS DRM_FORMAT_MOD_INTEL_Yf_TILED_CCS
>
> /*
> * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks
> --
> Cheers,
> Eric
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2018-09-21 9:18 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2018-09-21 9:18 ` [PATCH 1/2] drm/fourcc: rename Intel " Daniel Vetter
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