* [PATCH] ARM: dts: Add support for Liebherr's BK4 device (vf610 based)
@ 2018-09-21 15:27 Lukasz Majewski
2018-09-21 22:30 ` Stefan Agner
` (3 more replies)
0 siblings, 4 replies; 20+ messages in thread
From: Lukasz Majewski @ 2018-09-21 15:27 UTC (permalink / raw)
To: Shawn Guo, Rob Herring, Mark Rutland
Cc: Sascha Hauer, devicetree, linux-kernel, linux-arm-kernel,
Pengutronix Kernel Team, Stefan Agner, Fabio Estevam,
Fabio Estevam, Lukasz Majewski
This commit adds DTS support for BK4 device from Liebherr. It
uses vf610 SoC from NXP.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/vf610-bk4.dts | 504 ++++++++++++++++++++++++++++++++++++++++
2 files changed, 505 insertions(+)
create mode 100644 arch/arm/boot/dts/vf610-bk4.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index b5bd3de87c33..e6f159895fa9 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -577,6 +577,7 @@ dtb-$(CONFIG_SOC_LS1021A) += \
ls1021a-twr.dtb
dtb-$(CONFIG_SOC_VF610) += \
vf500-colibri-eval-v3.dtb \
+ vf610-bk4.dtb \
vf610-colibri-eval-v3.dtb \
vf610m4-colibri.dtb \
vf610-cosmic.dtb \
diff --git a/arch/arm/boot/dts/vf610-bk4.dts b/arch/arm/boot/dts/vf610-bk4.dts
new file mode 100644
index 000000000000..4ad7e739a0ad
--- /dev/null
+++ b/arch/arm/boot/dts/vf610-bk4.dts
@@ -0,0 +1,504 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2018
+ * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
+ */
+
+/dts-v1/;
+#include "vf610.dtsi"
+
+/ {
+ model = "Liebherr BK4 controller";
+ compatible = "lwn,bk4", "fsl,vf610";
+
+ chosen {
+ bootargs = "console=ttyLP1,115200";
+ };
+
+ memory@80000000 {
+ reg = <0x80000000 0x8000000>;
+ };
+
+ audio_ext: mclk_osc {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24576000>;
+ };
+
+ enet_ext: eth_osc {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_leds>;
+
+ /* LED D5 */
+ led0: heartbeat {
+ label = "heartbeat";
+ gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ regulators {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg_3p3v: regulator@0 {
+ compatible = "regulator-fixed";
+ reg = <0>;
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ reg_vcc_3v3_mcu: regulator@1 {
+ compatible = "regulator-fixed";
+ reg = <1>;
+ regulator-name = "vcc_3v3_mcu";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+ };
+};
+
+&adc0 {
+ vref-supply = <®_vcc_3v3_mcu>;
+ status = "okay";
+};
+
+&adc1 {
+ vref-supply = <®_vcc_3v3_mcu>;
+ status = "okay";
+};
+
+&can0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_can0>;
+ status = "okay";
+};
+
+&can1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_can1>;
+ status = "okay";
+};
+
+&clks {
+ clocks = <&sxosc>, <&fxosc>, <&enet_ext>, <&audio_ext>;
+ clock-names = "sxosc", "fxosc", "enet_ext", "audio_ext";
+};
+
+&dspi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_dspi0>;
+ bus-num = <0>;
+ status = "okay";
+
+ spidev0@0 {
+ compatible = "fsl,vf610-dspi";
+ spi-max-frequency = <30000000>;
+ reg = <0>;
+ fsl,spi-cs-sck-delay = <200>;
+ fsl,spi-sck-cs-delay = <400>;
+ };
+};
+
+&dspi3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_dspi3>;
+ bus-num = <3>;
+ status = "okay";
+
+ spidev3@0 {
+ compatible = "fsl,vf610-dspi";
+ spi-max-frequency = <30000000>;
+ reg = <0>;
+ fsl,spi-slave-mode;
+ };
+};
+
+&edma0 {
+ status = "okay";
+};
+
+&edma1 {
+ status = "okay";
+};
+
+&esdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_esdhc1>;
+ bus-width = <4>;
+ cd-gpios = <&gpio3 2 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&fec0 {
+ phy-mode = "rmii";
+ phy-handle = <ðphy0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fec0>;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ethphy0: ethernet-phy@1 {
+ reg = <1>;
+ clocks = <&clks VF610_CLK_ENET_50M>;
+ clock-names = "rmii-ref";
+ };
+ };
+};
+
+&fec1 {
+ phy-mode = "rmii";
+ phy-handle = <ðphy1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fec1>;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ethphy1: ethernet-phy@1 {
+ reg = <1>;
+ clocks = <&clks VF610_CLK_ENET_50M>;
+ clock-names = "rmii-ref";
+ };
+ };
+};
+
+&i2c2 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+
+ eeprom: eeprom@50 {
+ compatible = "at24,24c256";
+ reg = <0x50>;
+ };
+
+ rtc: rtc@68 {
+ compatible = "stm,rv4162";
+ reg = <0x68>;
+ };
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_bk4_common>;
+
+ pinctrl_bk4_common: commongrp {
+ fsl,pins = <
+ /* One_Wire_PSU_EN */
+ VF610_PAD_PTC29__GPIO_102 0x1183
+ /* SPI */
+ VF610_PAD_PTB26__GPIO_96 0x1183
+ VF610_PAD_PTE14__GPIO_119 0x1183
+ VF610_PAD_PTE4__GPIO_109 0x1181
+ /* Feedback_Lines */
+ VF610_PAD_PTC31__GPIO_104 0x1181
+ VF610_PAD_PTA7__GPIO_134 0x1181
+ VF610_PAD_PTD9__GPIO_88 0x1181
+ VF610_PAD_PTE1__GPIO_106 0x1183
+ VF610_PAD_PTB2__GPIO_24 0x1181
+ VF610_PAD_PTB3__GPIO_25 0x1181
+ VF610_PAD_PTB1__GPIO_23 0x1181
+ /* SDHC */
+ VF610_PAD_PTE19__GPIO_124 0x1183
+ VF610_PAD_PTB23__GPIO_93 0x1181
+ /* GPI */
+ VF610_PAD_PTE2__GPIO_107 0x1181
+ VF610_PAD_PTE3__GPIO_108 0x1181
+ VF610_PAD_PTE5__GPIO_110 0x1181
+ VF610_PAD_PTE6__GPIO_111 0x1181
+ /* GPO */
+ VF610_PAD_PTE0__GPIO_105 0x1183
+ VF610_PAD_PTE7__GPIO_112 0x1183
+ /* RS485 */
+ VF610_PAD_PTB8__GPIO_30 0x1183
+ VF610_PAD_PTB9__GPIO_31 0x1183
+ VF610_PAD_PTE8__GPIO_113 0x1183
+ /* MPBUS MPB_EN */
+ VF610_PAD_PTE28__GPIO_133 0x1183
+ /* LEDS */
+ VF610_PAD_PTE15__GPIO_120 0x1183
+ VF610_PAD_PTA12__GPIO_5 0x1183
+ VF610_PAD_PTA16__GPIO_6 0x1183
+ VF610_PAD_PTE9__GPIO_114 0x1183
+ VF610_PAD_PTE20__GPIO_125 0x1183
+ VF610_PAD_PTE23__GPIO_128 0x1183
+ VF610_PAD_PTE16__GPIO_121 0x1183
+ /* MISC */
+ VF610_PAD_PTE10__GPIO_115 0x1183
+ VF610_PAD_PTE11__GPIO_116 0x1183
+ VF610_PAD_PTE17__GPIO_122 0x1183
+ VF610_PAD_PTC30__GPIO_103 0x1183
+ VF610_PAD_PTB0__GPIO_22 0x1181
+ /* RESETINFO */
+ VF610_PAD_PTE26__GPIO_131 0x1183
+ VF610_PAD_PTD6__GPIO_85 0x1181
+ VF610_PAD_PTE27__GPIO_132 0x1181
+ VF610_PAD_PTE13__GPIO_118 0x1181
+ VF610_PAD_PTE21__GPIO_126 0x1181
+ VF610_PAD_PTE22__GPIO_127 0x1181
+ /* EE_5V_EN */
+ VF610_PAD_PTE18__GPIO_123 0x1183
+ /* EE_5V_OC_N */
+ VF610_PAD_PTE25__GPIO_130 0x1181
+ >;
+ };
+
+ pinctrl_can0: can0grp {
+ fsl,pins = <
+ VF610_PAD_PTB14__CAN0_RX 0x1181
+ VF610_PAD_PTB15__CAN0_TX 0x1182
+ >;
+ };
+
+ pinctrl_can1: can1grp {
+ fsl,pins = <
+ VF610_PAD_PTB16__CAN1_RX 0x1181
+ VF610_PAD_PTB17__CAN1_TX 0x1182
+ >;
+ };
+
+ pinctrl_dspi0: dspi0grp {
+ fsl,pins = <
+ VF610_PAD_PTB18__DSPI0_CS1 0x1182
+ VF610_PAD_PTB19__DSPI0_CS0 0x1182
+ VF610_PAD_PTB20__DSPI0_SIN 0x1181
+ VF610_PAD_PTB21__DSPI0_SOUT 0x1182
+ VF610_PAD_PTB22__DSPI0_SCK 0x1182
+ >;
+ };
+
+ pinctrl_dspi3: dspi3grp {
+ fsl,pins = <
+ VF610_PAD_PTD10__DSPI3_CS0 0x1181
+ VF610_PAD_PTD11__DSPI3_SIN 0x1181
+ VF610_PAD_PTD12__DSPI3_SOUT 0x1182
+ VF610_PAD_PTD13__DSPI3_SCK 0x1181
+ >;
+ };
+
+ pinctrl_esdhc1: esdhc1grp {
+ fsl,pins = <
+ VF610_PAD_PTA24__ESDHC1_CLK 0x31ef
+ VF610_PAD_PTA25__ESDHC1_CMD 0x31ef
+ VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef
+ VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef
+ VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef
+ VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef
+ VF610_PAD_PTB28__GPIO_98 0x219d
+ >;
+ };
+
+ pinctrl_fec0: fec0grp {
+ fsl,pins = <
+ VF610_PAD_PTA6__RMII_CLKIN 0x30dd
+ VF610_PAD_PTC0__ENET_RMII0_MDC 0x30de
+ VF610_PAD_PTC1__ENET_RMII0_MDIO 0x30df
+ VF610_PAD_PTC2__ENET_RMII0_CRS 0x30dd
+ VF610_PAD_PTC3__ENET_RMII0_RXD1 0x30dd
+ VF610_PAD_PTC4__ENET_RMII0_RXD0 0x30dd
+ VF610_PAD_PTC5__ENET_RMII0_RXER 0x30dd
+ VF610_PAD_PTC6__ENET_RMII0_TXD1 0x30de
+ VF610_PAD_PTC7__ENET_RMII0_TXD0 0x30de
+ VF610_PAD_PTC8__ENET_RMII0_TXEN 0x30de
+ >;
+ };
+
+ pinctrl_fec1: fec1grp {
+ fsl,pins = <
+ VF610_PAD_PTC9__ENET_RMII1_MDC 0x30de
+ VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30df
+ VF610_PAD_PTC11__ENET_RMII1_CRS 0x30dd
+ VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30dd
+ VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30dd
+ VF610_PAD_PTC14__ENET_RMII1_RXER 0x30dd
+ VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30de
+ VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30de
+ VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30de
+ >;
+ };
+
+ pinctrl_gpio_leds: gpio_leds {
+ fsl,pins = <
+ VF610_PAD_PTE12__GPIO_117 0x1183
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ VF610_PAD_PTA22__I2C2_SCL 0x34df
+ VF610_PAD_PTA23__I2C2_SDA 0x34df
+ >;
+ };
+
+ pinctrl_nfc: nfcgrp {
+ fsl,pins = <
+ VF610_PAD_PTD23__NF_IO7 0x28df
+ VF610_PAD_PTD22__NF_IO6 0x28df
+ VF610_PAD_PTD21__NF_IO5 0x28df
+ VF610_PAD_PTD20__NF_IO4 0x28df
+ VF610_PAD_PTD19__NF_IO3 0x28df
+ VF610_PAD_PTD18__NF_IO2 0x28df
+ VF610_PAD_PTD17__NF_IO1 0x28df
+ VF610_PAD_PTD16__NF_IO0 0x28df
+ VF610_PAD_PTB24__NF_WE_B 0x28c2
+ VF610_PAD_PTB25__NF_CE0_B 0x28c2
+ VF610_PAD_PTB27__NF_RE_B 0x28c2
+ VF610_PAD_PTC26__NF_RB_B 0x283d
+ VF610_PAD_PTC27__NF_ALE 0x28c2
+ VF610_PAD_PTC28__NF_CLE 0x28c2
+ >;
+ };
+
+ pinctrl_uart0: uart0grp {
+ fsl,pins = <
+ VF610_PAD_PTB10__UART0_TX 0x21a2
+ VF610_PAD_PTB11__UART0_RX 0x21a1
+ >;
+ };
+
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ VF610_PAD_PTB4__UART1_TX 0x21a2
+ VF610_PAD_PTB5__UART1_RX 0x21a1
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ VF610_PAD_PTB6__UART2_TX 0x21a2
+ VF610_PAD_PTB7__UART2_RX 0x21a1
+ >;
+ };
+
+ pinctrl_uart3: uart3grp {
+ fsl,pins = <
+ VF610_PAD_PTA20__UART3_TX 0x21a2
+ VF610_PAD_PTA21__UART3_RX 0x21a1
+ >;
+ };
+
+ pinctrl_qspi0: qspi0grp {
+ fsl,pins = <
+ VF610_PAD_PTD0__QSPI0_A_QSCK 0x397f
+ VF610_PAD_PTD1__QSPI0_A_CS0 0x397f
+ VF610_PAD_PTD2__QSPI0_A_DATA3 0x397f
+ VF610_PAD_PTD3__QSPI0_A_DATA2 0x397f
+ VF610_PAD_PTD4__QSPI0_A_DATA1 0x397f
+ VF610_PAD_PTD5__QSPI0_A_DATA0 0x397f
+ VF610_PAD_PTD7__QSPI0_B_QSCK 0x397f
+ VF610_PAD_PTD8__QSPI0_B_CS0 0x397f
+ VF610_PAD_PTD11__QSPI0_B_DATA1 0x397f
+ VF610_PAD_PTD12__QSPI0_B_DATA0 0x397f
+ >;
+ };
+};
+
+&nfc {
+ assigned-clocks = <&clks VF610_CLK_NFC>;
+ assigned-clock-rates = <33000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_nfc>;
+ status = "okay";
+
+ nand@0 {
+ compatible = "fsl,vf610-nfc-nandcs";
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ nand-bus-width = <16>;
+ nand-ecc-mode = "hw";
+ nand-ecc-strength = <24>;
+ nand-ecc-step-size = <2048>;
+ nand-on-flash-bbt;
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart0>;
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ status = "okay";
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+ status = "okay";
+};
+
+&usbdev0 {
+ disable-over-current;
+ status = "okay";
+};
+
+&usbh1 {
+ disable-over-current;
+ status = "okay";
+};
+
+&usbmisc0 {
+ status = "okay";
+};
+
+&usbmisc1 {
+ status = "okay";
+};
+
+&usbphy0 {
+ status = "okay";
+};
+
+&usbphy1 {
+ status = "okay";
+};
+
+&qspi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_qspi0>;
+ status = "okay";
+
+ flash0: n25q128a13@0 {
+ compatible = "n25q128a13", "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <66000000>;
+ spi-rx-bus-width = <4>;
+ reg = <0>;
+ };
+
+ flash1: n25q128a13@1 {
+ compatible = "n25q128a13", "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <66000000>;
+ spi-rx-bus-width = <2>;
+ reg = <1>;
+ };
+};
--
2.11.0
^ permalink raw reply related [flat|nested] 20+ messages in thread
* Re: [PATCH] ARM: dts: Add support for Liebherr's BK4 device (vf610 based)
2018-09-21 15:27 [PATCH] ARM: dts: Add support for Liebherr's BK4 device (vf610 based) Lukasz Majewski
@ 2018-09-21 22:30 ` Stefan Agner
2018-09-22 12:41 ` Lukasz Majewski
2018-09-23 14:32 ` Fabio Estevam
` (2 subsequent siblings)
3 siblings, 1 reply; 20+ messages in thread
From: Stefan Agner @ 2018-09-21 22:30 UTC (permalink / raw)
To: Lukasz Majewski
Cc: Shawn Guo, Rob Herring, Mark Rutland, Sascha Hauer, devicetree,
linux-kernel, linux-arm-kernel, Pengutronix Kernel Team,
Fabio Estevam, Fabio Estevam
On 21.09.2018 08:27, Lukasz Majewski wrote:
> This commit adds DTS support for BK4 device from Liebherr. It
> uses vf610 SoC from NXP.
>
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> ---
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/vf610-bk4.dts | 504 ++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 505 insertions(+)
> create mode 100644 arch/arm/boot/dts/vf610-bk4.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index b5bd3de87c33..e6f159895fa9 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -577,6 +577,7 @@ dtb-$(CONFIG_SOC_LS1021A) += \
> ls1021a-twr.dtb
> dtb-$(CONFIG_SOC_VF610) += \
> vf500-colibri-eval-v3.dtb \
> + vf610-bk4.dtb \
> vf610-colibri-eval-v3.dtb \
> vf610m4-colibri.dtb \
> vf610-cosmic.dtb \
> diff --git a/arch/arm/boot/dts/vf610-bk4.dts b/arch/arm/boot/dts/vf610-bk4.dts
> new file mode 100644
> index 000000000000..4ad7e739a0ad
> --- /dev/null
> +++ b/arch/arm/boot/dts/vf610-bk4.dts
> @@ -0,0 +1,504 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright 2018
> + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
> + */
> +
> +/dts-v1/;
> +#include "vf610.dtsi"
> +
> +/ {
> + model = "Liebherr BK4 controller";
> + compatible = "lwn,bk4", "fsl,vf610";
> +
> + chosen {
> + bootargs = "console=ttyLP1,115200";
> + };
> +
> + memory@80000000 {
> + reg = <0x80000000 0x8000000>;
> + };
> +
> + audio_ext: mclk_osc {
Node name should be somewhat generic. I know its the same in twr board,
we probably should fix it there. The device tree spec has some
recommendation, I would suggest using just "oscillator-audio".
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <24576000>;
> + };
> +
> + enet_ext: eth_osc {
Same here, oscillator-ethernet maybe.
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <50000000>;
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_gpio_leds>;
> +
> + /* LED D5 */
> + led0: heartbeat {
> + label = "heartbeat";
> + gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
> + default-state = "on";
> + linux,default-trigger = "heartbeat";
> + };
> + };
> +
> + regulators {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <0>;
We stopped using a regulator subnode. Just move the regulators to the
top and use unique names such as "regulator-3p3v".
> +
> + reg_3p3v: regulator@0 {
> + compatible = "regulator-fixed";
> + reg = <0>;
> + regulator-name = "3P3V";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> +
> + reg_vcc_3v3_mcu: regulator@1 {
> + compatible = "regulator-fixed";
> + reg = <1>;
> + regulator-name = "vcc_3v3_mcu";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + };
> + };
> +};
> +
> +&adc0 {
> + vref-supply = <®_vcc_3v3_mcu>;
> + status = "okay";
> +};
> +
> +&adc1 {
> + vref-supply = <®_vcc_3v3_mcu>;
> + status = "okay";
> +};
> +
> +&can0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_can0>;
> + status = "okay";
> +};
> +
> +&can1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_can1>;
> + status = "okay";
> +};
> +
> +&clks {
> + clocks = <&sxosc>, <&fxosc>, <&enet_ext>, <&audio_ext>;
> + clock-names = "sxosc", "fxosc", "enet_ext", "audio_ext";
> +};
> +
> +&dspi0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_dspi0>;
> + bus-num = <0>;
> + status = "okay";
> +
> + spidev0@0 {
> + compatible = "fsl,vf610-dspi";
I don't think this is right. A subnode of the dspi controller should use
a device tree binding of SPI device. What is connected to that SPI in
your case?
> + spi-max-frequency = <30000000>;
> + reg = <0>;
> + fsl,spi-cs-sck-delay = <200>;
> + fsl,spi-sck-cs-delay = <400>;
> + };
> +};
> +
> +&dspi3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_dspi3>;
> + bus-num = <3>;
> + status = "okay";
> +
> + spidev3@0 {
> + compatible = "fsl,vf610-dspi";
Same here...
> + spi-max-frequency = <30000000>;
> + reg = <0>;
> + fsl,spi-slave-mode;
> + };
> +};
> +
> +&edma0 {
> + status = "okay";
> +};
> +
> +&edma1 {
> + status = "okay";
> +};
> +
> +&esdhc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_esdhc1>;
> + bus-width = <4>;
> + cd-gpios = <&gpio3 2 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +};
> +
> +&fec0 {
> + phy-mode = "rmii";
> + phy-handle = <ðphy0>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_fec0>;
> + status = "okay";
> +
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + ethphy0: ethernet-phy@1 {
> + reg = <1>;
> + clocks = <&clks VF610_CLK_ENET_50M>;
> + clock-names = "rmii-ref";
> + };
> + };
> +};
> +
> +&fec1 {
> + phy-mode = "rmii";
> + phy-handle = <ðphy1>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_fec1>;
> + status = "okay";
> +
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + ethphy1: ethernet-phy@1 {
> + reg = <1>;
> + clocks = <&clks VF610_CLK_ENET_50M>;
> + clock-names = "rmii-ref";
> + };
> + };
> +};
> +
> +&i2c2 {
> + clock-frequency = <400000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2>;
> + status = "okay";
> +
> + eeprom: eeprom@50 {
> + compatible = "at24,24c256";
> + reg = <0x50>;
> + };
> +
> + rtc: rtc@68 {
> + compatible = "stm,rv4162";
> + reg = <0x68>;
> + };
> +};
> +
> +&iomuxc {
This node should go to the very end since it is so large..
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_bk4_common>;
> +
> + pinctrl_bk4_common: commongrp {
Are those pins all controlled from user space? If they are controlled by
a particular kernel driver, you should add those pins to the pinctrl
node assigned to the particular device tree node.
--
Stefan
> + fsl,pins = <
> + /* One_Wire_PSU_EN */
> + VF610_PAD_PTC29__GPIO_102 0x1183
> + /* SPI */
> + VF610_PAD_PTB26__GPIO_96 0x1183
> + VF610_PAD_PTE14__GPIO_119 0x1183
> + VF610_PAD_PTE4__GPIO_109 0x1181
> + /* Feedback_Lines */
> + VF610_PAD_PTC31__GPIO_104 0x1181
> + VF610_PAD_PTA7__GPIO_134 0x1181
> + VF610_PAD_PTD9__GPIO_88 0x1181
> + VF610_PAD_PTE1__GPIO_106 0x1183
> + VF610_PAD_PTB2__GPIO_24 0x1181
> + VF610_PAD_PTB3__GPIO_25 0x1181
> + VF610_PAD_PTB1__GPIO_23 0x1181
> + /* SDHC */
> + VF610_PAD_PTE19__GPIO_124 0x1183
> + VF610_PAD_PTB23__GPIO_93 0x1181
> + /* GPI */
> + VF610_PAD_PTE2__GPIO_107 0x1181
> + VF610_PAD_PTE3__GPIO_108 0x1181
> + VF610_PAD_PTE5__GPIO_110 0x1181
> + VF610_PAD_PTE6__GPIO_111 0x1181
> + /* GPO */
> + VF610_PAD_PTE0__GPIO_105 0x1183
> + VF610_PAD_PTE7__GPIO_112 0x1183
> + /* RS485 */
> + VF610_PAD_PTB8__GPIO_30 0x1183
> + VF610_PAD_PTB9__GPIO_31 0x1183
> + VF610_PAD_PTE8__GPIO_113 0x1183
> + /* MPBUS MPB_EN */
> + VF610_PAD_PTE28__GPIO_133 0x1183
> + /* LEDS */
> + VF610_PAD_PTE15__GPIO_120 0x1183
> + VF610_PAD_PTA12__GPIO_5 0x1183
> + VF610_PAD_PTA16__GPIO_6 0x1183
> + VF610_PAD_PTE9__GPIO_114 0x1183
> + VF610_PAD_PTE20__GPIO_125 0x1183
> + VF610_PAD_PTE23__GPIO_128 0x1183
> + VF610_PAD_PTE16__GPIO_121 0x1183
> + /* MISC */
> + VF610_PAD_PTE10__GPIO_115 0x1183
> + VF610_PAD_PTE11__GPIO_116 0x1183
> + VF610_PAD_PTE17__GPIO_122 0x1183
> + VF610_PAD_PTC30__GPIO_103 0x1183
> + VF610_PAD_PTB0__GPIO_22 0x1181
> + /* RESETINFO */
> + VF610_PAD_PTE26__GPIO_131 0x1183
> + VF610_PAD_PTD6__GPIO_85 0x1181
> + VF610_PAD_PTE27__GPIO_132 0x1181
> + VF610_PAD_PTE13__GPIO_118 0x1181
> + VF610_PAD_PTE21__GPIO_126 0x1181
> + VF610_PAD_PTE22__GPIO_127 0x1181
> + /* EE_5V_EN */
> + VF610_PAD_PTE18__GPIO_123 0x1183
> + /* EE_5V_OC_N */
> + VF610_PAD_PTE25__GPIO_130 0x1181
> + >;
> + };
> +
> + pinctrl_can0: can0grp {
> + fsl,pins = <
> + VF610_PAD_PTB14__CAN0_RX 0x1181
> + VF610_PAD_PTB15__CAN0_TX 0x1182
> + >;
> + };
> +
> + pinctrl_can1: can1grp {
> + fsl,pins = <
> + VF610_PAD_PTB16__CAN1_RX 0x1181
> + VF610_PAD_PTB17__CAN1_TX 0x1182
> + >;
> + };
> +
> + pinctrl_dspi0: dspi0grp {
> + fsl,pins = <
> + VF610_PAD_PTB18__DSPI0_CS1 0x1182
> + VF610_PAD_PTB19__DSPI0_CS0 0x1182
> + VF610_PAD_PTB20__DSPI0_SIN 0x1181
> + VF610_PAD_PTB21__DSPI0_SOUT 0x1182
> + VF610_PAD_PTB22__DSPI0_SCK 0x1182
> + >;
> + };
> +
> + pinctrl_dspi3: dspi3grp {
> + fsl,pins = <
> + VF610_PAD_PTD10__DSPI3_CS0 0x1181
> + VF610_PAD_PTD11__DSPI3_SIN 0x1181
> + VF610_PAD_PTD12__DSPI3_SOUT 0x1182
> + VF610_PAD_PTD13__DSPI3_SCK 0x1181
> + >;
> + };
> +
> + pinctrl_esdhc1: esdhc1grp {
> + fsl,pins = <
> + VF610_PAD_PTA24__ESDHC1_CLK 0x31ef
> + VF610_PAD_PTA25__ESDHC1_CMD 0x31ef
> + VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef
> + VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef
> + VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef
> + VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef
> + VF610_PAD_PTB28__GPIO_98 0x219d
> + >;
> + };
> +
> + pinctrl_fec0: fec0grp {
> + fsl,pins = <
> + VF610_PAD_PTA6__RMII_CLKIN 0x30dd
> + VF610_PAD_PTC0__ENET_RMII0_MDC 0x30de
> + VF610_PAD_PTC1__ENET_RMII0_MDIO 0x30df
> + VF610_PAD_PTC2__ENET_RMII0_CRS 0x30dd
> + VF610_PAD_PTC3__ENET_RMII0_RXD1 0x30dd
> + VF610_PAD_PTC4__ENET_RMII0_RXD0 0x30dd
> + VF610_PAD_PTC5__ENET_RMII0_RXER 0x30dd
> + VF610_PAD_PTC6__ENET_RMII0_TXD1 0x30de
> + VF610_PAD_PTC7__ENET_RMII0_TXD0 0x30de
> + VF610_PAD_PTC8__ENET_RMII0_TXEN 0x30de
> + >;
> + };
> +
> + pinctrl_fec1: fec1grp {
> + fsl,pins = <
> + VF610_PAD_PTC9__ENET_RMII1_MDC 0x30de
> + VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30df
> + VF610_PAD_PTC11__ENET_RMII1_CRS 0x30dd
> + VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30dd
> + VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30dd
> + VF610_PAD_PTC14__ENET_RMII1_RXER 0x30dd
> + VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30de
> + VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30de
> + VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30de
> + >;
> + };
> +
> + pinctrl_gpio_leds: gpio_leds {
> + fsl,pins = <
> + VF610_PAD_PTE12__GPIO_117 0x1183
> + >;
> + };
> +
> + pinctrl_i2c2: i2c2grp {
> + fsl,pins = <
> + VF610_PAD_PTA22__I2C2_SCL 0x34df
> + VF610_PAD_PTA23__I2C2_SDA 0x34df
> + >;
> + };
> +
> + pinctrl_nfc: nfcgrp {
> + fsl,pins = <
> + VF610_PAD_PTD23__NF_IO7 0x28df
> + VF610_PAD_PTD22__NF_IO6 0x28df
> + VF610_PAD_PTD21__NF_IO5 0x28df
> + VF610_PAD_PTD20__NF_IO4 0x28df
> + VF610_PAD_PTD19__NF_IO3 0x28df
> + VF610_PAD_PTD18__NF_IO2 0x28df
> + VF610_PAD_PTD17__NF_IO1 0x28df
> + VF610_PAD_PTD16__NF_IO0 0x28df
> + VF610_PAD_PTB24__NF_WE_B 0x28c2
> + VF610_PAD_PTB25__NF_CE0_B 0x28c2
> + VF610_PAD_PTB27__NF_RE_B 0x28c2
> + VF610_PAD_PTC26__NF_RB_B 0x283d
> + VF610_PAD_PTC27__NF_ALE 0x28c2
> + VF610_PAD_PTC28__NF_CLE 0x28c2
> + >;
> + };
> +
> + pinctrl_uart0: uart0grp {
> + fsl,pins = <
> + VF610_PAD_PTB10__UART0_TX 0x21a2
> + VF610_PAD_PTB11__UART0_RX 0x21a1
> + >;
> + };
> +
> + pinctrl_uart1: uart1grp {
> + fsl,pins = <
> + VF610_PAD_PTB4__UART1_TX 0x21a2
> + VF610_PAD_PTB5__UART1_RX 0x21a1
> + >;
> + };
> +
> + pinctrl_uart2: uart2grp {
> + fsl,pins = <
> + VF610_PAD_PTB6__UART2_TX 0x21a2
> + VF610_PAD_PTB7__UART2_RX 0x21a1
> + >;
> + };
> +
> + pinctrl_uart3: uart3grp {
> + fsl,pins = <
> + VF610_PAD_PTA20__UART3_TX 0x21a2
> + VF610_PAD_PTA21__UART3_RX 0x21a1
> + >;
> + };
> +
> + pinctrl_qspi0: qspi0grp {
> + fsl,pins = <
> + VF610_PAD_PTD0__QSPI0_A_QSCK 0x397f
> + VF610_PAD_PTD1__QSPI0_A_CS0 0x397f
> + VF610_PAD_PTD2__QSPI0_A_DATA3 0x397f
> + VF610_PAD_PTD3__QSPI0_A_DATA2 0x397f
> + VF610_PAD_PTD4__QSPI0_A_DATA1 0x397f
> + VF610_PAD_PTD5__QSPI0_A_DATA0 0x397f
> + VF610_PAD_PTD7__QSPI0_B_QSCK 0x397f
> + VF610_PAD_PTD8__QSPI0_B_CS0 0x397f
> + VF610_PAD_PTD11__QSPI0_B_DATA1 0x397f
> + VF610_PAD_PTD12__QSPI0_B_DATA0 0x397f
> + >;
> + };
> +};
> +
> +&nfc {
> + assigned-clocks = <&clks VF610_CLK_NFC>;
> + assigned-clock-rates = <33000000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_nfc>;
> + status = "okay";
> +
> + nand@0 {
> + compatible = "fsl,vf610-nfc-nandcs";
> + reg = <0>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + nand-bus-width = <16>;
> + nand-ecc-mode = "hw";
> + nand-ecc-strength = <24>;
> + nand-ecc-step-size = <2048>;
> + nand-on-flash-bbt;
> + };
> +};
> +
> +&uart0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart0>;
> + status = "okay";
> +};
> +
> +&uart1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart1>;
> + status = "okay";
> +};
> +
> +&uart2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart2>;
> + status = "okay";
> +};
> +
> +&uart3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart3>;
> + status = "okay";
> +};
> +
> +&usbdev0 {
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usbh1 {
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usbmisc0 {
> + status = "okay";
> +};
> +
> +&usbmisc1 {
> + status = "okay";
> +};
> +
> +&usbphy0 {
> + status = "okay";
> +};
> +
> +&usbphy1 {
> + status = "okay";
> +};
> +
> +&qspi0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_qspi0>;
> + status = "okay";
> +
> + flash0: n25q128a13@0 {
> + compatible = "n25q128a13", "jedec,spi-nor";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + spi-max-frequency = <66000000>;
> + spi-rx-bus-width = <4>;
> + reg = <0>;
> + };
> +
> + flash1: n25q128a13@1 {
> + compatible = "n25q128a13", "jedec,spi-nor";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + spi-max-frequency = <66000000>;
> + spi-rx-bus-width = <2>;
> + reg = <1>;
> + };
> +};
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH] ARM: dts: Add support for Liebherr's BK4 device (vf610 based)
2018-09-21 22:30 ` Stefan Agner
@ 2018-09-22 12:41 ` Lukasz Majewski
0 siblings, 0 replies; 20+ messages in thread
From: Lukasz Majewski @ 2018-09-22 12:41 UTC (permalink / raw)
To: Stefan Agner
Cc: Shawn Guo, Rob Herring, Mark Rutland, Sascha Hauer, devicetree,
linux-kernel, linux-arm-kernel, Pengutronix Kernel Team,
Fabio Estevam, Fabio Estevam
[-- Attachment #1: Type: text/plain, Size: 17083 bytes --]
Hi Stefan,
Thanks for review,
> On 21.09.2018 08:27, Lukasz Majewski wrote:
> > This commit adds DTS support for BK4 device from Liebherr. It
> > uses vf610 SoC from NXP.
> >
> > Signed-off-by: Lukasz Majewski <lukma@denx.de>
> > ---
> > arch/arm/boot/dts/Makefile | 1 +
> > arch/arm/boot/dts/vf610-bk4.dts | 504
> > ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 505
> > insertions(+) create mode 100644 arch/arm/boot/dts/vf610-bk4.dts
> >
> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > index b5bd3de87c33..e6f159895fa9 100644
> > --- a/arch/arm/boot/dts/Makefile
> > +++ b/arch/arm/boot/dts/Makefile
> > @@ -577,6 +577,7 @@ dtb-$(CONFIG_SOC_LS1021A) += \
> > ls1021a-twr.dtb
> > dtb-$(CONFIG_SOC_VF610) += \
> > vf500-colibri-eval-v3.dtb \
> > + vf610-bk4.dtb \
> > vf610-colibri-eval-v3.dtb \
> > vf610m4-colibri.dtb \
> > vf610-cosmic.dtb \
> > diff --git a/arch/arm/boot/dts/vf610-bk4.dts
> > b/arch/arm/boot/dts/vf610-bk4.dts new file mode 100644
> > index 000000000000..4ad7e739a0ad
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/vf610-bk4.dts
> > @@ -0,0 +1,504 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +/*
> > + * Copyright 2018
> > + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
> > + */
> > +
> > +/dts-v1/;
> > +#include "vf610.dtsi"
> > +
> > +/ {
> > + model = "Liebherr BK4 controller";
> > + compatible = "lwn,bk4", "fsl,vf610";
> > +
> > + chosen {
> > + bootargs = "console=ttyLP1,115200";
> > + };
> > +
> > + memory@80000000 {
> > + reg = <0x80000000 0x8000000>;
> > + };
> > +
> > + audio_ext: mclk_osc {
>
> Node name should be somewhat generic. I know its the same in twr
> board, we probably should fix it there. The device tree spec has some
> recommendation, I would suggest using just "oscillator-audio".
So it shall be audio_ext: oscillator-audio { ...
>
> > + compatible = "fixed-clock";
> > + #clock-cells = <0>;
> > + clock-frequency = <24576000>;
> > + };
> > +
> > + enet_ext: eth_osc {
>
> Same here, oscillator-ethernet maybe.
Ok - enet_ext: oscillator-ethernet { ...
>
>
> > + compatible = "fixed-clock";
> > + #clock-cells = <0>;
> > + clock-frequency = <50000000>;
> > + };
> > +
> > + leds {
> > + compatible = "gpio-leds";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_gpio_leds>;
> > +
> > + /* LED D5 */
> > + led0: heartbeat {
> > + label = "heartbeat";
> > + gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
> > + default-state = "on";
> > + linux,default-trigger = "heartbeat";
> > + };
> > + };
> > +
> > + regulators {
> > + compatible = "simple-bus";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
>
> We stopped using a regulator subnode. Just move the regulators to the
> top and use unique names such as "regulator-3p3v".
Ok.
>
> > +
> > + reg_3p3v: regulator@0 {
> > + compatible = "regulator-fixed";
> > + reg = <0>;
> > + regulator-name = "3P3V";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + regulator-always-on;
> > + };
> > +
> > + reg_vcc_3v3_mcu: regulator@1 {
> > + compatible = "regulator-fixed";
> > + reg = <1>;
> > + regulator-name = "vcc_3v3_mcu";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + };
> > + };
> > +};
> > +
> > +&adc0 {
> > + vref-supply = <®_vcc_3v3_mcu>;
> > + status = "okay";
> > +};
> > +
> > +&adc1 {
> > + vref-supply = <®_vcc_3v3_mcu>;
> > + status = "okay";
> > +};
> > +
> > +&can0 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_can0>;
> > + status = "okay";
> > +};
> > +
> > +&can1 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_can1>;
> > + status = "okay";
> > +};
> > +
> > +&clks {
> > + clocks = <&sxosc>, <&fxosc>, <&enet_ext>, <&audio_ext>;
> > + clock-names = "sxosc", "fxosc", "enet_ext", "audio_ext";
> > +};
> > +
> > +&dspi0 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_dspi0>;
> > + bus-num = <0>;
> > + status = "okay";
> > +
> > + spidev0@0 {
> > + compatible = "fsl,vf610-dspi";
>
> I don't think this is right. A subnode of the dspi controller should
> use a device tree binding of SPI device. What is connected to that
> SPI in your case?
The dspi IP block provides SPI communication with variety of devices
(connected via external cable).
From SW point of view, the spidev driver is used. User space program(s)
via the /dev/spidevX.Y device communicate with connected HW.
I would need "just" to add:
+ { .compatible = "fsl,vf610-dspi" },
in drivers/spi/spidev.c
I'm wondering what is the actual policy - such "adjustments" are in the
end very board specific.
>
> > + spi-max-frequency = <30000000>;
> > + reg = <0>;
> > + fsl,spi-cs-sck-delay = <200>;
> > + fsl,spi-sck-cs-delay = <400>;
> > + };
> > +};
> > +
> > +&dspi3 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_dspi3>;
> > + bus-num = <3>;
> > + status = "okay";
> > +
> > + spidev3@0 {
> > + compatible = "fsl,vf610-dspi";
>
> Same here...
>
> > + spi-max-frequency = <30000000>;
> > + reg = <0>;
> > + fsl,spi-slave-mode;
> > + };
> > +};
> > +
> > +&edma0 {
> > + status = "okay";
> > +};
> > +
> > +&edma1 {
> > + status = "okay";
> > +};
> > +
> > +&esdhc1 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_esdhc1>;
> > + bus-width = <4>;
> > + cd-gpios = <&gpio3 2 GPIO_ACTIVE_LOW>;
> > + status = "okay";
> > +};
> > +
> > +&fec0 {
> > + phy-mode = "rmii";
> > + phy-handle = <ðphy0>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_fec0>;
> > + status = "okay";
> > +
> > + mdio {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + ethphy0: ethernet-phy@1 {
> > + reg = <1>;
> > + clocks = <&clks VF610_CLK_ENET_50M>;
> > + clock-names = "rmii-ref";
> > + };
> > + };
> > +};
> > +
> > +&fec1 {
> > + phy-mode = "rmii";
> > + phy-handle = <ðphy1>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_fec1>;
> > + status = "okay";
> > +
> > + mdio {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + ethphy1: ethernet-phy@1 {
> > + reg = <1>;
> > + clocks = <&clks VF610_CLK_ENET_50M>;
> > + clock-names = "rmii-ref";
> > + };
> > + };
> > +};
> > +
> > +&i2c2 {
> > + clock-frequency = <400000>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_i2c2>;
> > + status = "okay";
> > +
> > + eeprom: eeprom@50 {
> > + compatible = "at24,24c256";
> > + reg = <0x50>;
> > + };
> > +
> > + rtc: rtc@68 {
> > + compatible = "stm,rv4162";
> > + reg = <0x68>;
> > + };
> > +};
> > +
> > +&iomuxc {
>
> This node should go to the very end since it is so large..
I'm not sure - last time I've submitted DTS for imx6q board the
maintainer required to make it _all_ alphabetically sorted.
(I haven't heard about the rule to put some node to the end of file
because of its size).
>
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_bk4_common>;
> > +
> > + pinctrl_bk4_common: commongrp {
>
> Are those pins all controlled from user space?
Yes, they are used by user space programs.
> If they are controlled
> by a particular kernel driver, you should add those pins to the
> pinctrl node assigned to the particular device tree node.
Yes, I'm aware of that.
>
> --
> Stefan
>
> > + fsl,pins = <
> > + /* One_Wire_PSU_EN */
> > + VF610_PAD_PTC29__GPIO_102
> > 0x1183
> > + /* SPI */
> > + VF610_PAD_PTB26__GPIO_96
> > 0x1183
> > + VF610_PAD_PTE14__GPIO_119
> > 0x1183
> > + VF610_PAD_PTE4__GPIO_109
> > 0x1181
> > + /* Feedback_Lines */
> > + VF610_PAD_PTC31__GPIO_104
> > 0x1181
> > + VF610_PAD_PTA7__GPIO_134
> > 0x1181
> > + VF610_PAD_PTD9__GPIO_88
> > 0x1181
> > + VF610_PAD_PTE1__GPIO_106
> > 0x1183
> > + VF610_PAD_PTB2__GPIO_24
> > 0x1181
> > + VF610_PAD_PTB3__GPIO_25
> > 0x1181
> > + VF610_PAD_PTB1__GPIO_23
> > 0x1181
> > + /* SDHC */
> > + VF610_PAD_PTE19__GPIO_124
> > 0x1183
> > + VF610_PAD_PTB23__GPIO_93
> > 0x1181
> > + /* GPI */
> > + VF610_PAD_PTE2__GPIO_107
> > 0x1181
> > + VF610_PAD_PTE3__GPIO_108
> > 0x1181
> > + VF610_PAD_PTE5__GPIO_110
> > 0x1181
> > + VF610_PAD_PTE6__GPIO_111
> > 0x1181
> > + /* GPO */
> > + VF610_PAD_PTE0__GPIO_105
> > 0x1183
> > + VF610_PAD_PTE7__GPIO_112
> > 0x1183
> > + /* RS485 */
> > + VF610_PAD_PTB8__GPIO_30
> > 0x1183
> > + VF610_PAD_PTB9__GPIO_31
> > 0x1183
> > + VF610_PAD_PTE8__GPIO_113
> > 0x1183
> > + /* MPBUS MPB_EN */
> > + VF610_PAD_PTE28__GPIO_133
> > 0x1183
> > + /* LEDS */
> > + VF610_PAD_PTE15__GPIO_120
> > 0x1183
> > + VF610_PAD_PTA12__GPIO_5
> > 0x1183
> > + VF610_PAD_PTA16__GPIO_6
> > 0x1183
> > + VF610_PAD_PTE9__GPIO_114
> > 0x1183
> > + VF610_PAD_PTE20__GPIO_125
> > 0x1183
> > + VF610_PAD_PTE23__GPIO_128
> > 0x1183
> > + VF610_PAD_PTE16__GPIO_121
> > 0x1183
> > + /* MISC */
> > + VF610_PAD_PTE10__GPIO_115
> > 0x1183
> > + VF610_PAD_PTE11__GPIO_116
> > 0x1183
> > + VF610_PAD_PTE17__GPIO_122
> > 0x1183
> > + VF610_PAD_PTC30__GPIO_103
> > 0x1183
> > + VF610_PAD_PTB0__GPIO_22
> > 0x1181
> > + /* RESETINFO */
> > + VF610_PAD_PTE26__GPIO_131
> > 0x1183
> > + VF610_PAD_PTD6__GPIO_85
> > 0x1181
> > + VF610_PAD_PTE27__GPIO_132
> > 0x1181
> > + VF610_PAD_PTE13__GPIO_118
> > 0x1181
> > + VF610_PAD_PTE21__GPIO_126
> > 0x1181
> > + VF610_PAD_PTE22__GPIO_127
> > 0x1181
> > + /* EE_5V_EN */
> > + VF610_PAD_PTE18__GPIO_123
> > 0x1183
> > + /* EE_5V_OC_N */
> > + VF610_PAD_PTE25__GPIO_130
> > 0x1181
> > + >;
> > + };
> > +
> > + pinctrl_can0: can0grp {
> > + fsl,pins = <
> > + VF610_PAD_PTB14__CAN0_RX
> > 0x1181
> > + VF610_PAD_PTB15__CAN0_TX
> > 0x1182
> > + >;
> > + };
> > +
> > + pinctrl_can1: can1grp {
> > + fsl,pins = <
> > + VF610_PAD_PTB16__CAN1_RX
> > 0x1181
> > + VF610_PAD_PTB17__CAN1_TX
> > 0x1182
> > + >;
> > + };
> > +
> > + pinctrl_dspi0: dspi0grp {
> > + fsl,pins = <
> > + VF610_PAD_PTB18__DSPI0_CS1
> > 0x1182
> > + VF610_PAD_PTB19__DSPI0_CS0
> > 0x1182
> > + VF610_PAD_PTB20__DSPI0_SIN
> > 0x1181
> > + VF610_PAD_PTB21__DSPI0_SOUT
> > 0x1182
> > + VF610_PAD_PTB22__DSPI0_SCK
> > 0x1182
> > + >;
> > + };
> > +
> > + pinctrl_dspi3: dspi3grp {
> > + fsl,pins = <
> > + VF610_PAD_PTD10__DSPI3_CS0
> > 0x1181
> > + VF610_PAD_PTD11__DSPI3_SIN
> > 0x1181
> > + VF610_PAD_PTD12__DSPI3_SOUT
> > 0x1182
> > + VF610_PAD_PTD13__DSPI3_SCK
> > 0x1181
> > + >;
> > + };
> > +
> > + pinctrl_esdhc1: esdhc1grp {
> > + fsl,pins = <
> > + VF610_PAD_PTA24__ESDHC1_CLK
> > 0x31ef
> > + VF610_PAD_PTA25__ESDHC1_CMD
> > 0x31ef
> > +
> > VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef
> > +
> > VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef
> > +
> > VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef
> > +
> > VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef
> > + VF610_PAD_PTB28__GPIO_98
> > 0x219d
> > + >;
> > + };
> > +
> > + pinctrl_fec0: fec0grp {
> > + fsl,pins = <
> > + VF610_PAD_PTA6__RMII_CLKIN
> > 0x30dd
> > +
> > VF610_PAD_PTC0__ENET_RMII0_MDC 0x30de
> > + VF610_PAD_PTC1__ENET_RMII0_MDIO
> > 0x30df
> > +
> > VF610_PAD_PTC2__ENET_RMII0_CRS 0x30dd
> > + VF610_PAD_PTC3__ENET_RMII0_RXD1
> > 0x30dd
> > + VF610_PAD_PTC4__ENET_RMII0_RXD0
> > 0x30dd
> > + VF610_PAD_PTC5__ENET_RMII0_RXER
> > 0x30dd
> > + VF610_PAD_PTC6__ENET_RMII0_TXD1
> > 0x30de
> > + VF610_PAD_PTC7__ENET_RMII0_TXD0
> > 0x30de
> > + VF610_PAD_PTC8__ENET_RMII0_TXEN
> > 0x30de
> > + >;
> > + };
> > +
> > + pinctrl_fec1: fec1grp {
> > + fsl,pins = <
> > +
> > VF610_PAD_PTC9__ENET_RMII1_MDC 0x30de
> > + VF610_PAD_PTC10__ENET_RMII1_MDIO
> > 0x30df
> > + VF610_PAD_PTC11__ENET_RMII1_CRS
> > 0x30dd
> > + VF610_PAD_PTC12__ENET_RMII1_RXD1
> > 0x30dd
> > + VF610_PAD_PTC13__ENET_RMII1_RXD0
> > 0x30dd
> > + VF610_PAD_PTC14__ENET_RMII1_RXER
> > 0x30dd
> > + VF610_PAD_PTC15__ENET_RMII1_TXD1
> > 0x30de
> > + VF610_PAD_PTC16__ENET_RMII1_TXD0
> > 0x30de
> > + VF610_PAD_PTC17__ENET_RMII1_TXEN
> > 0x30de
> > + >;
> > + };
> > +
> > + pinctrl_gpio_leds: gpio_leds {
> > + fsl,pins = <
> > + VF610_PAD_PTE12__GPIO_117 0x1183
> > + >;
> > + };
> > +
> > + pinctrl_i2c2: i2c2grp {
> > + fsl,pins = <
> > + VF610_PAD_PTA22__I2C2_SCL
> > 0x34df
> > + VF610_PAD_PTA23__I2C2_SDA
> > 0x34df
> > + >;
> > + };
> > +
> > + pinctrl_nfc: nfcgrp {
> > + fsl,pins = <
> > + VF610_PAD_PTD23__NF_IO7
> > 0x28df
> > + VF610_PAD_PTD22__NF_IO6
> > 0x28df
> > + VF610_PAD_PTD21__NF_IO5
> > 0x28df
> > + VF610_PAD_PTD20__NF_IO4
> > 0x28df
> > + VF610_PAD_PTD19__NF_IO3
> > 0x28df
> > + VF610_PAD_PTD18__NF_IO2
> > 0x28df
> > + VF610_PAD_PTD17__NF_IO1
> > 0x28df
> > + VF610_PAD_PTD16__NF_IO0
> > 0x28df
> > + VF610_PAD_PTB24__NF_WE_B
> > 0x28c2
> > + VF610_PAD_PTB25__NF_CE0_B
> > 0x28c2
> > + VF610_PAD_PTB27__NF_RE_B
> > 0x28c2
> > + VF610_PAD_PTC26__NF_RB_B
> > 0x283d
> > + VF610_PAD_PTC27__NF_ALE
> > 0x28c2
> > + VF610_PAD_PTC28__NF_CLE
> > 0x28c2
> > + >;
> > + };
> > +
> > + pinctrl_uart0: uart0grp {
> > + fsl,pins = <
> > + VF610_PAD_PTB10__UART0_TX
> > 0x21a2
> > + VF610_PAD_PTB11__UART0_RX
> > 0x21a1
> > + >;
> > + };
> > +
> > + pinctrl_uart1: uart1grp {
> > + fsl,pins = <
> > + VF610_PAD_PTB4__UART1_TX
> > 0x21a2
> > + VF610_PAD_PTB5__UART1_RX
> > 0x21a1
> > + >;
> > + };
> > +
> > + pinctrl_uart2: uart2grp {
> > + fsl,pins = <
> > + VF610_PAD_PTB6__UART2_TX
> > 0x21a2
> > + VF610_PAD_PTB7__UART2_RX
> > 0x21a1
> > + >;
> > + };
> > +
> > + pinctrl_uart3: uart3grp {
> > + fsl,pins = <
> > + VF610_PAD_PTA20__UART3_TX
> > 0x21a2
> > + VF610_PAD_PTA21__UART3_RX
> > 0x21a1
> > + >;
> > + };
> > +
> > + pinctrl_qspi0: qspi0grp {
> > + fsl,pins = <
> > + VF610_PAD_PTD0__QSPI0_A_QSCK 0x397f
> > + VF610_PAD_PTD1__QSPI0_A_CS0 0x397f
> > + VF610_PAD_PTD2__QSPI0_A_DATA3 0x397f
> > + VF610_PAD_PTD3__QSPI0_A_DATA2 0x397f
> > + VF610_PAD_PTD4__QSPI0_A_DATA1 0x397f
> > + VF610_PAD_PTD5__QSPI0_A_DATA0 0x397f
> > + VF610_PAD_PTD7__QSPI0_B_QSCK 0x397f
> > + VF610_PAD_PTD8__QSPI0_B_CS0 0x397f
> > + VF610_PAD_PTD11__QSPI0_B_DATA1
> > 0x397f
> > + VF610_PAD_PTD12__QSPI0_B_DATA0
> > 0x397f
> > + >;
> > + };
> > +};
> > +
> > +&nfc {
> > + assigned-clocks = <&clks VF610_CLK_NFC>;
> > + assigned-clock-rates = <33000000>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_nfc>;
> > + status = "okay";
> > +
> > + nand@0 {
> > + compatible = "fsl,vf610-nfc-nandcs";
> > + reg = <0>;
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + nand-bus-width = <16>;
> > + nand-ecc-mode = "hw";
> > + nand-ecc-strength = <24>;
> > + nand-ecc-step-size = <2048>;
> > + nand-on-flash-bbt;
> > + };
> > +};
> > +
> > +&uart0 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_uart0>;
> > + status = "okay";
> > +};
> > +
> > +&uart1 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_uart1>;
> > + status = "okay";
> > +};
> > +
> > +&uart2 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_uart2>;
> > + status = "okay";
> > +};
> > +
> > +&uart3 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_uart3>;
> > + status = "okay";
> > +};
> > +
> > +&usbdev0 {
> > + disable-over-current;
> > + status = "okay";
> > +};
> > +
> > +&usbh1 {
> > + disable-over-current;
> > + status = "okay";
> > +};
> > +
> > +&usbmisc0 {
> > + status = "okay";
> > +};
> > +
> > +&usbmisc1 {
> > + status = "okay";
> > +};
> > +
> > +&usbphy0 {
> > + status = "okay";
> > +};
> > +
> > +&usbphy1 {
> > + status = "okay";
> > +};
> > +
> > +&qspi0 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_qspi0>;
> > + status = "okay";
> > +
> > + flash0: n25q128a13@0 {
> > + compatible = "n25q128a13", "jedec,spi-nor";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + spi-max-frequency = <66000000>;
> > + spi-rx-bus-width = <4>;
> > + reg = <0>;
> > + };
> > +
> > + flash1: n25q128a13@1 {
> > + compatible = "n25q128a13", "jedec,spi-nor";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + spi-max-frequency = <66000000>;
> > + spi-rx-bus-width = <2>;
> > + reg = <1>;
> > + };
> > +};
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH] ARM: dts: Add support for Liebherr's BK4 device (vf610 based)
2018-09-21 15:27 [PATCH] ARM: dts: Add support for Liebherr's BK4 device (vf610 based) Lukasz Majewski
2018-09-21 22:30 ` Stefan Agner
@ 2018-09-23 14:32 ` Fabio Estevam
2018-09-24 8:30 ` Lukasz Majewski
2018-09-27 22:18 ` [PATCH v2] " Lukasz Majewski
2018-10-09 10:50 ` [PATCH v3] " Lukasz Majewski
3 siblings, 1 reply; 20+ messages in thread
From: Fabio Estevam @ 2018-09-23 14:32 UTC (permalink / raw)
To: Lukasz Majewski
Cc: Shawn Guo, Rob Herring, Mark Rutland, Sascha Hauer,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
linux-kernel,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
Pengutronix Kernel Team, Stefan Agner, Fabio Estevam
On Fri, Sep 21, 2018 at 12:27 PM, Lukasz Majewski <lukma@denx.de> wrote:
> This commit adds DTS support for BK4 device from Liebherr. It
> uses vf610 SoC from NXP.
>
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> ---
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/vf610-bk4.dts | 504 ++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 505 insertions(+)
> create mode 100644 arch/arm/boot/dts/vf610-bk4.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index b5bd3de87c33..e6f159895fa9 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -577,6 +577,7 @@ dtb-$(CONFIG_SOC_LS1021A) += \
> ls1021a-twr.dtb
> dtb-$(CONFIG_SOC_VF610) += \
> vf500-colibri-eval-v3.dtb \
> + vf610-bk4.dtb \
> vf610-colibri-eval-v3.dtb \
> vf610m4-colibri.dtb \
> vf610-cosmic.dtb \
> diff --git a/arch/arm/boot/dts/vf610-bk4.dts b/arch/arm/boot/dts/vf610-bk4.dts
> new file mode 100644
> index 000000000000..4ad7e739a0ad
> --- /dev/null
> +++ b/arch/arm/boot/dts/vf610-bk4.dts
> @@ -0,0 +1,504 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright 2018
> + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
> + */
> +
> +/dts-v1/;
> +#include "vf610.dtsi"
> +
> +/ {
> + model = "Liebherr BK4 controller";
> + compatible = "lwn,bk4", "fsl,vf610";
> +
> + chosen {
> + bootargs = "console=ttyLP1,115200";
You could pass stdout-path instead.
> + };
> +
> + memory@80000000 {
> + reg = <0x80000000 0x8000000>;
> + };
> +
> + audio_ext: mclk_osc {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <24576000>;
> + };
This seems to be unused.
> +
> + enet_ext: eth_osc {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <50000000>;
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_gpio_leds>;
> +
> + /* LED D5 */
> + led0: heartbeat {
> + label = "heartbeat";
> + gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
> + default-state = "on";
> + linux,default-trigger = "heartbeat";
> + };
> + };
> +
> + regulators {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + reg_3p3v: regulator@0 {
Please move all regulators outside of the simple-bus container and use
this naming convention:
reg_3p3v: regulator-3p3v {
> +&dspi3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_dspi3>;
> + bus-num = <3>;
> + status = "okay";
> +
> + spidev3@0 {
> + compatible = "fsl,vf610-dspi";
> + spi-max-frequency = <30000000>;
> + reg = <0>;
> + fsl,spi-slave-mode;
Such property does not exist.
I also thought that spidev nodes in dt were not recommended.
> +&iomuxc {
Like Stefan mentioned it is common practice on imx dts files to place
the iomuxc node as the last one.
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_bk4_common>;
This seems to be not called from any driver.
We usually use a hog group for such purpose.
> +
> + pinctrl_bk4_common: commongrp {
> + fsl,pins = <
> + /* One_Wire_PSU_EN */
> + VF610_PAD_PTC29__GPIO_102 0x1183
> + /* SPI */
> + VF610_PAD_PTB26__GPIO_96 0x1183
> + VF610_PAD_PTE14__GPIO_119 0x1183
> + VF610_PAD_PTE4__GPIO_109 0x1181
> + /* Feedback_Lines */
> + VF610_PAD_PTC31__GPIO_104 0x1181
> + VF610_PAD_PTA7__GPIO_134 0x1181
> + VF610_PAD_PTD9__GPIO_88 0x1181
> + VF610_PAD_PTE1__GPIO_106 0x1183
> + VF610_PAD_PTB2__GPIO_24 0x1181
> + VF610_PAD_PTB3__GPIO_25 0x1181
> + VF610_PAD_PTB1__GPIO_23 0x1181
> + /* SDHC */
> + VF610_PAD_PTE19__GPIO_124 0x1183
> + VF610_PAD_PTB23__GPIO_93 0x1181
If they are related to SDHC they should be better placed under the sdhc nodes.
> + /* GPI */
> + VF610_PAD_PTE2__GPIO_107 0x1181
> + VF610_PAD_PTE3__GPIO_108 0x1181
> + VF610_PAD_PTE5__GPIO_110 0x1181
> + VF610_PAD_PTE6__GPIO_111 0x1181
> + /* GPO */
> + VF610_PAD_PTE0__GPIO_105 0x1183
> + VF610_PAD_PTE7__GPIO_112 0x1183
> + /* RS485 */
> + VF610_PAD_PTB8__GPIO_30 0x1183
> + VF610_PAD_PTB9__GPIO_31 0x1183
> + VF610_PAD_PTE8__GPIO_113 0x1183
> + /* MPBUS MPB_EN */
> + VF610_PAD_PTE28__GPIO_133 0x1183
> + /* LEDS */
> + VF610_PAD_PTE15__GPIO_120 0x1183
> + VF610_PAD_PTA12__GPIO_5 0x1183
> + VF610_PAD_PTA16__GPIO_6 0x1183
> + VF610_PAD_PTE9__GPIO_114 0x1183
> + VF610_PAD_PTE20__GPIO_125 0x1183
> + VF610_PAD_PTE23__GPIO_128 0x1183
> + VF610_PAD_PTE16__GPIO_121 0x1183
> + /* MISC */
> + VF610_PAD_PTE10__GPIO_115 0x1183
> + VF610_PAD_PTE11__GPIO_116 0x1183
> + VF610_PAD_PTE17__GPIO_122 0x1183
> + VF610_PAD_PTC30__GPIO_103 0x1183
> + VF610_PAD_PTB0__GPIO_22 0x1181
> + /* RESETINFO */
> + VF610_PAD_PTE26__GPIO_131 0x1183
> + VF610_PAD_PTD6__GPIO_85 0x1181
> + VF610_PAD_PTE27__GPIO_132 0x1181
> + VF610_PAD_PTE13__GPIO_118 0x1181
> + VF610_PAD_PTE21__GPIO_126 0x1181
> + VF610_PAD_PTE22__GPIO_127 0x1181
> + /* EE_5V_EN */
> + VF610_PAD_PTE18__GPIO_123 0x1183
> + /* EE_5V_OC_N */
> + VF610_PAD_PTE25__GPIO_130 0x1181
Seems like a long list of pins without any driver associated.
Please review such list carefully and assign to nodes that have a
driver associated, such as rs485,LEDS, etc.
> +
> +&usbphy0 {
> + status = "okay";
> +};
> +
> +&usbphy1 {
> + status = "okay";
> +};
> +
> +&qspi0 {
This is not placed in alphabetical order.
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH] ARM: dts: Add support for Liebherr's BK4 device (vf610 based)
2018-09-23 14:32 ` Fabio Estevam
@ 2018-09-24 8:30 ` Lukasz Majewski
0 siblings, 0 replies; 20+ messages in thread
From: Lukasz Majewski @ 2018-09-24 8:30 UTC (permalink / raw)
To: Fabio Estevam
Cc: Shawn Guo, Rob Herring, Mark Rutland, Sascha Hauer,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
linux-kernel,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
Pengutronix Kernel Team, Stefan Agner, Fabio Estevam
[-- Attachment #1: Type: text/plain, Size: 9194 bytes --]
Hi Fabio,
Thanks for your review.
> On Fri, Sep 21, 2018 at 12:27 PM, Lukasz Majewski <lukma@denx.de>
> wrote:
> > This commit adds DTS support for BK4 device from Liebherr. It
> > uses vf610 SoC from NXP.
> >
> > Signed-off-by: Lukasz Majewski <lukma@denx.de>
> > ---
> > arch/arm/boot/dts/Makefile | 1 +
> > arch/arm/boot/dts/vf610-bk4.dts | 504
> > ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 505
> > insertions(+) create mode 100644 arch/arm/boot/dts/vf610-bk4.dts
> >
> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > index b5bd3de87c33..e6f159895fa9 100644
> > --- a/arch/arm/boot/dts/Makefile
> > +++ b/arch/arm/boot/dts/Makefile
> > @@ -577,6 +577,7 @@ dtb-$(CONFIG_SOC_LS1021A) += \
> > ls1021a-twr.dtb
> > dtb-$(CONFIG_SOC_VF610) += \
> > vf500-colibri-eval-v3.dtb \
> > + vf610-bk4.dtb \
> > vf610-colibri-eval-v3.dtb \
> > vf610m4-colibri.dtb \
> > vf610-cosmic.dtb \
> > diff --git a/arch/arm/boot/dts/vf610-bk4.dts
> > b/arch/arm/boot/dts/vf610-bk4.dts new file mode 100644
> > index 000000000000..4ad7e739a0ad
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/vf610-bk4.dts
> > @@ -0,0 +1,504 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +/*
> > + * Copyright 2018
> > + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
> > + */
> > +
> > +/dts-v1/;
> > +#include "vf610.dtsi"
> > +
> > +/ {
> > + model = "Liebherr BK4 controller";
> > + compatible = "lwn,bk4", "fsl,vf610";
> > +
> > + chosen {
> > + bootargs = "console=ttyLP1,115200";
>
> You could pass stdout-path instead.
Ok.
>
> > + };
> > +
> > + memory@80000000 {
> > + reg = <0x80000000 0x8000000>;
> > + };
> > +
> > + audio_ext: mclk_osc {
> > + compatible = "fixed-clock";
> > + #clock-cells = <0>;
> > + clock-frequency = <24576000>;
> > + };
>
> This seems to be unused.
The audio_ext label is used (referenced) in the "clks".
>
> > +
> > + enet_ext: eth_osc {
> > + compatible = "fixed-clock";
> > + #clock-cells = <0>;
> > + clock-frequency = <50000000>;
> > + };
> > +
> > + leds {
> > + compatible = "gpio-leds";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_gpio_leds>;
> > +
> > + /* LED D5 */
> > + led0: heartbeat {
> > + label = "heartbeat";
> > + gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
> > + default-state = "on";
> > + linux,default-trigger = "heartbeat";
> > + };
> > + };
> > +
> > + regulators {
> > + compatible = "simple-bus";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + reg_3p3v: regulator@0 {
>
> Please move all regulators outside of the simple-bus container and use
> this naming convention:
>
> reg_3p3v: regulator-3p3v {
Ok.
>
> > +&dspi3 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_dspi3>;
> > + bus-num = <3>;
> > + status = "okay";
> > +
> > + spidev3@0 {
> > + compatible = "fsl,vf610-dspi";
> > + spi-max-frequency = <30000000>;
> > + reg = <0>;
> > + fsl,spi-slave-mode;
>
> Such property does not exist.
It has been added in the other patch sent to ML:
https://lkml.org/lkml/2018/9/18/792
But till now no comments/reply.
>
> I also thought that spidev nodes in dt were not recommended.
This is a bit "unusual" on BK4, as the spidev driver is the only "user"
of the SPI subsystem on this board. In other words - the /dev/spidevX.Y
provided by spidev is solely used for communication.
Hence, I would prefer to make it explicit in the DTS.
>
> > +&iomuxc {
>
> Like Stefan mentioned it is common practice on imx dts files to place
> the iomuxc node as the last one.
Ok.
>
>
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_bk4_common>;
>
> This seems to be not called from any driver.
Yes. This is "base" setup for the board. Those configured pins are
thereafter used by several user space programs.
>
> We usually use a hog group for such purpose.
I wanted to name it explicit that we do use it for this controller.
However, no problem to rename it to hog.
>
> > +
> > + pinctrl_bk4_common: commongrp {
> > + fsl,pins = <
> > + /* One_Wire_PSU_EN */
> > + VF610_PAD_PTC29__GPIO_102
> > 0x1183
> > + /* SPI */
> > + VF610_PAD_PTB26__GPIO_96
> > 0x1183
> > + VF610_PAD_PTE14__GPIO_119
> > 0x1183
> > + VF610_PAD_PTE4__GPIO_109
> > 0x1181
> > + /* Feedback_Lines */
> > + VF610_PAD_PTC31__GPIO_104
> > 0x1181
> > + VF610_PAD_PTA7__GPIO_134
> > 0x1181
> > + VF610_PAD_PTD9__GPIO_88 0x1181
> > + VF610_PAD_PTE1__GPIO_106
> > 0x1183
> > + VF610_PAD_PTB2__GPIO_24 0x1181
> > + VF610_PAD_PTB3__GPIO_25 0x1181
> > + VF610_PAD_PTB1__GPIO_23 0x1181
> > + /* SDHC */
> > + VF610_PAD_PTE19__GPIO_124
> > 0x1183
> > + VF610_PAD_PTB23__GPIO_93
> > 0x1181
>
> If they are related to SDHC they should be better placed under the
> sdhc nodes.
>
I will double check this.
>
> > + /* GPI */
> > + VF610_PAD_PTE2__GPIO_107
> > 0x1181
> > + VF610_PAD_PTE3__GPIO_108
> > 0x1181
> > + VF610_PAD_PTE5__GPIO_110
> > 0x1181
> > + VF610_PAD_PTE6__GPIO_111
> > 0x1181
> > + /* GPO */
> > + VF610_PAD_PTE0__GPIO_105
> > 0x1183
> > + VF610_PAD_PTE7__GPIO_112
> > 0x1183
> > + /* RS485 */
> > + VF610_PAD_PTB8__GPIO_30 0x1183
> > + VF610_PAD_PTB9__GPIO_31 0x1183
> > + VF610_PAD_PTE8__GPIO_113
> > 0x1183
> > + /* MPBUS MPB_EN */
> > + VF610_PAD_PTE28__GPIO_133
> > 0x1183
> > + /* LEDS */
> > + VF610_PAD_PTE15__GPIO_120
> > 0x1183
> > + VF610_PAD_PTA12__GPIO_5 0x1183
> > + VF610_PAD_PTA16__GPIO_6 0x1183
> > + VF610_PAD_PTE9__GPIO_114
> > 0x1183
> > + VF610_PAD_PTE20__GPIO_125
> > 0x1183
> > + VF610_PAD_PTE23__GPIO_128
> > 0x1183
> > + VF610_PAD_PTE16__GPIO_121
> > 0x1183
> > + /* MISC */
> > + VF610_PAD_PTE10__GPIO_115
> > 0x1183
> > + VF610_PAD_PTE11__GPIO_116
> > 0x1183
> > + VF610_PAD_PTE17__GPIO_122
> > 0x1183
> > + VF610_PAD_PTC30__GPIO_103
> > 0x1183
> > + VF610_PAD_PTB0__GPIO_22 0x1181
> > + /* RESETINFO */
> > + VF610_PAD_PTE26__GPIO_131
> > 0x1183
> > + VF610_PAD_PTD6__GPIO_85 0x1181
> > + VF610_PAD_PTE27__GPIO_132
> > 0x1181
> > + VF610_PAD_PTE13__GPIO_118
> > 0x1181
> > + VF610_PAD_PTE21__GPIO_126
> > 0x1181
> > + VF610_PAD_PTE22__GPIO_127
> > 0x1181
> > + /* EE_5V_EN */
> > + VF610_PAD_PTE18__GPIO_123
> > 0x1183
> > + /* EE_5V_OC_N */
> > + VF610_PAD_PTE25__GPIO_130
> > 0x1181
>
> Seems like a long list of pins without any driver associated.
Not kernel driver associated. The user space code uses those pins
directly.
>
> Please review such list carefully and assign to nodes that have a
> driver associated, such as rs485,LEDS, etc.
For example - the user space is not using in-kernel rs485 driver.
But as said above - I will double check this.
>
> > +
> > +&usbphy0 {
> > + status = "okay";
> > +};
> > +
> > +&usbphy1 {
> > + status = "okay";
> > +};
> > +
> > +&qspi0 {
>
> This is not placed in alphabetical order.
Ok.
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH v2] ARM: dts: Add support for Liebherr's BK4 device (vf610 based)
2018-09-21 15:27 [PATCH] ARM: dts: Add support for Liebherr's BK4 device (vf610 based) Lukasz Majewski
2018-09-21 22:30 ` Stefan Agner
2018-09-23 14:32 ` Fabio Estevam
@ 2018-09-27 22:18 ` Lukasz Majewski
2018-09-28 9:00 ` Stefan Agner
` (2 more replies)
2018-10-09 10:50 ` [PATCH v3] " Lukasz Majewski
3 siblings, 3 replies; 20+ messages in thread
From: Lukasz Majewski @ 2018-09-27 22:18 UTC (permalink / raw)
To: Shawn Guo, Rob Herring, Mark Rutland
Cc: Sascha Hauer, devicetree, linux-kernel, linux-arm-kernel,
Pengutronix Kernel Team, Stefan Agner, Fabio Estevam,
Fabio Estevam, Lukasz Majewski
This commit adds DTS support for BK4 device from Liebherr. It
uses vf610 SoC from NXP.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
---
Changes for v2:
- Rename enet_ext and audio_ext oscillator names
- Move regulators from simple-bus (and rename to reg_3p3v: regulator-3p3v)
- Add stdout-path property to chosen node
- Move iomuxc node to the end (as it is so large)
- Sort with alphabetical order
- Rename the default pinctrl to "hog"
- Move LED pins definition from "hog" to "led" group
- Add more descriptive names to default pins pinmux definition
- Use spi-slave property to describe node working in this mode
- Rename the spidev3 node to slave
- Introduce new compatible name (lwn,bk4) for spidev driver (to avoid
confusion)
- Update some compatibles to match current kernel
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/vf610-bk4.dts | 499 ++++++++++++++++++++++++++++++++++++++++
2 files changed, 500 insertions(+)
create mode 100644 arch/arm/boot/dts/vf610-bk4.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index b5bd3de87c33..e6f159895fa9 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -577,6 +577,7 @@ dtb-$(CONFIG_SOC_LS1021A) += \
ls1021a-twr.dtb
dtb-$(CONFIG_SOC_VF610) += \
vf500-colibri-eval-v3.dtb \
+ vf610-bk4.dtb \
vf610-colibri-eval-v3.dtb \
vf610m4-colibri.dtb \
vf610-cosmic.dtb \
diff --git a/arch/arm/boot/dts/vf610-bk4.dts b/arch/arm/boot/dts/vf610-bk4.dts
new file mode 100644
index 000000000000..78c5723d6f64
--- /dev/null
+++ b/arch/arm/boot/dts/vf610-bk4.dts
@@ -0,0 +1,499 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2018
+ * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
+ */
+
+/dts-v1/;
+#include "vf610.dtsi"
+
+/ {
+ model = "Liebherr BK4 controller";
+ compatible = "lwn,bk4", "fsl,vf610";
+
+ chosen {
+ stdout-path = &uart1;
+ };
+
+ memory@80000000 {
+ reg = <0x80000000 0x8000000>;
+ };
+
+ audio_ext: oscillator-audio {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24576000>;
+ };
+
+ enet_ext: oscillator-ethernet {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_leds>;
+
+ /* LED D5 */
+ led0: heartbeat {
+ label = "heartbeat";
+ gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ reg_vcc_3v3_mcu: regulator-vcc_3v3_mcu {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_3v3_mcu";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+};
+
+&adc0 {
+ vref-supply = <®_vcc_3v3_mcu>;
+ status = "okay";
+};
+
+&adc1 {
+ vref-supply = <®_vcc_3v3_mcu>;
+ status = "okay";
+};
+
+&can0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_can0>;
+ status = "okay";
+};
+
+&can1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_can1>;
+ status = "okay";
+};
+
+&clks {
+ clocks = <&sxosc>, <&fxosc>, <&enet_ext>, <&audio_ext>;
+ clock-names = "sxosc", "fxosc", "enet_ext", "audio_ext";
+};
+
+&dspi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_dspi0>;
+ bus-num = <0>;
+ status = "okay";
+
+ spidev0@0 {
+ compatible = "lwn,bk4";
+ spi-max-frequency = <30000000>;
+ reg = <0>;
+ fsl,spi-cs-sck-delay = <200>;
+ fsl,spi-sck-cs-delay = <400>;
+ };
+};
+
+&dspi3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_dspi3>;
+ bus-num = <3>;
+ status = "okay";
+ spi-slave;
+
+ slave@0 {
+ compatible = "lwn,bk4";
+ spi-max-frequency = <30000000>;
+ reg = <0>;
+ };
+};
+
+&edma0 {
+ status = "okay";
+};
+
+&edma1 {
+ status = "okay";
+};
+
+&esdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_esdhc1>;
+ bus-width = <4>;
+ cd-gpios = <&gpio3 2 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&fec0 {
+ phy-mode = "rmii";
+ phy-handle = <ðphy0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fec0>;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ethphy0: ethernet-phy@1 {
+ reg = <1>;
+ clocks = <&clks VF610_CLK_ENET_50M>;
+ clock-names = "rmii-ref";
+ };
+ };
+};
+
+&fec1 {
+ phy-mode = "rmii";
+ phy-handle = <ðphy1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fec1>;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ethphy1: ethernet-phy@1 {
+ reg = <1>;
+ clocks = <&clks VF610_CLK_ENET_50M>;
+ clock-names = "rmii-ref";
+ };
+ };
+};
+
+&i2c2 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+
+ eeprom: eeprom@50 {
+ compatible = "atmel,24c256";
+ reg = <0x50>;
+ };
+
+ rtc: rtc@68 {
+ compatible = "st,m41t62";
+ reg = <0x68>;
+ };
+};
+
+&nfc {
+ assigned-clocks = <&clks VF610_CLK_NFC>;
+ assigned-clock-rates = <33000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_nfc>;
+ status = "okay";
+
+ nand@0 {
+ compatible = "fsl,vf610-nfc-nandcs";
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ nand-bus-width = <16>;
+ nand-ecc-mode = "hw";
+ nand-ecc-strength = <24>;
+ nand-ecc-step-size = <2048>;
+ nand-on-flash-bbt;
+ };
+};
+
+&qspi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_qspi0>;
+ status = "okay";
+
+ flash0: n25q128a13@0 {
+ compatible = "n25q128a13", "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <66000000>;
+ spi-rx-bus-width = <4>;
+ reg = <0>;
+ };
+
+ flash1: n25q128a13@1 {
+ compatible = "n25q128a13", "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <66000000>;
+ spi-rx-bus-width = <2>;
+ reg = <1>;
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart0>;
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ status = "okay";
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+ status = "okay";
+};
+
+&usbdev0 {
+ disable-over-current;
+ status = "okay";
+};
+
+&usbh1 {
+ disable-over-current;
+ status = "okay";
+};
+
+&usbmisc0 {
+ status = "okay";
+};
+
+&usbmisc1 {
+ status = "okay";
+};
+
+&usbphy0 {
+ status = "okay";
+};
+
+&usbphy1 {
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hog>;
+
+ pinctrl_hog: hoggrp {
+ fsl,pins = <
+ /* One_Wire_PSU_EN */
+ VF610_PAD_PTC29__GPIO_102 0x1183
+ /* SPI ENABLE */
+ VF610_PAD_PTB26__GPIO_96 0x1183
+ /* EB control */
+ VF610_PAD_PTE14__GPIO_119 0x1183
+ VF610_PAD_PTE4__GPIO_109 0x1181
+ /* Feedback_Lines */
+ VF610_PAD_PTC31__GPIO_104 0x1181
+ VF610_PAD_PTA7__GPIO_134 0x1181
+ VF610_PAD_PTD9__GPIO_88 0x1181
+ VF610_PAD_PTE1__GPIO_106 0x1183
+ VF610_PAD_PTB2__GPIO_24 0x1181
+ VF610_PAD_PTB3__GPIO_25 0x1181
+ VF610_PAD_PTB1__GPIO_23 0x1181
+ /* SDHC Enable */
+ VF610_PAD_PTE19__GPIO_124 0x1183
+ /* SDHC Overcurrent */
+ VF610_PAD_PTB23__GPIO_93 0x1181
+ /* GPI */
+ VF610_PAD_PTE2__GPIO_107 0x1181
+ VF610_PAD_PTE3__GPIO_108 0x1181
+ VF610_PAD_PTE5__GPIO_110 0x1181
+ VF610_PAD_PTE6__GPIO_111 0x1181
+ /* GPO */
+ VF610_PAD_PTE0__GPIO_105 0x1183
+ VF610_PAD_PTE7__GPIO_112 0x1183
+ /* RS485 Control */
+ VF610_PAD_PTB8__GPIO_30 0x1183
+ VF610_PAD_PTB9__GPIO_31 0x1183
+ VF610_PAD_PTE8__GPIO_113 0x1183
+ /* MPBUS MPB_EN */
+ VF610_PAD_PTE28__GPIO_133 0x1183
+ /* MISC */
+ VF610_PAD_PTE10__GPIO_115 0x1183
+ VF610_PAD_PTE11__GPIO_116 0x1183
+ VF610_PAD_PTE17__GPIO_122 0x1183
+ VF610_PAD_PTC30__GPIO_103 0x1183
+ VF610_PAD_PTB0__GPIO_22 0x1181
+ /* RESETINFO */
+ VF610_PAD_PTE26__GPIO_131 0x1183
+ VF610_PAD_PTD6__GPIO_85 0x1181
+ VF610_PAD_PTE27__GPIO_132 0x1181
+ VF610_PAD_PTE13__GPIO_118 0x1181
+ VF610_PAD_PTE21__GPIO_126 0x1181
+ VF610_PAD_PTE22__GPIO_127 0x1181
+ /* EE_5V_EN */
+ VF610_PAD_PTE18__GPIO_123 0x1183
+ /* EE_5V_OC_N */
+ VF610_PAD_PTE25__GPIO_130 0x1181
+ >;
+ };
+
+ pinctrl_can0: can0grp {
+ fsl,pins = <
+ VF610_PAD_PTB14__CAN0_RX 0x1181
+ VF610_PAD_PTB15__CAN0_TX 0x1182
+ >;
+ };
+
+ pinctrl_can1: can1grp {
+ fsl,pins = <
+ VF610_PAD_PTB16__CAN1_RX 0x1181
+ VF610_PAD_PTB17__CAN1_TX 0x1182
+ >;
+ };
+
+ pinctrl_dspi0: dspi0grp {
+ fsl,pins = <
+ VF610_PAD_PTB18__DSPI0_CS1 0x1182
+ VF610_PAD_PTB19__DSPI0_CS0 0x1182
+ VF610_PAD_PTB20__DSPI0_SIN 0x1181
+ VF610_PAD_PTB21__DSPI0_SOUT 0x1182
+ VF610_PAD_PTB22__DSPI0_SCK 0x1182
+ >;
+ };
+
+ pinctrl_dspi3: dspi3grp {
+ fsl,pins = <
+ VF610_PAD_PTD10__DSPI3_CS0 0x1181
+ VF610_PAD_PTD11__DSPI3_SIN 0x1181
+ VF610_PAD_PTD12__DSPI3_SOUT 0x1182
+ VF610_PAD_PTD13__DSPI3_SCK 0x1181
+ >;
+ };
+
+ pinctrl_esdhc1: esdhc1grp {
+ fsl,pins = <
+ VF610_PAD_PTA24__ESDHC1_CLK 0x31ef
+ VF610_PAD_PTA25__ESDHC1_CMD 0x31ef
+ VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef
+ VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef
+ VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef
+ VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef
+ VF610_PAD_PTB28__GPIO_98 0x219d
+ >;
+ };
+
+ pinctrl_fec0: fec0grp {
+ fsl,pins = <
+ VF610_PAD_PTA6__RMII_CLKIN 0x30dd
+ VF610_PAD_PTC0__ENET_RMII0_MDC 0x30de
+ VF610_PAD_PTC1__ENET_RMII0_MDIO 0x30df
+ VF610_PAD_PTC2__ENET_RMII0_CRS 0x30dd
+ VF610_PAD_PTC3__ENET_RMII0_RXD1 0x30dd
+ VF610_PAD_PTC4__ENET_RMII0_RXD0 0x30dd
+ VF610_PAD_PTC5__ENET_RMII0_RXER 0x30dd
+ VF610_PAD_PTC6__ENET_RMII0_TXD1 0x30de
+ VF610_PAD_PTC7__ENET_RMII0_TXD0 0x30de
+ VF610_PAD_PTC8__ENET_RMII0_TXEN 0x30de
+ >;
+ };
+
+ pinctrl_fec1: fec1grp {
+ fsl,pins = <
+ VF610_PAD_PTC9__ENET_RMII1_MDC 0x30de
+ VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30df
+ VF610_PAD_PTC11__ENET_RMII1_CRS 0x30dd
+ VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30dd
+ VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30dd
+ VF610_PAD_PTC14__ENET_RMII1_RXER 0x30dd
+ VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30de
+ VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30de
+ VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30de
+ >;
+ };
+
+ pinctrl_gpio_leds: gpio_leds {
+ fsl,pins = <
+ /* Heart bit LED */
+ VF610_PAD_PTE12__GPIO_117 0x1183
+ /* LEDS */
+ VF610_PAD_PTE15__GPIO_120 0x1183
+ VF610_PAD_PTA12__GPIO_5 0x1183
+ VF610_PAD_PTA16__GPIO_6 0x1183
+ VF610_PAD_PTE9__GPIO_114 0x1183
+ VF610_PAD_PTE20__GPIO_125 0x1183
+ VF610_PAD_PTE23__GPIO_128 0x1183
+ VF610_PAD_PTE16__GPIO_121 0x1183
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ VF610_PAD_PTA22__I2C2_SCL 0x34df
+ VF610_PAD_PTA23__I2C2_SDA 0x34df
+ >;
+ };
+
+ pinctrl_nfc: nfcgrp {
+ fsl,pins = <
+ VF610_PAD_PTD23__NF_IO7 0x28df
+ VF610_PAD_PTD22__NF_IO6 0x28df
+ VF610_PAD_PTD21__NF_IO5 0x28df
+ VF610_PAD_PTD20__NF_IO4 0x28df
+ VF610_PAD_PTD19__NF_IO3 0x28df
+ VF610_PAD_PTD18__NF_IO2 0x28df
+ VF610_PAD_PTD17__NF_IO1 0x28df
+ VF610_PAD_PTD16__NF_IO0 0x28df
+ VF610_PAD_PTB24__NF_WE_B 0x28c2
+ VF610_PAD_PTB25__NF_CE0_B 0x28c2
+ VF610_PAD_PTB27__NF_RE_B 0x28c2
+ VF610_PAD_PTC26__NF_RB_B 0x283d
+ VF610_PAD_PTC27__NF_ALE 0x28c2
+ VF610_PAD_PTC28__NF_CLE 0x28c2
+ >;
+ };
+
+ pinctrl_uart0: uart0grp {
+ fsl,pins = <
+ VF610_PAD_PTB10__UART0_TX 0x21a2
+ VF610_PAD_PTB11__UART0_RX 0x21a1
+ >;
+ };
+
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ VF610_PAD_PTB4__UART1_TX 0x21a2
+ VF610_PAD_PTB5__UART1_RX 0x21a1
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ VF610_PAD_PTB6__UART2_TX 0x21a2
+ VF610_PAD_PTB7__UART2_RX 0x21a1
+ >;
+ };
+
+ pinctrl_uart3: uart3grp {
+ fsl,pins = <
+ VF610_PAD_PTA20__UART3_TX 0x21a2
+ VF610_PAD_PTA21__UART3_RX 0x21a1
+ >;
+ };
+
+ pinctrl_qspi0: qspi0grp {
+ fsl,pins = <
+ VF610_PAD_PTD0__QSPI0_A_QSCK 0x397f
+ VF610_PAD_PTD1__QSPI0_A_CS0 0x397f
+ VF610_PAD_PTD2__QSPI0_A_DATA3 0x397f
+ VF610_PAD_PTD3__QSPI0_A_DATA2 0x397f
+ VF610_PAD_PTD4__QSPI0_A_DATA1 0x397f
+ VF610_PAD_PTD5__QSPI0_A_DATA0 0x397f
+ VF610_PAD_PTD7__QSPI0_B_QSCK 0x397f
+ VF610_PAD_PTD8__QSPI0_B_CS0 0x397f
+ VF610_PAD_PTD11__QSPI0_B_DATA1 0x397f
+ VF610_PAD_PTD12__QSPI0_B_DATA0 0x397f
+ >;
+ };
+};
--
2.11.0
^ permalink raw reply related [flat|nested] 20+ messages in thread
* Re: [PATCH v2] ARM: dts: Add support for Liebherr's BK4 device (vf610 based)
2018-09-27 22:18 ` [PATCH v2] " Lukasz Majewski
@ 2018-09-28 9:00 ` Stefan Agner
2018-10-08 12:25 ` Lukasz Majewski
2018-10-08 14:34 ` Shawn Guo
2 siblings, 0 replies; 20+ messages in thread
From: Stefan Agner @ 2018-09-28 9:00 UTC (permalink / raw)
To: Lukasz Majewski
Cc: Shawn Guo, Rob Herring, Mark Rutland, Sascha Hauer, devicetree,
linux-kernel, linux-arm-kernel, Pengutronix Kernel Team,
Fabio Estevam, Fabio Estevam
On 28.09.2018 00:18, Lukasz Majewski wrote:
> This commit adds DTS support for BK4 device from Liebherr. It
> uses vf610 SoC from NXP.
>
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Agner <stefan@agner.ch>
--
Stefan
> ---
> Changes for v2:
>
> - Rename enet_ext and audio_ext oscillator names
> - Move regulators from simple-bus (and rename to reg_3p3v: regulator-3p3v)
> - Add stdout-path property to chosen node
> - Move iomuxc node to the end (as it is so large)
> - Sort with alphabetical order
> - Rename the default pinctrl to "hog"
> - Move LED pins definition from "hog" to "led" group
> - Add more descriptive names to default pins pinmux definition
> - Use spi-slave property to describe node working in this mode
> - Rename the spidev3 node to slave
> - Introduce new compatible name (lwn,bk4) for spidev driver (to avoid
> confusion)
> - Update some compatibles to match current kernel
> ---
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/vf610-bk4.dts | 499 ++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 500 insertions(+)
> create mode 100644 arch/arm/boot/dts/vf610-bk4.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index b5bd3de87c33..e6f159895fa9 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -577,6 +577,7 @@ dtb-$(CONFIG_SOC_LS1021A) += \
> ls1021a-twr.dtb
> dtb-$(CONFIG_SOC_VF610) += \
> vf500-colibri-eval-v3.dtb \
> + vf610-bk4.dtb \
> vf610-colibri-eval-v3.dtb \
> vf610m4-colibri.dtb \
> vf610-cosmic.dtb \
> diff --git a/arch/arm/boot/dts/vf610-bk4.dts b/arch/arm/boot/dts/vf610-bk4.dts
> new file mode 100644
> index 000000000000..78c5723d6f64
> --- /dev/null
> +++ b/arch/arm/boot/dts/vf610-bk4.dts
> @@ -0,0 +1,499 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright 2018
> + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
> + */
> +
> +/dts-v1/;
> +#include "vf610.dtsi"
> +
> +/ {
> + model = "Liebherr BK4 controller";
> + compatible = "lwn,bk4", "fsl,vf610";
> +
> + chosen {
> + stdout-path = &uart1;
> + };
> +
> + memory@80000000 {
> + reg = <0x80000000 0x8000000>;
> + };
> +
> + audio_ext: oscillator-audio {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <24576000>;
> + };
> +
> + enet_ext: oscillator-ethernet {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <50000000>;
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_gpio_leds>;
> +
> + /* LED D5 */
> + led0: heartbeat {
> + label = "heartbeat";
> + gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
> + default-state = "on";
> + linux,default-trigger = "heartbeat";
> + };
> + };
> +
> + reg_3p3v: regulator-3p3v {
> + compatible = "regulator-fixed";
> + regulator-name = "3P3V";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> +
> + reg_vcc_3v3_mcu: regulator-vcc_3v3_mcu {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc_3v3_mcu";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + };
> +};
> +
> +&adc0 {
> + vref-supply = <®_vcc_3v3_mcu>;
> + status = "okay";
> +};
> +
> +&adc1 {
> + vref-supply = <®_vcc_3v3_mcu>;
> + status = "okay";
> +};
> +
> +&can0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_can0>;
> + status = "okay";
> +};
> +
> +&can1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_can1>;
> + status = "okay";
> +};
> +
> +&clks {
> + clocks = <&sxosc>, <&fxosc>, <&enet_ext>, <&audio_ext>;
> + clock-names = "sxosc", "fxosc", "enet_ext", "audio_ext";
> +};
> +
> +&dspi0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_dspi0>;
> + bus-num = <0>;
> + status = "okay";
> +
> + spidev0@0 {
> + compatible = "lwn,bk4";
> + spi-max-frequency = <30000000>;
> + reg = <0>;
> + fsl,spi-cs-sck-delay = <200>;
> + fsl,spi-sck-cs-delay = <400>;
> + };
> +};
> +
> +&dspi3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_dspi3>;
> + bus-num = <3>;
> + status = "okay";
> + spi-slave;
> +
> + slave@0 {
> + compatible = "lwn,bk4";
> + spi-max-frequency = <30000000>;
> + reg = <0>;
> + };
> +};
> +
> +&edma0 {
> + status = "okay";
> +};
> +
> +&edma1 {
> + status = "okay";
> +};
> +
> +&esdhc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_esdhc1>;
> + bus-width = <4>;
> + cd-gpios = <&gpio3 2 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +};
> +
> +&fec0 {
> + phy-mode = "rmii";
> + phy-handle = <ðphy0>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_fec0>;
> + status = "okay";
> +
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + ethphy0: ethernet-phy@1 {
> + reg = <1>;
> + clocks = <&clks VF610_CLK_ENET_50M>;
> + clock-names = "rmii-ref";
> + };
> + };
> +};
> +
> +&fec1 {
> + phy-mode = "rmii";
> + phy-handle = <ðphy1>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_fec1>;
> + status = "okay";
> +
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + ethphy1: ethernet-phy@1 {
> + reg = <1>;
> + clocks = <&clks VF610_CLK_ENET_50M>;
> + clock-names = "rmii-ref";
> + };
> + };
> +};
> +
> +&i2c2 {
> + clock-frequency = <400000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2>;
> + status = "okay";
> +
> + eeprom: eeprom@50 {
> + compatible = "atmel,24c256";
> + reg = <0x50>;
> + };
> +
> + rtc: rtc@68 {
> + compatible = "st,m41t62";
> + reg = <0x68>;
> + };
> +};
> +
> +&nfc {
> + assigned-clocks = <&clks VF610_CLK_NFC>;
> + assigned-clock-rates = <33000000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_nfc>;
> + status = "okay";
> +
> + nand@0 {
> + compatible = "fsl,vf610-nfc-nandcs";
> + reg = <0>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + nand-bus-width = <16>;
> + nand-ecc-mode = "hw";
> + nand-ecc-strength = <24>;
> + nand-ecc-step-size = <2048>;
> + nand-on-flash-bbt;
> + };
> +};
> +
> +&qspi0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_qspi0>;
> + status = "okay";
> +
> + flash0: n25q128a13@0 {
> + compatible = "n25q128a13", "jedec,spi-nor";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + spi-max-frequency = <66000000>;
> + spi-rx-bus-width = <4>;
> + reg = <0>;
> + };
> +
> + flash1: n25q128a13@1 {
> + compatible = "n25q128a13", "jedec,spi-nor";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + spi-max-frequency = <66000000>;
> + spi-rx-bus-width = <2>;
> + reg = <1>;
> + };
> +};
> +
> +&uart0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart0>;
> + status = "okay";
> +};
> +
> +&uart1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart1>;
> + status = "okay";
> +};
> +
> +&uart2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart2>;
> + status = "okay";
> +};
> +
> +&uart3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart3>;
> + status = "okay";
> +};
> +
> +&usbdev0 {
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usbh1 {
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usbmisc0 {
> + status = "okay";
> +};
> +
> +&usbmisc1 {
> + status = "okay";
> +};
> +
> +&usbphy0 {
> + status = "okay";
> +};
> +
> +&usbphy1 {
> + status = "okay";
> +};
> +
> +&iomuxc {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_hog>;
> +
> + pinctrl_hog: hoggrp {
> + fsl,pins = <
> + /* One_Wire_PSU_EN */
> + VF610_PAD_PTC29__GPIO_102 0x1183
> + /* SPI ENABLE */
> + VF610_PAD_PTB26__GPIO_96 0x1183
> + /* EB control */
> + VF610_PAD_PTE14__GPIO_119 0x1183
> + VF610_PAD_PTE4__GPIO_109 0x1181
> + /* Feedback_Lines */
> + VF610_PAD_PTC31__GPIO_104 0x1181
> + VF610_PAD_PTA7__GPIO_134 0x1181
> + VF610_PAD_PTD9__GPIO_88 0x1181
> + VF610_PAD_PTE1__GPIO_106 0x1183
> + VF610_PAD_PTB2__GPIO_24 0x1181
> + VF610_PAD_PTB3__GPIO_25 0x1181
> + VF610_PAD_PTB1__GPIO_23 0x1181
> + /* SDHC Enable */
> + VF610_PAD_PTE19__GPIO_124 0x1183
> + /* SDHC Overcurrent */
> + VF610_PAD_PTB23__GPIO_93 0x1181
> + /* GPI */
> + VF610_PAD_PTE2__GPIO_107 0x1181
> + VF610_PAD_PTE3__GPIO_108 0x1181
> + VF610_PAD_PTE5__GPIO_110 0x1181
> + VF610_PAD_PTE6__GPIO_111 0x1181
> + /* GPO */
> + VF610_PAD_PTE0__GPIO_105 0x1183
> + VF610_PAD_PTE7__GPIO_112 0x1183
> + /* RS485 Control */
> + VF610_PAD_PTB8__GPIO_30 0x1183
> + VF610_PAD_PTB9__GPIO_31 0x1183
> + VF610_PAD_PTE8__GPIO_113 0x1183
> + /* MPBUS MPB_EN */
> + VF610_PAD_PTE28__GPIO_133 0x1183
> + /* MISC */
> + VF610_PAD_PTE10__GPIO_115 0x1183
> + VF610_PAD_PTE11__GPIO_116 0x1183
> + VF610_PAD_PTE17__GPIO_122 0x1183
> + VF610_PAD_PTC30__GPIO_103 0x1183
> + VF610_PAD_PTB0__GPIO_22 0x1181
> + /* RESETINFO */
> + VF610_PAD_PTE26__GPIO_131 0x1183
> + VF610_PAD_PTD6__GPIO_85 0x1181
> + VF610_PAD_PTE27__GPIO_132 0x1181
> + VF610_PAD_PTE13__GPIO_118 0x1181
> + VF610_PAD_PTE21__GPIO_126 0x1181
> + VF610_PAD_PTE22__GPIO_127 0x1181
> + /* EE_5V_EN */
> + VF610_PAD_PTE18__GPIO_123 0x1183
> + /* EE_5V_OC_N */
> + VF610_PAD_PTE25__GPIO_130 0x1181
> + >;
> + };
> +
> + pinctrl_can0: can0grp {
> + fsl,pins = <
> + VF610_PAD_PTB14__CAN0_RX 0x1181
> + VF610_PAD_PTB15__CAN0_TX 0x1182
> + >;
> + };
> +
> + pinctrl_can1: can1grp {
> + fsl,pins = <
> + VF610_PAD_PTB16__CAN1_RX 0x1181
> + VF610_PAD_PTB17__CAN1_TX 0x1182
> + >;
> + };
> +
> + pinctrl_dspi0: dspi0grp {
> + fsl,pins = <
> + VF610_PAD_PTB18__DSPI0_CS1 0x1182
> + VF610_PAD_PTB19__DSPI0_CS0 0x1182
> + VF610_PAD_PTB20__DSPI0_SIN 0x1181
> + VF610_PAD_PTB21__DSPI0_SOUT 0x1182
> + VF610_PAD_PTB22__DSPI0_SCK 0x1182
> + >;
> + };
> +
> + pinctrl_dspi3: dspi3grp {
> + fsl,pins = <
> + VF610_PAD_PTD10__DSPI3_CS0 0x1181
> + VF610_PAD_PTD11__DSPI3_SIN 0x1181
> + VF610_PAD_PTD12__DSPI3_SOUT 0x1182
> + VF610_PAD_PTD13__DSPI3_SCK 0x1181
> + >;
> + };
> +
> + pinctrl_esdhc1: esdhc1grp {
> + fsl,pins = <
> + VF610_PAD_PTA24__ESDHC1_CLK 0x31ef
> + VF610_PAD_PTA25__ESDHC1_CMD 0x31ef
> + VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef
> + VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef
> + VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef
> + VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef
> + VF610_PAD_PTB28__GPIO_98 0x219d
> + >;
> + };
> +
> + pinctrl_fec0: fec0grp {
> + fsl,pins = <
> + VF610_PAD_PTA6__RMII_CLKIN 0x30dd
> + VF610_PAD_PTC0__ENET_RMII0_MDC 0x30de
> + VF610_PAD_PTC1__ENET_RMII0_MDIO 0x30df
> + VF610_PAD_PTC2__ENET_RMII0_CRS 0x30dd
> + VF610_PAD_PTC3__ENET_RMII0_RXD1 0x30dd
> + VF610_PAD_PTC4__ENET_RMII0_RXD0 0x30dd
> + VF610_PAD_PTC5__ENET_RMII0_RXER 0x30dd
> + VF610_PAD_PTC6__ENET_RMII0_TXD1 0x30de
> + VF610_PAD_PTC7__ENET_RMII0_TXD0 0x30de
> + VF610_PAD_PTC8__ENET_RMII0_TXEN 0x30de
> + >;
> + };
> +
> + pinctrl_fec1: fec1grp {
> + fsl,pins = <
> + VF610_PAD_PTC9__ENET_RMII1_MDC 0x30de
> + VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30df
> + VF610_PAD_PTC11__ENET_RMII1_CRS 0x30dd
> + VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30dd
> + VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30dd
> + VF610_PAD_PTC14__ENET_RMII1_RXER 0x30dd
> + VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30de
> + VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30de
> + VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30de
> + >;
> + };
> +
> + pinctrl_gpio_leds: gpio_leds {
> + fsl,pins = <
> + /* Heart bit LED */
> + VF610_PAD_PTE12__GPIO_117 0x1183
> + /* LEDS */
> + VF610_PAD_PTE15__GPIO_120 0x1183
> + VF610_PAD_PTA12__GPIO_5 0x1183
> + VF610_PAD_PTA16__GPIO_6 0x1183
> + VF610_PAD_PTE9__GPIO_114 0x1183
> + VF610_PAD_PTE20__GPIO_125 0x1183
> + VF610_PAD_PTE23__GPIO_128 0x1183
> + VF610_PAD_PTE16__GPIO_121 0x1183
> + >;
> + };
> +
> + pinctrl_i2c2: i2c2grp {
> + fsl,pins = <
> + VF610_PAD_PTA22__I2C2_SCL 0x34df
> + VF610_PAD_PTA23__I2C2_SDA 0x34df
> + >;
> + };
> +
> + pinctrl_nfc: nfcgrp {
> + fsl,pins = <
> + VF610_PAD_PTD23__NF_IO7 0x28df
> + VF610_PAD_PTD22__NF_IO6 0x28df
> + VF610_PAD_PTD21__NF_IO5 0x28df
> + VF610_PAD_PTD20__NF_IO4 0x28df
> + VF610_PAD_PTD19__NF_IO3 0x28df
> + VF610_PAD_PTD18__NF_IO2 0x28df
> + VF610_PAD_PTD17__NF_IO1 0x28df
> + VF610_PAD_PTD16__NF_IO0 0x28df
> + VF610_PAD_PTB24__NF_WE_B 0x28c2
> + VF610_PAD_PTB25__NF_CE0_B 0x28c2
> + VF610_PAD_PTB27__NF_RE_B 0x28c2
> + VF610_PAD_PTC26__NF_RB_B 0x283d
> + VF610_PAD_PTC27__NF_ALE 0x28c2
> + VF610_PAD_PTC28__NF_CLE 0x28c2
> + >;
> + };
> +
> + pinctrl_uart0: uart0grp {
> + fsl,pins = <
> + VF610_PAD_PTB10__UART0_TX 0x21a2
> + VF610_PAD_PTB11__UART0_RX 0x21a1
> + >;
> + };
> +
> + pinctrl_uart1: uart1grp {
> + fsl,pins = <
> + VF610_PAD_PTB4__UART1_TX 0x21a2
> + VF610_PAD_PTB5__UART1_RX 0x21a1
> + >;
> + };
> +
> + pinctrl_uart2: uart2grp {
> + fsl,pins = <
> + VF610_PAD_PTB6__UART2_TX 0x21a2
> + VF610_PAD_PTB7__UART2_RX 0x21a1
> + >;
> + };
> +
> + pinctrl_uart3: uart3grp {
> + fsl,pins = <
> + VF610_PAD_PTA20__UART3_TX 0x21a2
> + VF610_PAD_PTA21__UART3_RX 0x21a1
> + >;
> + };
> +
> + pinctrl_qspi0: qspi0grp {
> + fsl,pins = <
> + VF610_PAD_PTD0__QSPI0_A_QSCK 0x397f
> + VF610_PAD_PTD1__QSPI0_A_CS0 0x397f
> + VF610_PAD_PTD2__QSPI0_A_DATA3 0x397f
> + VF610_PAD_PTD3__QSPI0_A_DATA2 0x397f
> + VF610_PAD_PTD4__QSPI0_A_DATA1 0x397f
> + VF610_PAD_PTD5__QSPI0_A_DATA0 0x397f
> + VF610_PAD_PTD7__QSPI0_B_QSCK 0x397f
> + VF610_PAD_PTD8__QSPI0_B_CS0 0x397f
> + VF610_PAD_PTD11__QSPI0_B_DATA1 0x397f
> + VF610_PAD_PTD12__QSPI0_B_DATA0 0x397f
> + >;
> + };
> +};
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v2] ARM: dts: Add support for Liebherr's BK4 device (vf610 based)
2018-09-27 22:18 ` [PATCH v2] " Lukasz Majewski
2018-09-28 9:00 ` Stefan Agner
@ 2018-10-08 12:25 ` Lukasz Majewski
2018-10-08 14:34 ` Shawn Guo
2 siblings, 0 replies; 20+ messages in thread
From: Lukasz Majewski @ 2018-10-08 12:25 UTC (permalink / raw)
To: Shawn Guo, Rob Herring, Mark Rutland
Cc: Sascha Hauer, devicetree, linux-kernel, linux-arm-kernel,
Pengutronix Kernel Team, Stefan Agner, Fabio Estevam,
Fabio Estevam
[-- Attachment #1: Type: text/plain, Size: 14523 bytes --]
Dear All,
> This commit adds DTS support for BK4 device from Liebherr. It
> uses vf610 SoC from NXP.
>
Gentle ping on this patch...
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> ---
> Changes for v2:
>
> - Rename enet_ext and audio_ext oscillator names
> - Move regulators from simple-bus (and rename to reg_3p3v:
> regulator-3p3v)
> - Add stdout-path property to chosen node
> - Move iomuxc node to the end (as it is so large)
> - Sort with alphabetical order
> - Rename the default pinctrl to "hog"
> - Move LED pins definition from "hog" to "led" group
> - Add more descriptive names to default pins pinmux definition
> - Use spi-slave property to describe node working in this mode
> - Rename the spidev3 node to slave
> - Introduce new compatible name (lwn,bk4) for spidev driver (to avoid
> confusion)
> - Update some compatibles to match current kernel
> ---
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/vf610-bk4.dts | 499
> ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 500
> insertions(+) create mode 100644 arch/arm/boot/dts/vf610-bk4.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index b5bd3de87c33..e6f159895fa9 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -577,6 +577,7 @@ dtb-$(CONFIG_SOC_LS1021A) += \
> ls1021a-twr.dtb
> dtb-$(CONFIG_SOC_VF610) += \
> vf500-colibri-eval-v3.dtb \
> + vf610-bk4.dtb \
> vf610-colibri-eval-v3.dtb \
> vf610m4-colibri.dtb \
> vf610-cosmic.dtb \
> diff --git a/arch/arm/boot/dts/vf610-bk4.dts
> b/arch/arm/boot/dts/vf610-bk4.dts new file mode 100644
> index 000000000000..78c5723d6f64
> --- /dev/null
> +++ b/arch/arm/boot/dts/vf610-bk4.dts
> @@ -0,0 +1,499 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright 2018
> + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
> + */
> +
> +/dts-v1/;
> +#include "vf610.dtsi"
> +
> +/ {
> + model = "Liebherr BK4 controller";
> + compatible = "lwn,bk4", "fsl,vf610";
> +
> + chosen {
> + stdout-path = &uart1;
> + };
> +
> + memory@80000000 {
> + reg = <0x80000000 0x8000000>;
> + };
> +
> + audio_ext: oscillator-audio {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <24576000>;
> + };
> +
> + enet_ext: oscillator-ethernet {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <50000000>;
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_gpio_leds>;
> +
> + /* LED D5 */
> + led0: heartbeat {
> + label = "heartbeat";
> + gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
> + default-state = "on";
> + linux,default-trigger = "heartbeat";
> + };
> + };
> +
> + reg_3p3v: regulator-3p3v {
> + compatible = "regulator-fixed";
> + regulator-name = "3P3V";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> +
> + reg_vcc_3v3_mcu: regulator-vcc_3v3_mcu {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc_3v3_mcu";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + };
> +};
> +
> +&adc0 {
> + vref-supply = <®_vcc_3v3_mcu>;
> + status = "okay";
> +};
> +
> +&adc1 {
> + vref-supply = <®_vcc_3v3_mcu>;
> + status = "okay";
> +};
> +
> +&can0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_can0>;
> + status = "okay";
> +};
> +
> +&can1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_can1>;
> + status = "okay";
> +};
> +
> +&clks {
> + clocks = <&sxosc>, <&fxosc>, <&enet_ext>, <&audio_ext>;
> + clock-names = "sxosc", "fxosc", "enet_ext", "audio_ext";
> +};
> +
> +&dspi0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_dspi0>;
> + bus-num = <0>;
> + status = "okay";
> +
> + spidev0@0 {
> + compatible = "lwn,bk4";
> + spi-max-frequency = <30000000>;
> + reg = <0>;
> + fsl,spi-cs-sck-delay = <200>;
> + fsl,spi-sck-cs-delay = <400>;
> + };
> +};
> +
> +&dspi3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_dspi3>;
> + bus-num = <3>;
> + status = "okay";
> + spi-slave;
> +
> + slave@0 {
> + compatible = "lwn,bk4";
> + spi-max-frequency = <30000000>;
> + reg = <0>;
> + };
> +};
> +
> +&edma0 {
> + status = "okay";
> +};
> +
> +&edma1 {
> + status = "okay";
> +};
> +
> +&esdhc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_esdhc1>;
> + bus-width = <4>;
> + cd-gpios = <&gpio3 2 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +};
> +
> +&fec0 {
> + phy-mode = "rmii";
> + phy-handle = <ðphy0>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_fec0>;
> + status = "okay";
> +
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + ethphy0: ethernet-phy@1 {
> + reg = <1>;
> + clocks = <&clks VF610_CLK_ENET_50M>;
> + clock-names = "rmii-ref";
> + };
> + };
> +};
> +
> +&fec1 {
> + phy-mode = "rmii";
> + phy-handle = <ðphy1>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_fec1>;
> + status = "okay";
> +
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + ethphy1: ethernet-phy@1 {
> + reg = <1>;
> + clocks = <&clks VF610_CLK_ENET_50M>;
> + clock-names = "rmii-ref";
> + };
> + };
> +};
> +
> +&i2c2 {
> + clock-frequency = <400000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2>;
> + status = "okay";
> +
> + eeprom: eeprom@50 {
> + compatible = "atmel,24c256";
> + reg = <0x50>;
> + };
> +
> + rtc: rtc@68 {
> + compatible = "st,m41t62";
> + reg = <0x68>;
> + };
> +};
> +
> +&nfc {
> + assigned-clocks = <&clks VF610_CLK_NFC>;
> + assigned-clock-rates = <33000000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_nfc>;
> + status = "okay";
> +
> + nand@0 {
> + compatible = "fsl,vf610-nfc-nandcs";
> + reg = <0>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + nand-bus-width = <16>;
> + nand-ecc-mode = "hw";
> + nand-ecc-strength = <24>;
> + nand-ecc-step-size = <2048>;
> + nand-on-flash-bbt;
> + };
> +};
> +
> +&qspi0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_qspi0>;
> + status = "okay";
> +
> + flash0: n25q128a13@0 {
> + compatible = "n25q128a13", "jedec,spi-nor";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + spi-max-frequency = <66000000>;
> + spi-rx-bus-width = <4>;
> + reg = <0>;
> + };
> +
> + flash1: n25q128a13@1 {
> + compatible = "n25q128a13", "jedec,spi-nor";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + spi-max-frequency = <66000000>;
> + spi-rx-bus-width = <2>;
> + reg = <1>;
> + };
> +};
> +
> +&uart0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart0>;
> + status = "okay";
> +};
> +
> +&uart1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart1>;
> + status = "okay";
> +};
> +
> +&uart2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart2>;
> + status = "okay";
> +};
> +
> +&uart3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart3>;
> + status = "okay";
> +};
> +
> +&usbdev0 {
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usbh1 {
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usbmisc0 {
> + status = "okay";
> +};
> +
> +&usbmisc1 {
> + status = "okay";
> +};
> +
> +&usbphy0 {
> + status = "okay";
> +};
> +
> +&usbphy1 {
> + status = "okay";
> +};
> +
> +&iomuxc {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_hog>;
> +
> + pinctrl_hog: hoggrp {
> + fsl,pins = <
> + /* One_Wire_PSU_EN */
> + VF610_PAD_PTC29__GPIO_102
> 0x1183
> + /* SPI ENABLE */
> + VF610_PAD_PTB26__GPIO_96
> 0x1183
> + /* EB control */
> + VF610_PAD_PTE14__GPIO_119
> 0x1183
> + VF610_PAD_PTE4__GPIO_109
> 0x1181
> + /* Feedback_Lines */
> + VF610_PAD_PTC31__GPIO_104
> 0x1181
> + VF610_PAD_PTA7__GPIO_134
> 0x1181
> + VF610_PAD_PTD9__GPIO_88 0x1181
> + VF610_PAD_PTE1__GPIO_106
> 0x1183
> + VF610_PAD_PTB2__GPIO_24 0x1181
> + VF610_PAD_PTB3__GPIO_25 0x1181
> + VF610_PAD_PTB1__GPIO_23 0x1181
> + /* SDHC Enable */
> + VF610_PAD_PTE19__GPIO_124
> 0x1183
> + /* SDHC Overcurrent */
> + VF610_PAD_PTB23__GPIO_93
> 0x1181
> + /* GPI */
> + VF610_PAD_PTE2__GPIO_107
> 0x1181
> + VF610_PAD_PTE3__GPIO_108
> 0x1181
> + VF610_PAD_PTE5__GPIO_110
> 0x1181
> + VF610_PAD_PTE6__GPIO_111
> 0x1181
> + /* GPO */
> + VF610_PAD_PTE0__GPIO_105
> 0x1183
> + VF610_PAD_PTE7__GPIO_112
> 0x1183
> + /* RS485 Control */
> + VF610_PAD_PTB8__GPIO_30 0x1183
> + VF610_PAD_PTB9__GPIO_31 0x1183
> + VF610_PAD_PTE8__GPIO_113
> 0x1183
> + /* MPBUS MPB_EN */
> + VF610_PAD_PTE28__GPIO_133
> 0x1183
> + /* MISC */
> + VF610_PAD_PTE10__GPIO_115
> 0x1183
> + VF610_PAD_PTE11__GPIO_116
> 0x1183
> + VF610_PAD_PTE17__GPIO_122
> 0x1183
> + VF610_PAD_PTC30__GPIO_103
> 0x1183
> + VF610_PAD_PTB0__GPIO_22 0x1181
> + /* RESETINFO */
> + VF610_PAD_PTE26__GPIO_131
> 0x1183
> + VF610_PAD_PTD6__GPIO_85 0x1181
> + VF610_PAD_PTE27__GPIO_132
> 0x1181
> + VF610_PAD_PTE13__GPIO_118
> 0x1181
> + VF610_PAD_PTE21__GPIO_126
> 0x1181
> + VF610_PAD_PTE22__GPIO_127
> 0x1181
> + /* EE_5V_EN */
> + VF610_PAD_PTE18__GPIO_123
> 0x1183
> + /* EE_5V_OC_N */
> + VF610_PAD_PTE25__GPIO_130
> 0x1181
> + >;
> + };
> +
> + pinctrl_can0: can0grp {
> + fsl,pins = <
> + VF610_PAD_PTB14__CAN0_RX
> 0x1181
> + VF610_PAD_PTB15__CAN0_TX
> 0x1182
> + >;
> + };
> +
> + pinctrl_can1: can1grp {
> + fsl,pins = <
> + VF610_PAD_PTB16__CAN1_RX
> 0x1181
> + VF610_PAD_PTB17__CAN1_TX
> 0x1182
> + >;
> + };
> +
> + pinctrl_dspi0: dspi0grp {
> + fsl,pins = <
> + VF610_PAD_PTB18__DSPI0_CS1
> 0x1182
> + VF610_PAD_PTB19__DSPI0_CS0
> 0x1182
> + VF610_PAD_PTB20__DSPI0_SIN
> 0x1181
> + VF610_PAD_PTB21__DSPI0_SOUT
> 0x1182
> + VF610_PAD_PTB22__DSPI0_SCK
> 0x1182
> + >;
> + };
> +
> + pinctrl_dspi3: dspi3grp {
> + fsl,pins = <
> + VF610_PAD_PTD10__DSPI3_CS0
> 0x1181
> + VF610_PAD_PTD11__DSPI3_SIN
> 0x1181
> + VF610_PAD_PTD12__DSPI3_SOUT
> 0x1182
> + VF610_PAD_PTD13__DSPI3_SCK
> 0x1181
> + >;
> + };
> +
> + pinctrl_esdhc1: esdhc1grp {
> + fsl,pins = <
> + VF610_PAD_PTA24__ESDHC1_CLK
> 0x31ef
> + VF610_PAD_PTA25__ESDHC1_CMD
> 0x31ef
> + VF610_PAD_PTA26__ESDHC1_DAT0
> 0x31ef
> + VF610_PAD_PTA27__ESDHC1_DAT1
> 0x31ef
> + VF610_PAD_PTA28__ESDHC1_DATA2
> 0x31ef
> + VF610_PAD_PTA29__ESDHC1_DAT3
> 0x31ef
> + VF610_PAD_PTB28__GPIO_98
> 0x219d
> + >;
> + };
> +
> + pinctrl_fec0: fec0grp {
> + fsl,pins = <
> + VF610_PAD_PTA6__RMII_CLKIN
> 0x30dd
> +
> VF610_PAD_PTC0__ENET_RMII0_MDC 0x30de
> + VF610_PAD_PTC1__ENET_RMII0_MDIO 0x30df
> +
> VF610_PAD_PTC2__ENET_RMII0_CRS 0x30dd
> + VF610_PAD_PTC3__ENET_RMII0_RXD1 0x30dd
> + VF610_PAD_PTC4__ENET_RMII0_RXD0 0x30dd
> + VF610_PAD_PTC5__ENET_RMII0_RXER 0x30dd
> + VF610_PAD_PTC6__ENET_RMII0_TXD1 0x30de
> + VF610_PAD_PTC7__ENET_RMII0_TXD0 0x30de
> + VF610_PAD_PTC8__ENET_RMII0_TXEN 0x30de
> + >;
> + };
> +
> + pinctrl_fec1: fec1grp {
> + fsl,pins = <
> +
> VF610_PAD_PTC9__ENET_RMII1_MDC 0x30de
> + VF610_PAD_PTC10__ENET_RMII1_MDIO
> 0x30df
> + VF610_PAD_PTC11__ENET_RMII1_CRS 0x30dd
> + VF610_PAD_PTC12__ENET_RMII1_RXD1
> 0x30dd
> + VF610_PAD_PTC13__ENET_RMII1_RXD0
> 0x30dd
> + VF610_PAD_PTC14__ENET_RMII1_RXER
> 0x30dd
> + VF610_PAD_PTC15__ENET_RMII1_TXD1
> 0x30de
> + VF610_PAD_PTC16__ENET_RMII1_TXD0
> 0x30de
> + VF610_PAD_PTC17__ENET_RMII1_TXEN
> 0x30de
> + >;
> + };
> +
> + pinctrl_gpio_leds: gpio_leds {
> + fsl,pins = <
> + /* Heart bit LED */
> + VF610_PAD_PTE12__GPIO_117 0x1183
> + /* LEDS */
> + VF610_PAD_PTE15__GPIO_120 0x1183
> + VF610_PAD_PTA12__GPIO_5 0x1183
> + VF610_PAD_PTA16__GPIO_6 0x1183
> + VF610_PAD_PTE9__GPIO_114 0x1183
> + VF610_PAD_PTE20__GPIO_125 0x1183
> + VF610_PAD_PTE23__GPIO_128 0x1183
> + VF610_PAD_PTE16__GPIO_121 0x1183
> + >;
> + };
> +
> + pinctrl_i2c2: i2c2grp {
> + fsl,pins = <
> + VF610_PAD_PTA22__I2C2_SCL
> 0x34df
> + VF610_PAD_PTA23__I2C2_SDA
> 0x34df
> + >;
> + };
> +
> + pinctrl_nfc: nfcgrp {
> + fsl,pins = <
> + VF610_PAD_PTD23__NF_IO7 0x28df
> + VF610_PAD_PTD22__NF_IO6 0x28df
> + VF610_PAD_PTD21__NF_IO5 0x28df
> + VF610_PAD_PTD20__NF_IO4 0x28df
> + VF610_PAD_PTD19__NF_IO3 0x28df
> + VF610_PAD_PTD18__NF_IO2 0x28df
> + VF610_PAD_PTD17__NF_IO1 0x28df
> + VF610_PAD_PTD16__NF_IO0 0x28df
> + VF610_PAD_PTB24__NF_WE_B
> 0x28c2
> + VF610_PAD_PTB25__NF_CE0_B
> 0x28c2
> + VF610_PAD_PTB27__NF_RE_B
> 0x28c2
> + VF610_PAD_PTC26__NF_RB_B
> 0x283d
> + VF610_PAD_PTC27__NF_ALE 0x28c2
> + VF610_PAD_PTC28__NF_CLE 0x28c2
> + >;
> + };
> +
> + pinctrl_uart0: uart0grp {
> + fsl,pins = <
> + VF610_PAD_PTB10__UART0_TX
> 0x21a2
> + VF610_PAD_PTB11__UART0_RX
> 0x21a1
> + >;
> + };
> +
> + pinctrl_uart1: uart1grp {
> + fsl,pins = <
> + VF610_PAD_PTB4__UART1_TX
> 0x21a2
> + VF610_PAD_PTB5__UART1_RX
> 0x21a1
> + >;
> + };
> +
> + pinctrl_uart2: uart2grp {
> + fsl,pins = <
> + VF610_PAD_PTB6__UART2_TX
> 0x21a2
> + VF610_PAD_PTB7__UART2_RX
> 0x21a1
> + >;
> + };
> +
> + pinctrl_uart3: uart3grp {
> + fsl,pins = <
> + VF610_PAD_PTA20__UART3_TX
> 0x21a2
> + VF610_PAD_PTA21__UART3_RX
> 0x21a1
> + >;
> + };
> +
> + pinctrl_qspi0: qspi0grp {
> + fsl,pins = <
> + VF610_PAD_PTD0__QSPI0_A_QSCK 0x397f
> + VF610_PAD_PTD1__QSPI0_A_CS0 0x397f
> + VF610_PAD_PTD2__QSPI0_A_DATA3 0x397f
> + VF610_PAD_PTD3__QSPI0_A_DATA2 0x397f
> + VF610_PAD_PTD4__QSPI0_A_DATA1 0x397f
> + VF610_PAD_PTD5__QSPI0_A_DATA0 0x397f
> + VF610_PAD_PTD7__QSPI0_B_QSCK 0x397f
> + VF610_PAD_PTD8__QSPI0_B_CS0 0x397f
> + VF610_PAD_PTD11__QSPI0_B_DATA1 0x397f
> + VF610_PAD_PTD12__QSPI0_B_DATA0 0x397f
> + >;
> + };
> +};
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v2] ARM: dts: Add support for Liebherr's BK4 device (vf610 based)
2018-09-27 22:18 ` [PATCH v2] " Lukasz Majewski
2018-09-28 9:00 ` Stefan Agner
2018-10-08 12:25 ` Lukasz Majewski
@ 2018-10-08 14:34 ` Shawn Guo
2 siblings, 0 replies; 20+ messages in thread
From: Shawn Guo @ 2018-10-08 14:34 UTC (permalink / raw)
To: Lukasz Majewski
Cc: Rob Herring, Mark Rutland, Sascha Hauer, devicetree,
linux-kernel, linux-arm-kernel, Pengutronix Kernel Team,
Stefan Agner, Fabio Estevam, Fabio Estevam
On Fri, Sep 28, 2018 at 12:18:31AM +0200, Lukasz Majewski wrote:
> This commit adds DTS support for BK4 device from Liebherr. It
> uses vf610 SoC from NXP.
>
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> ---
> Changes for v2:
>
> - Rename enet_ext and audio_ext oscillator names
> - Move regulators from simple-bus (and rename to reg_3p3v: regulator-3p3v)
> - Add stdout-path property to chosen node
> - Move iomuxc node to the end (as it is so large)
> - Sort with alphabetical order
> - Rename the default pinctrl to "hog"
> - Move LED pins definition from "hog" to "led" group
> - Add more descriptive names to default pins pinmux definition
> - Use spi-slave property to describe node working in this mode
> - Rename the spidev3 node to slave
> - Introduce new compatible name (lwn,bk4) for spidev driver (to avoid
> confusion)
> - Update some compatibles to match current kernel
> ---
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/vf610-bk4.dts | 499 ++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 500 insertions(+)
> create mode 100644 arch/arm/boot/dts/vf610-bk4.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index b5bd3de87c33..e6f159895fa9 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -577,6 +577,7 @@ dtb-$(CONFIG_SOC_LS1021A) += \
> ls1021a-twr.dtb
> dtb-$(CONFIG_SOC_VF610) += \
> vf500-colibri-eval-v3.dtb \
> + vf610-bk4.dtb \
> vf610-colibri-eval-v3.dtb \
> vf610m4-colibri.dtb \
> vf610-cosmic.dtb \
> diff --git a/arch/arm/boot/dts/vf610-bk4.dts b/arch/arm/boot/dts/vf610-bk4.dts
> new file mode 100644
> index 000000000000..78c5723d6f64
> --- /dev/null
> +++ b/arch/arm/boot/dts/vf610-bk4.dts
> @@ -0,0 +1,499 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright 2018
> + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
> + */
> +
> +/dts-v1/;
> +#include "vf610.dtsi"
> +
> +/ {
> + model = "Liebherr BK4 controller";
> + compatible = "lwn,bk4", "fsl,vf610";
> +
> + chosen {
> + stdout-path = &uart1;
> + };
> +
> + memory@80000000 {
> + reg = <0x80000000 0x8000000>;
> + };
> +
> + audio_ext: oscillator-audio {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <24576000>;
> + };
> +
> + enet_ext: oscillator-ethernet {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <50000000>;
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_gpio_leds>;
> +
> + /* LED D5 */
> + led0: heartbeat {
> + label = "heartbeat";
> + gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
> + default-state = "on";
> + linux,default-trigger = "heartbeat";
> + };
> + };
> +
> + reg_3p3v: regulator-3p3v {
> + compatible = "regulator-fixed";
> + regulator-name = "3P3V";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> +
> + reg_vcc_3v3_mcu: regulator-vcc_3v3_mcu {
We usually use hyphen rather than underscore in node name for all cases.
In this case, naming it regulator-vcc3v3mcu looks good to me.
> + compatible = "regulator-fixed";
> + regulator-name = "vcc_3v3_mcu";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + };
> +};
> +
> +&adc0 {
> + vref-supply = <®_vcc_3v3_mcu>;
> + status = "okay";
> +};
> +
> +&adc1 {
> + vref-supply = <®_vcc_3v3_mcu>;
> + status = "okay";
> +};
> +
> +&can0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_can0>;
> + status = "okay";
> +};
> +
> +&can1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_can1>;
> + status = "okay";
> +};
> +
> +&clks {
> + clocks = <&sxosc>, <&fxosc>, <&enet_ext>, <&audio_ext>;
> + clock-names = "sxosc", "fxosc", "enet_ext", "audio_ext";
> +};
> +
> +&dspi0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_dspi0>;
> + bus-num = <0>;
> + status = "okay";
> +
> + spidev0@0 {
> + compatible = "lwn,bk4";
> + spi-max-frequency = <30000000>;
> + reg = <0>;
> + fsl,spi-cs-sck-delay = <200>;
> + fsl,spi-sck-cs-delay = <400>;
> + };
> +};
> +
> +&dspi3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_dspi3>;
> + bus-num = <3>;
> + status = "okay";
> + spi-slave;
> +
> + slave@0 {
> + compatible = "lwn,bk4";
> + spi-max-frequency = <30000000>;
> + reg = <0>;
> + };
> +};
> +
> +&edma0 {
> + status = "okay";
> +};
> +
> +&edma1 {
> + status = "okay";
> +};
> +
> +&esdhc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_esdhc1>;
> + bus-width = <4>;
> + cd-gpios = <&gpio3 2 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +};
> +
> +&fec0 {
> + phy-mode = "rmii";
> + phy-handle = <ðphy0>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_fec0>;
> + status = "okay";
> +
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
Please have a newline between properties and child node.
> + ethphy0: ethernet-phy@1 {
> + reg = <1>;
> + clocks = <&clks VF610_CLK_ENET_50M>;
> + clock-names = "rmii-ref";
> + };
> + };
> +};
> +
> +&fec1 {
> + phy-mode = "rmii";
> + phy-handle = <ðphy1>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_fec1>;
> + status = "okay";
> +
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
Ditto
> + ethphy1: ethernet-phy@1 {
> + reg = <1>;
> + clocks = <&clks VF610_CLK_ENET_50M>;
> + clock-names = "rmii-ref";
> + };
> + };
> +};
> +
> +&i2c2 {
> + clock-frequency = <400000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2>;
> + status = "okay";
> +
> + eeprom: eeprom@50 {
It might be better to label the node with model name as below.
24c256: eeprom
> + compatible = "atmel,24c256";
> + reg = <0x50>;
> + };
> +
> + rtc: rtc@68 {
m41t62: rtc
> + compatible = "st,m41t62";
> + reg = <0x68>;
> + };
> +};
> +
> +&nfc {
> + assigned-clocks = <&clks VF610_CLK_NFC>;
> + assigned-clock-rates = <33000000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_nfc>;
> + status = "okay";
> +
> + nand@0 {
> + compatible = "fsl,vf610-nfc-nandcs";
> + reg = <0>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + nand-bus-width = <16>;
> + nand-ecc-mode = "hw";
> + nand-ecc-strength = <24>;
> + nand-ecc-step-size = <2048>;
> + nand-on-flash-bbt;
> + };
> +};
> +
> +&qspi0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_qspi0>;
> + status = "okay";
> +
> + flash0: n25q128a13@0 {
Node name should be generic and label name should be specific.
n25q128a13_0: flash@0
> + compatible = "n25q128a13", "jedec,spi-nor";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + spi-max-frequency = <66000000>;
> + spi-rx-bus-width = <4>;
> + reg = <0>;
> + };
> +
> + flash1: n25q128a13@1 {
n25q128a13_1: flash@1
> + compatible = "n25q128a13", "jedec,spi-nor";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + spi-max-frequency = <66000000>;
> + spi-rx-bus-width = <2>;
> + reg = <1>;
> + };
> +};
> +
> +&uart0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart0>;
> + status = "okay";
> +};
> +
> +&uart1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart1>;
> + status = "okay";
> +};
> +
> +&uart2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart2>;
> + status = "okay";
> +};
> +
> +&uart3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart3>;
> + status = "okay";
> +};
> +
> +&usbdev0 {
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usbh1 {
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usbmisc0 {
> + status = "okay";
> +};
> +
> +&usbmisc1 {
> + status = "okay";
> +};
> +
> +&usbphy0 {
> + status = "okay";
> +};
> +
> +&usbphy1 {
> + status = "okay";
> +};
> +
> +&iomuxc {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_hog>;
> +
> + pinctrl_hog: hoggrp {
> + fsl,pins = <
> + /* One_Wire_PSU_EN */
> + VF610_PAD_PTC29__GPIO_102 0x1183
> + /* SPI ENABLE */
> + VF610_PAD_PTB26__GPIO_96 0x1183
> + /* EB control */
> + VF610_PAD_PTE14__GPIO_119 0x1183
> + VF610_PAD_PTE4__GPIO_109 0x1181
> + /* Feedback_Lines */
> + VF610_PAD_PTC31__GPIO_104 0x1181
> + VF610_PAD_PTA7__GPIO_134 0x1181
> + VF610_PAD_PTD9__GPIO_88 0x1181
> + VF610_PAD_PTE1__GPIO_106 0x1183
> + VF610_PAD_PTB2__GPIO_24 0x1181
> + VF610_PAD_PTB3__GPIO_25 0x1181
> + VF610_PAD_PTB1__GPIO_23 0x1181
> + /* SDHC Enable */
> + VF610_PAD_PTE19__GPIO_124 0x1183
> + /* SDHC Overcurrent */
> + VF610_PAD_PTB23__GPIO_93 0x1181
> + /* GPI */
> + VF610_PAD_PTE2__GPIO_107 0x1181
> + VF610_PAD_PTE3__GPIO_108 0x1181
> + VF610_PAD_PTE5__GPIO_110 0x1181
> + VF610_PAD_PTE6__GPIO_111 0x1181
> + /* GPO */
> + VF610_PAD_PTE0__GPIO_105 0x1183
> + VF610_PAD_PTE7__GPIO_112 0x1183
> + /* RS485 Control */
> + VF610_PAD_PTB8__GPIO_30 0x1183
> + VF610_PAD_PTB9__GPIO_31 0x1183
> + VF610_PAD_PTE8__GPIO_113 0x1183
> + /* MPBUS MPB_EN */
> + VF610_PAD_PTE28__GPIO_133 0x1183
> + /* MISC */
> + VF610_PAD_PTE10__GPIO_115 0x1183
> + VF610_PAD_PTE11__GPIO_116 0x1183
> + VF610_PAD_PTE17__GPIO_122 0x1183
> + VF610_PAD_PTC30__GPIO_103 0x1183
> + VF610_PAD_PTB0__GPIO_22 0x1181
> + /* RESETINFO */
> + VF610_PAD_PTE26__GPIO_131 0x1183
> + VF610_PAD_PTD6__GPIO_85 0x1181
> + VF610_PAD_PTE27__GPIO_132 0x1181
> + VF610_PAD_PTE13__GPIO_118 0x1181
> + VF610_PAD_PTE21__GPIO_126 0x1181
> + VF610_PAD_PTE22__GPIO_127 0x1181
> + /* EE_5V_EN */
> + VF610_PAD_PTE18__GPIO_123 0x1183
> + /* EE_5V_OC_N */
> + VF610_PAD_PTE25__GPIO_130 0x1181
> + >;
> + };
> +
> + pinctrl_can0: can0grp {
> + fsl,pins = <
> + VF610_PAD_PTB14__CAN0_RX 0x1181
> + VF610_PAD_PTB15__CAN0_TX 0x1182
> + >;
> + };
> +
> + pinctrl_can1: can1grp {
> + fsl,pins = <
> + VF610_PAD_PTB16__CAN1_RX 0x1181
> + VF610_PAD_PTB17__CAN1_TX 0x1182
> + >;
> + };
> +
> + pinctrl_dspi0: dspi0grp {
> + fsl,pins = <
> + VF610_PAD_PTB18__DSPI0_CS1 0x1182
> + VF610_PAD_PTB19__DSPI0_CS0 0x1182
> + VF610_PAD_PTB20__DSPI0_SIN 0x1181
> + VF610_PAD_PTB21__DSPI0_SOUT 0x1182
> + VF610_PAD_PTB22__DSPI0_SCK 0x1182
> + >;
> + };
> +
> + pinctrl_dspi3: dspi3grp {
> + fsl,pins = <
> + VF610_PAD_PTD10__DSPI3_CS0 0x1181
> + VF610_PAD_PTD11__DSPI3_SIN 0x1181
> + VF610_PAD_PTD12__DSPI3_SOUT 0x1182
> + VF610_PAD_PTD13__DSPI3_SCK 0x1181
> + >;
> + };
> +
> + pinctrl_esdhc1: esdhc1grp {
> + fsl,pins = <
> + VF610_PAD_PTA24__ESDHC1_CLK 0x31ef
> + VF610_PAD_PTA25__ESDHC1_CMD 0x31ef
> + VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef
> + VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef
> + VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef
> + VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef
> + VF610_PAD_PTB28__GPIO_98 0x219d
> + >;
> + };
> +
> + pinctrl_fec0: fec0grp {
> + fsl,pins = <
> + VF610_PAD_PTA6__RMII_CLKIN 0x30dd
> + VF610_PAD_PTC0__ENET_RMII0_MDC 0x30de
> + VF610_PAD_PTC1__ENET_RMII0_MDIO 0x30df
> + VF610_PAD_PTC2__ENET_RMII0_CRS 0x30dd
> + VF610_PAD_PTC3__ENET_RMII0_RXD1 0x30dd
> + VF610_PAD_PTC4__ENET_RMII0_RXD0 0x30dd
> + VF610_PAD_PTC5__ENET_RMII0_RXER 0x30dd
> + VF610_PAD_PTC6__ENET_RMII0_TXD1 0x30de
> + VF610_PAD_PTC7__ENET_RMII0_TXD0 0x30de
> + VF610_PAD_PTC8__ENET_RMII0_TXEN 0x30de
> + >;
> + };
> +
> + pinctrl_fec1: fec1grp {
> + fsl,pins = <
> + VF610_PAD_PTC9__ENET_RMII1_MDC 0x30de
> + VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30df
> + VF610_PAD_PTC11__ENET_RMII1_CRS 0x30dd
> + VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30dd
> + VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30dd
> + VF610_PAD_PTC14__ENET_RMII1_RXER 0x30dd
> + VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30de
> + VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30de
> + VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30de
> + >;
> + };
> +
> + pinctrl_gpio_leds: gpio_leds {
gpioledsgrp would be more consistent to others.
> + fsl,pins = <
> + /* Heart bit LED */
> + VF610_PAD_PTE12__GPIO_117 0x1183
> + /* LEDS */
> + VF610_PAD_PTE15__GPIO_120 0x1183
> + VF610_PAD_PTA12__GPIO_5 0x1183
> + VF610_PAD_PTA16__GPIO_6 0x1183
> + VF610_PAD_PTE9__GPIO_114 0x1183
> + VF610_PAD_PTE20__GPIO_125 0x1183
> + VF610_PAD_PTE23__GPIO_128 0x1183
> + VF610_PAD_PTE16__GPIO_121 0x1183
> + >;
> + };
> +
> + pinctrl_i2c2: i2c2grp {
> + fsl,pins = <
> + VF610_PAD_PTA22__I2C2_SCL 0x34df
> + VF610_PAD_PTA23__I2C2_SDA 0x34df
> + >;
> + };
> +
> + pinctrl_nfc: nfcgrp {
> + fsl,pins = <
> + VF610_PAD_PTD23__NF_IO7 0x28df
> + VF610_PAD_PTD22__NF_IO6 0x28df
> + VF610_PAD_PTD21__NF_IO5 0x28df
> + VF610_PAD_PTD20__NF_IO4 0x28df
> + VF610_PAD_PTD19__NF_IO3 0x28df
> + VF610_PAD_PTD18__NF_IO2 0x28df
> + VF610_PAD_PTD17__NF_IO1 0x28df
> + VF610_PAD_PTD16__NF_IO0 0x28df
> + VF610_PAD_PTB24__NF_WE_B 0x28c2
> + VF610_PAD_PTB25__NF_CE0_B 0x28c2
> + VF610_PAD_PTB27__NF_RE_B 0x28c2
> + VF610_PAD_PTC26__NF_RB_B 0x283d
> + VF610_PAD_PTC27__NF_ALE 0x28c2
> + VF610_PAD_PTC28__NF_CLE 0x28c2
> + >;
> + };
> +
> + pinctrl_uart0: uart0grp {
> + fsl,pins = <
> + VF610_PAD_PTB10__UART0_TX 0x21a2
> + VF610_PAD_PTB11__UART0_RX 0x21a1
> + >;
> + };
> +
> + pinctrl_uart1: uart1grp {
> + fsl,pins = <
> + VF610_PAD_PTB4__UART1_TX 0x21a2
> + VF610_PAD_PTB5__UART1_RX 0x21a1
> + >;
> + };
> +
> + pinctrl_uart2: uart2grp {
> + fsl,pins = <
> + VF610_PAD_PTB6__UART2_TX 0x21a2
> + VF610_PAD_PTB7__UART2_RX 0x21a1
> + >;
> + };
> +
> + pinctrl_uart3: uart3grp {
> + fsl,pins = <
> + VF610_PAD_PTA20__UART3_TX 0x21a2
> + VF610_PAD_PTA21__UART3_RX 0x21a1
> + >;
> + };
> +
> + pinctrl_qspi0: qspi0grp {
This one is out of alphabetic order.
Shawn
> + fsl,pins = <
> + VF610_PAD_PTD0__QSPI0_A_QSCK 0x397f
> + VF610_PAD_PTD1__QSPI0_A_CS0 0x397f
> + VF610_PAD_PTD2__QSPI0_A_DATA3 0x397f
> + VF610_PAD_PTD3__QSPI0_A_DATA2 0x397f
> + VF610_PAD_PTD4__QSPI0_A_DATA1 0x397f
> + VF610_PAD_PTD5__QSPI0_A_DATA0 0x397f
> + VF610_PAD_PTD7__QSPI0_B_QSCK 0x397f
> + VF610_PAD_PTD8__QSPI0_B_CS0 0x397f
> + VF610_PAD_PTD11__QSPI0_B_DATA1 0x397f
> + VF610_PAD_PTD12__QSPI0_B_DATA0 0x397f
> + >;
> + };
> +};
> --
> 2.11.0
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH v3] ARM: dts: Add support for Liebherr's BK4 device (vf610 based)
2018-09-21 15:27 [PATCH] ARM: dts: Add support for Liebherr's BK4 device (vf610 based) Lukasz Majewski
` (2 preceding siblings ...)
2018-09-27 22:18 ` [PATCH v2] " Lukasz Majewski
@ 2018-10-09 10:50 ` Lukasz Majewski
2018-10-09 11:09 ` Fabio Estevam
` (2 more replies)
3 siblings, 3 replies; 20+ messages in thread
From: Lukasz Majewski @ 2018-10-09 10:50 UTC (permalink / raw)
To: Shawn Guo, Rob Herring, Mark Rutland
Cc: Sascha Hauer, devicetree, linux-kernel, linux-arm-kernel,
Pengutronix Kernel Team, Stefan Agner, Fabio Estevam,
Fabio Estevam, Lukasz Majewski
This commit adds DTS support for BK4 device from Liebherr. It
uses vf610 SoC from NXP.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
---
Changes for v3:
- Rename regulator-vcc_3v3_mcu -> regulator-vcc3v3mcu
- Add a blank line between properties and node @ mdio
- Rename rtc and eeprom node's labels and names
- Rename flash nodes
- Rename 'gpio_leds' -> 'gpioledsgrp'
- Move 'pinctrl_qspi0: qspi0grp' to be in alphabetic order
Changes for v2:
- Rename enet_ext and audio_ext oscillator names
- Move regulators from simple-bus (and rename to reg_3p3v: regulator-3p3v)
- Add stdout-path property to chosen node
- Move iomuxc node to the end (as it is so large)
- Sort with alphabetical order
- Rename the default pinctrl to "hog"
- Move LED pins definition from "hog" to "led" group
- Add more descriptive names to default pins pinmux definition
- Use spi-slave property to describe node working in this mode
- Rename the spidev3 node to slave
- Introduce new compatible name (lwn,bk4) for spidev driver (to avoid
confusion)
- Update some compatibles to match current kernel
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/vf610-bk4.dts | 501 ++++++++++++++++++++++++++++++++++++++++
2 files changed, 502 insertions(+)
create mode 100644 arch/arm/boot/dts/vf610-bk4.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index b5bd3de87c33..e6f159895fa9 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -577,6 +577,7 @@ dtb-$(CONFIG_SOC_LS1021A) += \
ls1021a-twr.dtb
dtb-$(CONFIG_SOC_VF610) += \
vf500-colibri-eval-v3.dtb \
+ vf610-bk4.dtb \
vf610-colibri-eval-v3.dtb \
vf610m4-colibri.dtb \
vf610-cosmic.dtb \
diff --git a/arch/arm/boot/dts/vf610-bk4.dts b/arch/arm/boot/dts/vf610-bk4.dts
new file mode 100644
index 000000000000..cab95714c058
--- /dev/null
+++ b/arch/arm/boot/dts/vf610-bk4.dts
@@ -0,0 +1,501 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2018
+ * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
+ */
+
+/dts-v1/;
+#include "vf610.dtsi"
+
+/ {
+ model = "Liebherr BK4 controller";
+ compatible = "lwn,bk4", "fsl,vf610";
+
+ chosen {
+ stdout-path = &uart1;
+ };
+
+ memory@80000000 {
+ reg = <0x80000000 0x8000000>;
+ };
+
+ audio_ext: oscillator-audio {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24576000>;
+ };
+
+ enet_ext: oscillator-ethernet {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_leds>;
+
+ /* LED D5 */
+ led0: heartbeat {
+ label = "heartbeat";
+ gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ reg_vcc_3v3_mcu: regulator-vcc3v3mcu {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_3v3_mcu";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+};
+
+&adc0 {
+ vref-supply = <®_vcc_3v3_mcu>;
+ status = "okay";
+};
+
+&adc1 {
+ vref-supply = <®_vcc_3v3_mcu>;
+ status = "okay";
+};
+
+&can0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_can0>;
+ status = "okay";
+};
+
+&can1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_can1>;
+ status = "okay";
+};
+
+&clks {
+ clocks = <&sxosc>, <&fxosc>, <&enet_ext>, <&audio_ext>;
+ clock-names = "sxosc", "fxosc", "enet_ext", "audio_ext";
+};
+
+&dspi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_dspi0>;
+ bus-num = <0>;
+ status = "okay";
+
+ spidev0@0 {
+ compatible = "lwn,bk4";
+ spi-max-frequency = <30000000>;
+ reg = <0>;
+ fsl,spi-cs-sck-delay = <200>;
+ fsl,spi-sck-cs-delay = <400>;
+ };
+};
+
+&dspi3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_dspi3>;
+ bus-num = <3>;
+ status = "okay";
+ spi-slave;
+
+ slave@0 {
+ compatible = "lwn,bk4";
+ spi-max-frequency = <30000000>;
+ reg = <0>;
+ };
+};
+
+&edma0 {
+ status = "okay";
+};
+
+&edma1 {
+ status = "okay";
+};
+
+&esdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_esdhc1>;
+ bus-width = <4>;
+ cd-gpios = <&gpio3 2 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&fec0 {
+ phy-mode = "rmii";
+ phy-handle = <ðphy0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fec0>;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy0: ethernet-phy@1 {
+ reg = <1>;
+ clocks = <&clks VF610_CLK_ENET_50M>;
+ clock-names = "rmii-ref";
+ };
+ };
+};
+
+&fec1 {
+ phy-mode = "rmii";
+ phy-handle = <ðphy1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fec1>;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy1: ethernet-phy@1 {
+ reg = <1>;
+ clocks = <&clks VF610_CLK_ENET_50M>;
+ clock-names = "rmii-ref";
+ };
+ };
+};
+
+&i2c2 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+
+ at24c256: eeprom@50 {
+ compatible = "atmel,24c256";
+ reg = <0x50>;
+ };
+
+ m41t62: rtc@68 {
+ compatible = "st,m41t62";
+ reg = <0x68>;
+ };
+};
+
+&nfc {
+ assigned-clocks = <&clks VF610_CLK_NFC>;
+ assigned-clock-rates = <33000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_nfc>;
+ status = "okay";
+
+ nand@0 {
+ compatible = "fsl,vf610-nfc-nandcs";
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ nand-bus-width = <16>;
+ nand-ecc-mode = "hw";
+ nand-ecc-strength = <24>;
+ nand-ecc-step-size = <2048>;
+ nand-on-flash-bbt;
+ };
+};
+
+&qspi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_qspi0>;
+ status = "okay";
+
+ n25q128a13_4: flash@0 {
+ compatible = "n25q128a13", "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <66000000>;
+ spi-rx-bus-width = <4>;
+ reg = <0>;
+ };
+
+ n25q128a13_2: flash@1 {
+ compatible = "n25q128a13", "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <66000000>;
+ spi-rx-bus-width = <2>;
+ reg = <1>;
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart0>;
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ status = "okay";
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+ status = "okay";
+};
+
+&usbdev0 {
+ disable-over-current;
+ status = "okay";
+};
+
+&usbh1 {
+ disable-over-current;
+ status = "okay";
+};
+
+&usbmisc0 {
+ status = "okay";
+};
+
+&usbmisc1 {
+ status = "okay";
+};
+
+&usbphy0 {
+ status = "okay";
+};
+
+&usbphy1 {
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hog>;
+
+ pinctrl_hog: hoggrp {
+ fsl,pins = <
+ /* One_Wire_PSU_EN */
+ VF610_PAD_PTC29__GPIO_102 0x1183
+ /* SPI ENABLE */
+ VF610_PAD_PTB26__GPIO_96 0x1183
+ /* EB control */
+ VF610_PAD_PTE14__GPIO_119 0x1183
+ VF610_PAD_PTE4__GPIO_109 0x1181
+ /* Feedback_Lines */
+ VF610_PAD_PTC31__GPIO_104 0x1181
+ VF610_PAD_PTA7__GPIO_134 0x1181
+ VF610_PAD_PTD9__GPIO_88 0x1181
+ VF610_PAD_PTE1__GPIO_106 0x1183
+ VF610_PAD_PTB2__GPIO_24 0x1181
+ VF610_PAD_PTB3__GPIO_25 0x1181
+ VF610_PAD_PTB1__GPIO_23 0x1181
+ /* SDHC Enable */
+ VF610_PAD_PTE19__GPIO_124 0x1183
+ /* SDHC Overcurrent */
+ VF610_PAD_PTB23__GPIO_93 0x1181
+ /* GPI */
+ VF610_PAD_PTE2__GPIO_107 0x1181
+ VF610_PAD_PTE3__GPIO_108 0x1181
+ VF610_PAD_PTE5__GPIO_110 0x1181
+ VF610_PAD_PTE6__GPIO_111 0x1181
+ /* GPO */
+ VF610_PAD_PTE0__GPIO_105 0x1183
+ VF610_PAD_PTE7__GPIO_112 0x1183
+ /* RS485 Control */
+ VF610_PAD_PTB8__GPIO_30 0x1183
+ VF610_PAD_PTB9__GPIO_31 0x1183
+ VF610_PAD_PTE8__GPIO_113 0x1183
+ /* MPBUS MPB_EN */
+ VF610_PAD_PTE28__GPIO_133 0x1183
+ /* MISC */
+ VF610_PAD_PTE10__GPIO_115 0x1183
+ VF610_PAD_PTE11__GPIO_116 0x1183
+ VF610_PAD_PTE17__GPIO_122 0x1183
+ VF610_PAD_PTC30__GPIO_103 0x1183
+ VF610_PAD_PTB0__GPIO_22 0x1181
+ /* RESETINFO */
+ VF610_PAD_PTE26__GPIO_131 0x1183
+ VF610_PAD_PTD6__GPIO_85 0x1181
+ VF610_PAD_PTE27__GPIO_132 0x1181
+ VF610_PAD_PTE13__GPIO_118 0x1181
+ VF610_PAD_PTE21__GPIO_126 0x1181
+ VF610_PAD_PTE22__GPIO_127 0x1181
+ /* EE_5V_EN */
+ VF610_PAD_PTE18__GPIO_123 0x1183
+ /* EE_5V_OC_N */
+ VF610_PAD_PTE25__GPIO_130 0x1181
+ >;
+ };
+
+ pinctrl_can0: can0grp {
+ fsl,pins = <
+ VF610_PAD_PTB14__CAN0_RX 0x1181
+ VF610_PAD_PTB15__CAN0_TX 0x1182
+ >;
+ };
+
+ pinctrl_can1: can1grp {
+ fsl,pins = <
+ VF610_PAD_PTB16__CAN1_RX 0x1181
+ VF610_PAD_PTB17__CAN1_TX 0x1182
+ >;
+ };
+
+ pinctrl_dspi0: dspi0grp {
+ fsl,pins = <
+ VF610_PAD_PTB18__DSPI0_CS1 0x1182
+ VF610_PAD_PTB19__DSPI0_CS0 0x1182
+ VF610_PAD_PTB20__DSPI0_SIN 0x1181
+ VF610_PAD_PTB21__DSPI0_SOUT 0x1182
+ VF610_PAD_PTB22__DSPI0_SCK 0x1182
+ >;
+ };
+
+ pinctrl_dspi3: dspi3grp {
+ fsl,pins = <
+ VF610_PAD_PTD10__DSPI3_CS0 0x1181
+ VF610_PAD_PTD11__DSPI3_SIN 0x1181
+ VF610_PAD_PTD12__DSPI3_SOUT 0x1182
+ VF610_PAD_PTD13__DSPI3_SCK 0x1181
+ >;
+ };
+
+ pinctrl_esdhc1: esdhc1grp {
+ fsl,pins = <
+ VF610_PAD_PTA24__ESDHC1_CLK 0x31ef
+ VF610_PAD_PTA25__ESDHC1_CMD 0x31ef
+ VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef
+ VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef
+ VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef
+ VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef
+ VF610_PAD_PTB28__GPIO_98 0x219d
+ >;
+ };
+
+ pinctrl_fec0: fec0grp {
+ fsl,pins = <
+ VF610_PAD_PTA6__RMII_CLKIN 0x30dd
+ VF610_PAD_PTC0__ENET_RMII0_MDC 0x30de
+ VF610_PAD_PTC1__ENET_RMII0_MDIO 0x30df
+ VF610_PAD_PTC2__ENET_RMII0_CRS 0x30dd
+ VF610_PAD_PTC3__ENET_RMII0_RXD1 0x30dd
+ VF610_PAD_PTC4__ENET_RMII0_RXD0 0x30dd
+ VF610_PAD_PTC5__ENET_RMII0_RXER 0x30dd
+ VF610_PAD_PTC6__ENET_RMII0_TXD1 0x30de
+ VF610_PAD_PTC7__ENET_RMII0_TXD0 0x30de
+ VF610_PAD_PTC8__ENET_RMII0_TXEN 0x30de
+ >;
+ };
+
+ pinctrl_fec1: fec1grp {
+ fsl,pins = <
+ VF610_PAD_PTC9__ENET_RMII1_MDC 0x30de
+ VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30df
+ VF610_PAD_PTC11__ENET_RMII1_CRS 0x30dd
+ VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30dd
+ VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30dd
+ VF610_PAD_PTC14__ENET_RMII1_RXER 0x30dd
+ VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30de
+ VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30de
+ VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30de
+ >;
+ };
+
+ pinctrl_gpio_leds: gpioledsgrp {
+ fsl,pins = <
+ /* Heart bit LED */
+ VF610_PAD_PTE12__GPIO_117 0x1183
+ /* LEDS */
+ VF610_PAD_PTE15__GPIO_120 0x1183
+ VF610_PAD_PTA12__GPIO_5 0x1183
+ VF610_PAD_PTA16__GPIO_6 0x1183
+ VF610_PAD_PTE9__GPIO_114 0x1183
+ VF610_PAD_PTE20__GPIO_125 0x1183
+ VF610_PAD_PTE23__GPIO_128 0x1183
+ VF610_PAD_PTE16__GPIO_121 0x1183
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ VF610_PAD_PTA22__I2C2_SCL 0x34df
+ VF610_PAD_PTA23__I2C2_SDA 0x34df
+ >;
+ };
+
+ pinctrl_nfc: nfcgrp {
+ fsl,pins = <
+ VF610_PAD_PTD23__NF_IO7 0x28df
+ VF610_PAD_PTD22__NF_IO6 0x28df
+ VF610_PAD_PTD21__NF_IO5 0x28df
+ VF610_PAD_PTD20__NF_IO4 0x28df
+ VF610_PAD_PTD19__NF_IO3 0x28df
+ VF610_PAD_PTD18__NF_IO2 0x28df
+ VF610_PAD_PTD17__NF_IO1 0x28df
+ VF610_PAD_PTD16__NF_IO0 0x28df
+ VF610_PAD_PTB24__NF_WE_B 0x28c2
+ VF610_PAD_PTB25__NF_CE0_B 0x28c2
+ VF610_PAD_PTB27__NF_RE_B 0x28c2
+ VF610_PAD_PTC26__NF_RB_B 0x283d
+ VF610_PAD_PTC27__NF_ALE 0x28c2
+ VF610_PAD_PTC28__NF_CLE 0x28c2
+ >;
+ };
+
+ pinctrl_qspi0: qspi0grp {
+ fsl,pins = <
+ VF610_PAD_PTD0__QSPI0_A_QSCK 0x397f
+ VF610_PAD_PTD1__QSPI0_A_CS0 0x397f
+ VF610_PAD_PTD2__QSPI0_A_DATA3 0x397f
+ VF610_PAD_PTD3__QSPI0_A_DATA2 0x397f
+ VF610_PAD_PTD4__QSPI0_A_DATA1 0x397f
+ VF610_PAD_PTD5__QSPI0_A_DATA0 0x397f
+ VF610_PAD_PTD7__QSPI0_B_QSCK 0x397f
+ VF610_PAD_PTD8__QSPI0_B_CS0 0x397f
+ VF610_PAD_PTD11__QSPI0_B_DATA1 0x397f
+ VF610_PAD_PTD12__QSPI0_B_DATA0 0x397f
+ >;
+ };
+
+ pinctrl_uart0: uart0grp {
+ fsl,pins = <
+ VF610_PAD_PTB10__UART0_TX 0x21a2
+ VF610_PAD_PTB11__UART0_RX 0x21a1
+ >;
+ };
+
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ VF610_PAD_PTB4__UART1_TX 0x21a2
+ VF610_PAD_PTB5__UART1_RX 0x21a1
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ VF610_PAD_PTB6__UART2_TX 0x21a2
+ VF610_PAD_PTB7__UART2_RX 0x21a1
+ >;
+ };
+
+ pinctrl_uart3: uart3grp {
+ fsl,pins = <
+ VF610_PAD_PTA20__UART3_TX 0x21a2
+ VF610_PAD_PTA21__UART3_RX 0x21a1
+ >;
+ };
+};
--
2.11.0
^ permalink raw reply related [flat|nested] 20+ messages in thread
* Re: [PATCH v3] ARM: dts: Add support for Liebherr's BK4 device (vf610 based)
2018-10-09 10:50 ` [PATCH v3] " Lukasz Majewski
@ 2018-10-09 11:09 ` Fabio Estevam
2018-10-12 0:40 ` Shawn Guo
2018-12-05 23:12 ` Fabio Estevam
2 siblings, 0 replies; 20+ messages in thread
From: Fabio Estevam @ 2018-10-09 11:09 UTC (permalink / raw)
To: Lukasz Majewski
Cc: Shawn Guo, Rob Herring, Mark Rutland, Sascha Hauer,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
linux-kernel,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
Sascha Hauer, Stefan Agner, Fabio Estevam
On Tue, Oct 9, 2018 at 7:50 AM Lukasz Majewski <lukma@denx.de> wrote:
>
> This commit adds DTS support for BK4 device from Liebherr. It
> uses vf610 SoC from NXP.
>
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v3] ARM: dts: Add support for Liebherr's BK4 device (vf610 based)
2018-10-09 10:50 ` [PATCH v3] " Lukasz Majewski
2018-10-09 11:09 ` Fabio Estevam
@ 2018-10-12 0:40 ` Shawn Guo
2018-10-15 8:14 ` Lukasz Majewski
2018-12-05 23:12 ` Fabio Estevam
2 siblings, 1 reply; 20+ messages in thread
From: Shawn Guo @ 2018-10-12 0:40 UTC (permalink / raw)
To: Lukasz Majewski
Cc: Rob Herring, Mark Rutland, Sascha Hauer, devicetree,
linux-kernel, linux-arm-kernel, Pengutronix Kernel Team,
Stefan Agner, Fabio Estevam, Fabio Estevam
On Tue, Oct 09, 2018 at 12:50:28PM +0200, Lukasz Majewski wrote:
> This commit adds DTS support for BK4 device from Liebherr. It
> uses vf610 SoC from NXP.
>
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
As v3 just incorporates a few minor improvements over v2, Stefan's
review tag should really be carried. I applied the patch with Stefan
and Fabio's review tag added.
Shawn
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v3] ARM: dts: Add support for Liebherr's BK4 device (vf610 based)
2018-10-12 0:40 ` Shawn Guo
@ 2018-10-15 8:14 ` Lukasz Majewski
0 siblings, 0 replies; 20+ messages in thread
From: Lukasz Majewski @ 2018-10-15 8:14 UTC (permalink / raw)
To: Shawn Guo
Cc: Rob Herring, Mark Rutland, Sascha Hauer, devicetree,
linux-kernel, linux-arm-kernel, Pengutronix Kernel Team,
Stefan Agner, Fabio Estevam, Fabio Estevam
[-- Attachment #1: Type: text/plain, Size: 712 bytes --]
Hi Shawn,
> On Tue, Oct 09, 2018 at 12:50:28PM +0200, Lukasz Majewski wrote:
> > This commit adds DTS support for BK4 device from Liebherr. It
> > uses vf610 SoC from NXP.
> >
> > Signed-off-by: Lukasz Majewski <lukma@denx.de>
>
> As v3 just incorporates a few minor improvements over v2, Stefan's
> review tag should really be carried. I applied the patch with Stefan
> and Fabio's review tag added.
Thanks :-).
>
> Shawn
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v3] ARM: dts: Add support for Liebherr's BK4 device (vf610 based)
2018-10-09 10:50 ` [PATCH v3] " Lukasz Majewski
2018-10-09 11:09 ` Fabio Estevam
2018-10-12 0:40 ` Shawn Guo
@ 2018-12-05 23:12 ` Fabio Estevam
2018-12-06 8:22 ` Lukasz Majewski
2 siblings, 1 reply; 20+ messages in thread
From: Fabio Estevam @ 2018-12-05 23:12 UTC (permalink / raw)
To: Lukasz Majewski, Rob Herring
Cc: Shawn Guo, Mark Rutland, Sascha Hauer,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
linux-kernel,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
Sascha Hauer, Stefan Agner, Fabio Estevam
Hi Lukasz/Rob,
On Tue, Oct 9, 2018 at 7:50 AM Lukasz Majewski <lukma@denx.de> wrote:
> +&dspi3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_dspi3>;
> + bus-num = <3>;
> + status = "okay";
> + spi-slave;
> +
> + slave@0 {
> + compatible = "lwn,bk4";
> + spi-max-frequency = <30000000>;
> + reg = <0>;
> + };
> +};
This is causing the following dtc warning in linux-next:
DTC arch/arm/boot/dts/vf610-bk4.dtb
arch/arm/boot/dts/vfxxx.dtsi:550.24-563.6: Warning (spi_bus_bridge):
/soc/aips-bus@40080000/spi@400ad000: incorrect #address-cells for SPI
bus
also defined at arch/arm/boot/dts/vf610-bk4.dts:106.8-118.3
arch/arm/boot/dts/vf610-bk4.dtb: Warning (spi_bus_reg): Failed
prerequisite 'spi_bus_bridge'
If spi-slave property is removed the warning is gone.
Looking at drivers/spi/spi-fsl-dspi.c I don't see the "spi-slave"
property being handled there.
Any ideas on how to fix this?
Thanks
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v3] ARM: dts: Add support for Liebherr's BK4 device (vf610 based)
2018-12-05 23:12 ` Fabio Estevam
@ 2018-12-06 8:22 ` Lukasz Majewski
2018-12-06 11:09 ` Fabio Estevam
0 siblings, 1 reply; 20+ messages in thread
From: Lukasz Majewski @ 2018-12-06 8:22 UTC (permalink / raw)
To: Fabio Estevam
Cc: Rob Herring, Shawn Guo, Mark Rutland, Sascha Hauer,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
linux-kernel,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
Sascha Hauer, Stefan Agner, Fabio Estevam
[-- Attachment #1: Type: text/plain, Size: 2015 bytes --]
On Wed, 5 Dec 2018 21:12:46 -0200
Fabio Estevam <festevam@gmail.com> wrote:
> Hi Lukasz/Rob,
>
> On Tue, Oct 9, 2018 at 7:50 AM Lukasz Majewski <lukma@denx.de> wrote:
>
> > +&dspi3 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_dspi3>;
> > + bus-num = <3>;
> > + status = "okay";
> > + spi-slave;
> > +
> > + slave@0 {
> > + compatible = "lwn,bk4";
> > + spi-max-frequency = <30000000>;
> > + reg = <0>;
> > + };
> > +};
>
> This is causing the following dtc warning in linux-next:
>
> DTC arch/arm/boot/dts/vf610-bk4.dtb
> arch/arm/boot/dts/vfxxx.dtsi:550.24-563.6: Warning (spi_bus_bridge):
> /soc/aips-bus@40080000/spi@400ad000: incorrect #address-cells for SPI
> bus
> also defined at arch/arm/boot/dts/vf610-bk4.dts:106.8-118.3
> arch/arm/boot/dts/vf610-bk4.dtb: Warning (spi_bus_reg): Failed
> prerequisite 'spi_bus_bridge'
>
> If spi-slave property is removed the warning is gone.
The spi-slave has been added according to review suggestion:
https://lkml.org/lkml/2018/9/26/836
That is the way to handle "slave" SPI operation mode across the kernel.
At the time of development - I've checked my NXP related patches with
W=1 passed to make. No warnings observed then.
>
> Looking at drivers/spi/spi-fsl-dspi.c I don't see the "spi-slave"
> property being handled there.
>
> Any ideas on how to fix this?
The *.dts file for Vybrid was sent and work on in parallel with the SPI
slave code implementation for Vybrid:
https://patchwork.kernel.org/patch/10680431/
Unfortunately, for the above patch I did not received any feedback
since mid September.
>
> Thanks
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v3] ARM: dts: Add support for Liebherr's BK4 device (vf610 based)
2018-12-06 8:22 ` Lukasz Majewski
@ 2018-12-06 11:09 ` Fabio Estevam
2018-12-06 13:08 ` Lukasz Majewski
0 siblings, 1 reply; 20+ messages in thread
From: Fabio Estevam @ 2018-12-06 11:09 UTC (permalink / raw)
To: Lukasz Majewski
Cc: Rob Herring, Shawn Guo, Mark Rutland, Sascha Hauer,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
linux-kernel,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
Sascha Hauer, Stefan Agner, Fabio Estevam
On Thu, Dec 6, 2018 at 6:23 AM Lukasz Majewski <lukma@denx.de> wrote:
> At the time of development - I've checked my NXP related patches with
> W=1 passed to make. No warnings observed then.
In linux-next the warning happens without W=1.
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v3] ARM: dts: Add support for Liebherr's BK4 device (vf610 based)
2018-12-06 11:09 ` Fabio Estevam
@ 2018-12-06 13:08 ` Lukasz Majewski
2018-12-06 13:11 ` Fabio Estevam
0 siblings, 1 reply; 20+ messages in thread
From: Lukasz Majewski @ 2018-12-06 13:08 UTC (permalink / raw)
To: Fabio Estevam
Cc: Rob Herring, Shawn Guo, Mark Rutland, Sascha Hauer,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
linux-kernel,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
Sascha Hauer, Stefan Agner, Fabio Estevam
[-- Attachment #1: Type: text/plain, Size: 576 bytes --]
Hi Fabio,
> On Thu, Dec 6, 2018 at 6:23 AM Lukasz Majewski <lukma@denx.de> wrote:
>
> > At the time of development - I've checked my NXP related patches
> > with W=1 passed to make. No warnings observed then.
>
> In linux-next the warning happens without W=1.
I will check this latter this week...
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v3] ARM: dts: Add support for Liebherr's BK4 device (vf610 based)
2018-12-06 13:08 ` Lukasz Majewski
@ 2018-12-06 13:11 ` Fabio Estevam
2018-12-07 9:29 ` Lukasz Majewski
0 siblings, 1 reply; 20+ messages in thread
From: Fabio Estevam @ 2018-12-06 13:11 UTC (permalink / raw)
To: Lukasz Majewski
Cc: Rob Herring, Shawn Guo, Mark Rutland, Sascha Hauer,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
linux-kernel,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
Sascha Hauer, Stefan Agner, Fabio Estevam
Hi Lukasz,
On Thu, Dec 6, 2018 at 11:08 AM Lukasz Majewski <lukma@denx.de> wrote:
> I will check this latter this week...
Reading the spi dt-binding it states that the spi slave node is optional.
If I remove it like this, then the warning is gone:
--- a/arch/arm/boot/dts/vf610-bk4.dts
+++ b/arch/arm/boot/dts/vf610-bk4.dts
@@ -109,12 +109,6 @@
bus-num = <3>;
status = "okay";
spi-slave;
-
- slave@0 {
- compatible = "lwn,bk4";
- spi-max-frequency = <30000000>;
- reg = <0>;
- };
};
&edma0 {
Does spi slave still work without it?
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v3] ARM: dts: Add support for Liebherr's BK4 device (vf610 based)
2018-12-06 13:11 ` Fabio Estevam
@ 2018-12-07 9:29 ` Lukasz Majewski
2018-12-09 22:20 ` Lukasz Majewski
0 siblings, 1 reply; 20+ messages in thread
From: Lukasz Majewski @ 2018-12-07 9:29 UTC (permalink / raw)
To: Fabio Estevam
Cc: Rob Herring, Shawn Guo, Mark Rutland, Sascha Hauer,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
linux-kernel,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
Sascha Hauer, Stefan Agner, Fabio Estevam
[-- Attachment #1: Type: text/plain, Size: 1282 bytes --]
Hi Fabio,
> Hi Lukasz,
>
> On Thu, Dec 6, 2018 at 11:08 AM Lukasz Majewski <lukma@denx.de> wrote:
>
> > I will check this latter this week...
>
> Reading the spi dt-binding it states that the spi slave node is
> optional.
>
> If I remove it like this, then the warning is gone:
Unfortunately, the "slave" node is necessary - the "lwn,bk4" compatible
causes the spidev driver to be bound.
Use space applications on this system use it to perform SPI
transmission.
IMHO, removing the node is not a solution - we shall discover why on
current next we do see such errors.
>
> --- a/arch/arm/boot/dts/vf610-bk4.dts
> +++ b/arch/arm/boot/dts/vf610-bk4.dts
> @@ -109,12 +109,6 @@
> bus-num = <3>;
> status = "okay";
> spi-slave;
> -
> - slave@0 {
> - compatible = "lwn,bk4";
> - spi-max-frequency = <30000000>;
> - reg = <0>;
> - };
> };
>
> &edma0 {
>
> Does spi slave still work without it?
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v3] ARM: dts: Add support for Liebherr's BK4 device (vf610 based)
2018-12-07 9:29 ` Lukasz Majewski
@ 2018-12-09 22:20 ` Lukasz Majewski
0 siblings, 0 replies; 20+ messages in thread
From: Lukasz Majewski @ 2018-12-09 22:20 UTC (permalink / raw)
To: Fabio Estevam
Cc: Rob Herring, Shawn Guo, Mark Rutland, Sascha Hauer,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
linux-kernel,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
Sascha Hauer, Stefan Agner, Fabio Estevam
[-- Attachment #1: Type: text/plain, Size: 1969 bytes --]
Hi Fabio,
> Hi Fabio,
>
> > Hi Lukasz,
> >
> > On Thu, Dec 6, 2018 at 11:08 AM Lukasz Majewski <lukma@denx.de>
> > wrote:
> > > I will check this latter this week...
> >
> > Reading the spi dt-binding it states that the spi slave node is
> > optional.
> >
> > If I remove it like this, then the warning is gone:
>
> Unfortunately, the "slave" node is necessary - the "lwn,bk4"
> compatible causes the spidev driver to be bound.
>
> Use space applications on this system use it to perform SPI
> transmission.
>
> IMHO, removing the node is not a solution - we shall discover why on
> current next we do see such errors.
It seems like those errors were present earlier:
https://www.lkml.org/lkml/2018/9/20/106
and
https://www.lkml.org/lkml/2018/9/20/669
It seems like the commit: 5a2ecf0de0d3d7a79e21397ad530904a72b903bb
seems to fix the issue.
But I don't know why it doesn't work in this case.
>
> >
> > --- a/arch/arm/boot/dts/vf610-bk4.dts
> > +++ b/arch/arm/boot/dts/vf610-bk4.dts
> > @@ -109,12 +109,6 @@
> > bus-num = <3>;
> > status = "okay";
> > spi-slave;
> > -
> > - slave@0 {
> > - compatible = "lwn,bk4";
> > - spi-max-frequency = <30000000>;
> > - reg = <0>;
> > - };
> > };
> >
> > &edma0 {
> >
> > Does spi slave still work without it?
>
>
> Best regards,
>
> Lukasz Majewski
>
> --
>
> DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email:
> lukma@denx.de
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply [flat|nested] 20+ messages in thread
end of thread, other threads:[~2018-12-09 22:20 UTC | newest]
Thread overview: 20+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-09-21 15:27 [PATCH] ARM: dts: Add support for Liebherr's BK4 device (vf610 based) Lukasz Majewski
2018-09-21 22:30 ` Stefan Agner
2018-09-22 12:41 ` Lukasz Majewski
2018-09-23 14:32 ` Fabio Estevam
2018-09-24 8:30 ` Lukasz Majewski
2018-09-27 22:18 ` [PATCH v2] " Lukasz Majewski
2018-09-28 9:00 ` Stefan Agner
2018-10-08 12:25 ` Lukasz Majewski
2018-10-08 14:34 ` Shawn Guo
2018-10-09 10:50 ` [PATCH v3] " Lukasz Majewski
2018-10-09 11:09 ` Fabio Estevam
2018-10-12 0:40 ` Shawn Guo
2018-10-15 8:14 ` Lukasz Majewski
2018-12-05 23:12 ` Fabio Estevam
2018-12-06 8:22 ` Lukasz Majewski
2018-12-06 11:09 ` Fabio Estevam
2018-12-06 13:08 ` Lukasz Majewski
2018-12-06 13:11 ` Fabio Estevam
2018-12-07 9:29 ` Lukasz Majewski
2018-12-09 22:20 ` Lukasz Majewski
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).