From: Quentin Schulz <quentin.schulz@bootlin.com>
To: Rob Herring <robh@kernel.org>
Cc: alexandre.belloni@bootlin.com, ralf@linux-mips.org,
paul.burton@mips.com, jhogan@kernel.org, mark.rutland@arm.com,
davem@davemloft.net, kishon@ti.com, andrew@lunn.ch,
f.fainelli@gmail.com, allan.nielsen@microchip.com,
linux-mips@linux-mips.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, netdev@vger.kernel.org,
thomas.petazzoni@bootlin.com
Subject: Re: [PATCH net-next v3 07/11] dt-bindings: phy: add DT binding for Microsemi Ocelot SerDes muxing
Date: Mon, 1 Oct 2018 14:46:05 +0200 [thread overview]
Message-ID: <20181001124605.jxiechvp6ztvh77p@qschulz> (raw)
In-Reply-To: <20180926213509.GA7454@bogus>
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Hi Rob,
I'm not sure I've understood the way you wanted me to so let me know if
I'm not on the right path.
On Wed, Sep 26, 2018 at 04:35:09PM -0500, Rob Herring wrote:
> On Fri, Sep 14, 2018 at 10:16:05AM +0200, Quentin Schulz wrote:
> > Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
> > ---
> > Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt | 40 +++++++-
> > 1 file changed, 40 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt
> >
> > diff --git a/Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt b/Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt
> > new file mode 100644
> > index 0000000..2a88cc3
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt
> > @@ -0,0 +1,40 @@
> > +Microsemi Ocelot SerDes muxing driver
> > +-------------------------------------
> > +
> > +On Microsemi Ocelot, there is a handful of registers in HSIO address
> > +space for setting up the SerDes to switch port muxing.
> > +
> > +A SerDes X can be "muxed" to work with switch port Y or Z for example.
> > +One specific SerDes can also be used as a PCIe interface.
> > +
> > +Hence, a SerDes represents an interface, be it an Ethernet or a PCIe one.
> > +
> > +There are two kinds of SerDes: SERDES1G supports 10/100Mbps in
> > +half/full-duplex and 1000Mbps in full-duplex mode while SERDES6G supports
> > +10/100Mbps in half/full-duplex and 1000/2500Mbps in full-duplex mode.
> > +
> > +Also, SERDES6G number (aka "macro") 0 is the only interface supporting
> > +QSGMII.
> > +
> > +Required properties:
> > +
> > +- compatible: should be "mscc,vsc7514-serdes"
> > +- #phy-cells : from the generic phy bindings, must be 2.
> > + The first number defines the input port to use for a given
> > + SerDes macro. The second defines the macro to use. They are
> > + defined in dt-bindings/phy/phy-ocelot-serdes.h
>
> You need to define what this is a child of.
>
This is a child of the HSIO syscon on the Microsemi Ocelot. I don't
expect all Microsemi SoCs that could use this driver to have the SerDes
node in the HSIO syscon.
Among the latest additions in Documentation/devicetree/bindings/phy I
couldn't find anything close to my understanding of "define what this is
a child of", could you elaborate on what you want exactly?
> > +
> > +Example:
> > +
> > + serdes: serdes {
> > + compatible = "mscc,vsc7514-serdes";
> > + #phy-cells = <2>;
>
> However, if there are no other resources associated with this, then you
> don't even need this child node. The parent can be a phy provider and
> provider of other functions too.
>
The parent is a syscon with multiple features (SerDes, PLL
configuration, temp sensor, SyncE, ...) so I'm not sure it's possible to
do what you're asking me to. For now, there is only a SerDes node but
ultimately there'll be more than one I guess.
Thanks,
Quentin
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next prev parent reply other threads:[~2018-10-01 12:46 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-14 8:15 [PATCH net-next v3 00/11] mscc: ocelot: add support for SerDes muxing configuration Quentin Schulz
2018-09-14 8:15 ` [PATCH net-next v3 01/11] MIPS: mscc: ocelot: make HSIO registers address range a syscon Quentin Schulz
2018-09-14 8:16 ` [PATCH net-next v3 02/11] dt-bindings: net: ocelot: remove hsio from the list of register address spaces Quentin Schulz
2018-09-14 8:16 ` [PATCH net-next v3 03/11] net: mscc: ocelot: get HSIO regmap from syscon Quentin Schulz
2018-09-15 2:23 ` Florian Fainelli
2018-09-14 8:16 ` [PATCH net-next v3 04/11] net: mscc: ocelot: move the HSIO header to include/soc Quentin Schulz
2018-09-15 2:24 ` Florian Fainelli
2018-09-14 8:16 ` [PATCH net-next v3 05/11] net: mscc: ocelot: simplify register access for PLL5 configuration Quentin Schulz
2018-09-15 2:26 ` Florian Fainelli
2018-09-14 8:16 ` [PATCH net-next v3 06/11] phy: add QSGMII and PCIE modes Quentin Schulz
2018-09-15 2:27 ` Florian Fainelli
2018-09-14 8:16 ` [PATCH net-next v3 07/11] dt-bindings: phy: add DT binding for Microsemi Ocelot SerDes muxing Quentin Schulz
2018-09-15 2:29 ` Florian Fainelli
2018-09-26 21:35 ` Rob Herring
2018-10-01 12:46 ` Quentin Schulz [this message]
2018-10-01 17:10 ` Rob Herring
2018-09-14 8:16 ` [PATCH net-next v3 08/11] MIPS: mscc: ocelot: add SerDes mux DT node Quentin Schulz
2018-09-15 2:30 ` Florian Fainelli
2018-09-14 8:16 ` [PATCH net-next v3 09/11] dt-bindings: add constants for Microsemi Ocelot SerDes driver Quentin Schulz
2018-09-15 2:31 ` Florian Fainelli
2018-09-26 21:36 ` Rob Herring
2018-09-14 8:16 ` [PATCH net-next v3 10/11] phy: add driver for Microsemi Ocelot SerDes muxing Quentin Schulz
2018-09-15 21:20 ` Florian Fainelli
2018-10-01 10:02 ` Quentin Schulz
2018-09-14 8:16 ` [PATCH net-next v3 11/11] net: mscc: ocelot: make use of SerDes PHYs for handling their configuration Quentin Schulz
2018-09-15 21:25 ` Florian Fainelli
2018-10-01 9:42 ` Quentin Schulz
2018-10-01 16:29 ` Florian Fainelli
2018-10-04 12:20 ` Quentin Schulz
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