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Date:   Tue, 2 Oct 2018 20:32:29 +0530
From:   Vinod <vkoul@kernel.org>
To:     Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Cc:     Dan Williams <dan.j.williams@intel.com>,
        Maxime Coquelin <mcoquelin.stm32@gmail.com>,
        Alexandre Torgue <alexandre.torgue@st.com>,
        dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1 1/1] dmaengine: stm32-dma: check whether length is
 aligned on FIFO threshold
Message-ID: <20181002150229.GI19792@vkoul-mobl>
References: <1536651076-17005-1-git-send-email-pierre-yves.mordret@st.com>
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On 11-09-18, 09:31, Pierre-Yves MORDRET wrote:
> When a period length is not multiple of FIFO some data may be stuck
> within FIFO.
> 
> Burst/FIFO Threshold/Period or buffer length check has to be hardened
> 
> In any case DMA will grant any request from client but will degraded
> any parameters whether awkward.

Applied, thanks

-- 
~Vinod