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From: Peter Zijlstra <peterz@infradead.org>
To: will.deacon@arm.com, mingo@kernel.org
Cc: linux-kernel@vger.kernel.org, longman@redhat.com,
	andrea.parri@amarulasolutions.com, tglx@linutronix.de,
	bigeasy@linutronix.de, Peter Zijlstra <peterz@infradead.org>
Subject: [PATCH v2 0/4] locking/qspinlock, x86: Improve determinism for x86
Date: Wed, 03 Oct 2018 15:02:57 +0200
Message-ID: <20181003130257.156322446@infradead.org> (raw)

Back when Will did his qspinlock determinism patches, we were left with one
cmpxchg loop on x86 due to the use of atomic_fetch_or(). Will proposed a nifty
trick:

  http://lkml.kernel.org/r/20180409145409.GA9661@arm.com

While that didn't quite work, this series implements that basic idea.

Changes since v1:

 - Adjusted comments in #2, wildea01
 - 'Simplified' GEN_*_RMWcc, peterz
 - Rewrote _the_ patch to use BTS, wildea01



             reply index

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-03 13:02 Peter Zijlstra [this message]
2018-10-03 13:02 ` [PATCH v2 1/4] locking/qspinlock: Re-order code Peter Zijlstra
2018-10-03 13:02 ` [PATCH v2 2/4] locking/qspinlock: Rework some comments Peter Zijlstra
2018-10-10 16:13   ` Will Deacon
2018-10-03 13:03 ` [PATCH v2 3/4] x86/asm: Simplify GEN_*_RMWcc() macros Peter Zijlstra
2018-10-04  9:18   ` Peter Zijlstra
2018-10-16 16:05   ` [tip:locking/core] x86/asm: 'Simplify' " tip-bot for Peter Zijlstra
2018-10-03 13:03 ` [PATCH v2 4/4] locking/qspinlock, x86: Provide liveness guarantee Peter Zijlstra
2018-10-10 16:12   ` Will Deacon
2018-10-12  9:22     ` Will Deacon
2018-10-16 16:06   ` [tip:locking/core] " tip-bot for Peter Zijlstra
2018-10-16 16:04 ` [tip:locking/core] locking/qspinlock: Re-order code tip-bot for Peter Zijlstra
2018-10-16 16:04 ` [tip:locking/core] locking/qspinlock: Rework some comments tip-bot for Peter Zijlstra

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