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[60.240.189.67]) by smtp.gmail.com with ESMTPSA id h130-v6sm168291pgc.88.2018.10.02.21.24.03 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 02 Oct 2018 21:24:06 -0700 (PDT) Date: Wed, 3 Oct 2018 14:24:00 +1000 From: Nicholas Piggin To: Christophe Leroy Cc: Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , aneesh.kumar@linux.vnet.ibm.com, linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Subject: Re: [RFC PATCH v3 1/7] book3s/64: avoid circular header inclusion in mmu-hash.h Message-ID: <20181003142400.490fd38a@roar.ozlabs.ibm.com> In-Reply-To: References: X-Mailer: Claws Mail 3.17.0 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 1 Oct 2018 12:30:19 +0000 (UTC) Christophe Leroy wrote: > When activating CONFIG_THREAD_INFO_IN_TASK, linux/sched.h > includes asm/current.h. This generates a circular dependency. > To avoid that, asm/processor.h shall not be included in mmu-hash.h > > In order to do that, this patch moves into a new header called > asm/task_size.h the information from asm/processor.h requires by > mmu-hash.h Doesn't look like you use this header in 32-bit code. Put task_size.h in asm/64/ maybe? Reviewed-by: Nicholas Piggin > > Signed-off-by: Christophe Leroy > --- > arch/powerpc/include/asm/book3s/64/mmu-hash.h | 2 +- > arch/powerpc/include/asm/processor.h | 34 +--------------------- > arch/powerpc/include/asm/task_size.h | 42 +++++++++++++++++++++++++++ > arch/powerpc/kvm/book3s_hv_hmi.c | 1 + > 4 files changed, 45 insertions(+), 34 deletions(-) > create mode 100644 arch/powerpc/include/asm/task_size.h > > diff --git a/arch/powerpc/include/asm/book3s/64/mmu-hash.h b/arch/powerpc/include/asm/book3s/64/mmu-hash.h > index bbeaf6adf93c..7788e35f19f0 100644 > --- a/arch/powerpc/include/asm/book3s/64/mmu-hash.h > +++ b/arch/powerpc/include/asm/book3s/64/mmu-hash.h > @@ -23,7 +23,7 @@ > */ > #include > #include > -#include > +#include > #include > > /* > diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h > index 350c584ca179..353879db3e98 100644 > --- a/arch/powerpc/include/asm/processor.h > +++ b/arch/powerpc/include/asm/processor.h > @@ -101,40 +101,8 @@ void release_thread(struct task_struct *); > #endif > > #ifdef CONFIG_PPC64 > -/* > - * 64-bit user address space can have multiple limits > - * For now supported values are: > - */ > -#define TASK_SIZE_64TB (0x0000400000000000UL) > -#define TASK_SIZE_128TB (0x0000800000000000UL) > -#define TASK_SIZE_512TB (0x0002000000000000UL) > -#define TASK_SIZE_1PB (0x0004000000000000UL) > -#define TASK_SIZE_2PB (0x0008000000000000UL) > -/* > - * With 52 bits in the address we can support > - * upto 4PB of range. > - */ > -#define TASK_SIZE_4PB (0x0010000000000000UL) > > -/* > - * For now 512TB is only supported with book3s and 64K linux page size. > - */ > -#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_PPC_64K_PAGES) > -/* > - * Max value currently used: > - */ > -#define TASK_SIZE_USER64 TASK_SIZE_4PB > -#define DEFAULT_MAP_WINDOW_USER64 TASK_SIZE_128TB > -#define TASK_CONTEXT_SIZE TASK_SIZE_512TB > -#else > -#define TASK_SIZE_USER64 TASK_SIZE_64TB > -#define DEFAULT_MAP_WINDOW_USER64 TASK_SIZE_64TB > -/* > - * We don't need to allocate extended context ids for 4K page size, because > - * we limit the max effective address on this config to 64TB. > - */ > -#define TASK_CONTEXT_SIZE TASK_SIZE_64TB > -#endif > +#include > > /* > * 32-bit user address space is 4GB - 1 page > diff --git a/arch/powerpc/include/asm/task_size.h b/arch/powerpc/include/asm/task_size.h > new file mode 100644 > index 000000000000..ca45638617b0 > --- /dev/null > +++ b/arch/powerpc/include/asm/task_size.h > @@ -0,0 +1,42 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +#ifndef _ASM_POWERPC_TASK_SIZE_H > +#define _ASM_POWERPC_TASK_SIZE_H > + > +#ifdef CONFIG_PPC64 > +/* > + * 64-bit user address space can have multiple limits > + * For now supported values are: > + */ > +#define TASK_SIZE_64TB (0x0000400000000000UL) > +#define TASK_SIZE_128TB (0x0000800000000000UL) > +#define TASK_SIZE_512TB (0x0002000000000000UL) > +#define TASK_SIZE_1PB (0x0004000000000000UL) > +#define TASK_SIZE_2PB (0x0008000000000000UL) > +/* > + * With 52 bits in the address we can support > + * upto 4PB of range. > + */ > +#define TASK_SIZE_4PB (0x0010000000000000UL) > + > +/* > + * For now 512TB is only supported with book3s and 64K linux page size. > + */ > +#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_PPC_64K_PAGES) > +/* > + * Max value currently used: > + */ > +#define TASK_SIZE_USER64 TASK_SIZE_4PB > +#define DEFAULT_MAP_WINDOW_USER64 TASK_SIZE_128TB > +#define TASK_CONTEXT_SIZE TASK_SIZE_512TB > +#else > +#define TASK_SIZE_USER64 TASK_SIZE_64TB > +#define DEFAULT_MAP_WINDOW_USER64 TASK_SIZE_64TB > +/* > + * We don't need to allocate extended context ids for 4K page size, because > + * we limit the max effective address on this config to 64TB. > + */ > +#define TASK_CONTEXT_SIZE TASK_SIZE_64TB > +#endif > + > +#endif /* CONFIG_PPC64 */ > +#endif /* _ASM_POWERPC_TASK_SIZE_H */ > diff --git a/arch/powerpc/kvm/book3s_hv_hmi.c b/arch/powerpc/kvm/book3s_hv_hmi.c > index e3f738eb1cac..64b5011475c7 100644 > --- a/arch/powerpc/kvm/book3s_hv_hmi.c > +++ b/arch/powerpc/kvm/book3s_hv_hmi.c > @@ -24,6 +24,7 @@ > #include > #include > #include > +#include > > void wait_for_subcore_guest_exit(void) > { > -- > 2.13.3 >