From: Faiz Abbas <faiz_abbas@ti.com>
To: <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-mmc@vger.kernel.org>
Cc: <kishon@ti.com>, <faiz_abbas@ti.com>, <ulf.hansson@linaro.org>,
<robh+dt@kernel.org>, <catalin.marinas@arm.com>,
<adrian.hunter@intel.com>
Subject: [PATCH 1/6] dt-bindings: phy: am654-mmc-phy: Document new phy bindings
Date: Thu, 4 Oct 2018 16:44:46 +0530 [thread overview]
Message-ID: <20181004111451.9539-2-faiz_abbas@ti.com> (raw)
In-Reply-To: <20181004111451.9539-1-faiz_abbas@ti.com>
Add information to document bindings for the MMC PHY
on TI's AM654 devices.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
---
.../devicetree/bindings/phy/am654-mmc-phy.txt | 42 +++++++++++++++++++
1 file changed, 42 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/am654-mmc-phy.txt
diff --git a/Documentation/devicetree/bindings/phy/am654-mmc-phy.txt b/Documentation/devicetree/bindings/phy/am654-mmc-phy.txt
new file mode 100644
index 000000000000..766921612758
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/am654-mmc-phy.txt
@@ -0,0 +1,42 @@
+TI AM654 MMC PHY
+-------------------
+
+Required properties:
+ - compatible: ti,am654-emmc-phy
+ - #phy-cells: must be 0
+ - reg: PHY registers address offset and size
+ - clocks: must be phandle of the clock provider which is the host
+ controller
+ - clock-names: must be "mmcclk"
+ - ti,otap-del-sel: Output Tap Delay select.
+ - ti,trm-icp: DLL trim select.
+ - ti,driver-strength-ohm: driver strength in ohms.
+ Valid values are 33, 40, 50, 66, and 100 ohms.
+
+Example:
+ mmc_phy1: mmc_phy@10100 {
+ compatible = "ti,am654-mmc-phy";
+ reg = <0x10100 0x34>;
+ clocks = <&sdhci1>;
+ clock-names = "mmcclk";
+ #phy-cells = <0>;
+ ti,otap-del-sel = <0x2>;
+ ti,trm-icp = <0x8>;
+ status = "disabled";
+ };
+
+Host controller node:
+
+ sdhci1: sdhci@0 {
+ compatible = "ti,am654-sdhci-5.1";
+ reg = <0x0 0x1000>;
+ power-domains = <&k3_pds 48>;
+ clocks = <&k3_clks 48 0>, <&k3_clks 48 1>;
+ clock-names = "clk_ahb", "clk_xin";
+ interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+ clock-output-names = "mmc_cardclck";
+ #clock-cells = <0>;
+ phys=<&mmc_phy1>;
+ phy-names = "phy_arasan";
+ status = "disabled";
+ };
--
2.18.0
next prev parent reply other threads:[~2018-10-04 11:12 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-04 11:14 [PATCH 0/6] Add Support for MMC/SD in TI's AM65x SOCs Faiz Abbas
2018-10-04 11:14 ` Faiz Abbas [this message]
2018-10-05 15:58 ` [PATCH 1/6] dt-bindings: phy: am654-mmc-phy: Document new phy bindings Andrew F. Davis
2018-10-09 6:34 ` Faiz Abbas
2018-10-08 11:29 ` Ulf Hansson
2018-10-04 11:14 ` [PATCH 2/6] phy: am654-mmc-phy: Add Support for MMC PHY on AM654 Devices Faiz Abbas
2018-10-08 11:32 ` Ulf Hansson
2018-10-09 5:18 ` Kishon Vijay Abraham I
2018-10-09 7:30 ` Ulf Hansson
2018-10-04 11:14 ` [PATCH 3/6] dt-bindings: mmc: sdhci-of-arasan: Add new compatible for AM654 MMC PHY Faiz Abbas
2018-10-09 7:30 ` Ulf Hansson
2018-10-04 11:14 ` [PATCH 4/6] mmc: sdhci-of-arasan: Add a single data structure to incorporate pdata and soc_ctl_map Faiz Abbas
2018-10-09 7:30 ` Ulf Hansson
2018-10-04 11:14 ` [PATCH 5/6] mmc: sdhci-of-arasan: Add Support for AM654 MMC and PHY Faiz Abbas
2018-10-09 7:30 ` Ulf Hansson
2018-10-09 7:35 ` Faiz Abbas
2018-10-09 7:35 ` Ulf Hansson
2018-10-04 11:14 ` [PATCH 6/6] arm64: defconfig: Enable MMC PHY for AM65xx Faiz Abbas
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